diff options
Diffstat (limited to 'bl31')
| -rw-r--r-- | bl31/aarch64/bl31_entrypoint.S | 30 | ||||
| -rw-r--r-- | bl31/aarch64/runtime_exceptions.S | 39 | ||||
| -rw-r--r-- | bl31/bl31.ld.S | 5 | ||||
| -rw-r--r-- | bl31/bl31.mk | 3 | ||||
| -rw-r--r-- | bl31/bl31_context_mgmt.c | 28 | ||||
| -rw-r--r-- | bl31/bl31_main.c | 3 | ||||
| -rw-r--r-- | bl31/ehf.c | 21 |
7 files changed, 76 insertions, 53 deletions
diff --git a/bl31/aarch64/bl31_entrypoint.S b/bl31/aarch64/bl31_entrypoint.S index 419927d8..0d1077cb 100644 --- a/bl31/aarch64/bl31_entrypoint.S +++ b/bl31/aarch64/bl31_entrypoint.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -9,7 +9,7 @@ #include <el3_common_macros.S> #include <pmf_asm_macros.S> #include <runtime_instr.h> -#include <xlat_tables_defs.h> +#include <xlat_mmu_helpers.h> .globl bl31_entrypoint .globl bl31_warm_entrypoint @@ -23,13 +23,13 @@ func bl31_entrypoint #if !RESET_TO_BL31 /* --------------------------------------------------------------- - * Preceding bootloader has populated x0 with a pointer to a - * 'bl31_params' structure & x1 with a pointer to platform - * specific structure + * Stash the previous bootloader arguments x0 - x3 for later use. * --------------------------------------------------------------- */ mov x20, x0 mov x21, x1 + mov x22, x2 + mov x23, x3 /* --------------------------------------------------------------------- * For !RESET_TO_BL31 systems, only the primary CPU ever reaches @@ -47,13 +47,6 @@ func bl31_entrypoint _init_memory=0 \ _init_c_runtime=1 \ _exception_vectors=runtime_exceptions - - /* --------------------------------------------------------------------- - * Relay the previous bootloader's arguments to the platform layer - * --------------------------------------------------------------------- - */ - mov x0, x20 - mov x1, x21 #else /* --------------------------------------------------------------------- * For RESET_TO_BL31 systems which have a programmable reset address, @@ -75,15 +68,20 @@ func bl31_entrypoint * arguments passed to the platform layer to reflect that. * --------------------------------------------------------------------- */ - mov x0, 0 - mov x1, 0 + mov x20, 0 + mov x21, 0 + mov x22, 0 + mov x23, 0 #endif /* RESET_TO_BL31 */ - /* --------------------------------------------- * Perform platform specific early arch. setup * --------------------------------------------- */ - bl bl31_early_platform_setup + mov x0, x20 + mov x1, x21 + mov x2, x22 + mov x3, x23 + bl bl31_early_platform_setup2 bl bl31_plat_arch_setup /* --------------------------------------------- diff --git a/bl31/aarch64/runtime_exceptions.S b/bl31/aarch64/runtime_exceptions.S index 9b7735f1..60be9327 100644 --- a/bl31/aarch64/runtime_exceptions.S +++ b/bl31/aarch64/runtime_exceptions.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -153,7 +153,14 @@ interrupt_exit_\label: .endm - .macro save_x18_to_x29_sp_el0 + .macro save_x4_to_x29_sp_el0 + stp x4, x5, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X4] + stp x6, x7, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X6] + stp x8, x9, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X8] + stp x10, x11, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X10] + stp x12, x13, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X12] + stp x14, x15, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X14] + stp x16, x17, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X16] stp x18, x19, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X18] stp x20, x21, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X20] stp x22, x23, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X22] @@ -297,34 +304,16 @@ smc_handler32: /* Check whether aarch32 issued an SMC64 */ tbnz x0, #FUNCID_CC_SHIFT, smc_prohibited - /* - * Since we're are coming from aarch32, x8-x18 need to be saved as per - * SMC32 calling convention. If a lower EL in aarch64 is making an - * SMC32 call then it must have saved x8-x17 already therein. - */ - stp x8, x9, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X8] - stp x10, x11, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X10] - stp x12, x13, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X12] - stp x14, x15, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X14] - stp x16, x17, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X16] - - /* x4-x7, x18, sp_el0 are saved below */ - smc_handler64: /* * Populate the parameters for the SMC handler. * We already have x0-x4 in place. x5 will point to a cookie (not used * now). x6 will point to the context structure (SP_EL3) and x7 will - * contain flags we need to pass to the handler Hence save x5-x7. + * contain flags we need to pass to the handler. * - * Note: x4 only needs to be preserved for AArch32 callers but we do it - * for AArch64 callers as well for convenience + * Save x4-x29 and sp_el0. Refer to SMCCC v1.1. */ - stp x4, x5, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X4] - stp x6, x7, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X6] - - /* Save rest of the gpregs and sp_el0*/ - save_x18_to_x29_sp_el0 + save_x4_to_x29_sp_el0 mov x5, xzr mov x6, sp @@ -401,12 +390,12 @@ smc_unknown: * content). Either way, we aren't leaking any secure information * through them. */ - mov w0, #SMC_UNK + mov x0, #SMC_UNK b restore_gp_registers_callee_eret smc_prohibited: ldr x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] - mov w0, #SMC_UNK + mov x0, #SMC_UNK eret rt_svc_fw_critical_error: diff --git a/bl31/bl31.ld.S b/bl31/bl31.ld.S index dd046c43..c6a4fe49 100644 --- a/bl31/bl31.ld.S +++ b/bl31/bl31.ld.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -217,7 +217,8 @@ SECTIONS /* * The xlat_table section is for full, aligned page tables (4K). * Removing them from .bss avoids forcing 4K alignment on - * the .bss section and eliminates the unecessary zero init + * the .bss section. The tables are initialized to zero by the translation + * tables library. */ xlat_table (NOLOAD) : { #if ENABLE_SPM diff --git a/bl31/bl31.mk b/bl31/bl31.mk index 2db48564..886d3016 100644 --- a/bl31/bl31.mk +++ b/bl31/bl31.mk @@ -1,5 +1,5 @@ # -# Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. +# Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. # # SPDX-License-Identifier: BSD-3-Clause # @@ -23,6 +23,7 @@ BL31_SOURCES += bl31/bl31_main.c \ bl31/bl31_context_mgmt.c \ common/runtime_svc.c \ plat/common/aarch64/platform_mp_stack.S \ + services/arm_arch_svc/arm_arch_svc_setup.c \ services/std_svc/std_svc_setup.c \ ${PSCI_LIB_SOURCES} \ ${SPM_SOURCES} \ diff --git a/bl31/bl31_context_mgmt.c b/bl31/bl31_context_mgmt.c index 05bf4e17..7d2c8938 100644 --- a/bl31/bl31_context_mgmt.c +++ b/bl31/bl31_context_mgmt.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -79,7 +79,13 @@ void *cm_get_context_by_mpidr(uint64_t mpidr, uint32_t security_state) { assert(sec_state_is_valid(security_state)); + /* + * Suppress deprecated declaration warning in compatibility function + */ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wdeprecated-declarations" return cm_get_context_by_index(platform_get_core_pos(mpidr), security_state); +#pragma GCC diagnostic pop } /******************************************************************************* @@ -90,8 +96,14 @@ void cm_set_context_by_mpidr(uint64_t mpidr, void *context, uint32_t security_st { assert(sec_state_is_valid(security_state)); + /* + * Suppress deprecated declaration warning in compatibility function + */ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wdeprecated-declarations" cm_set_context_by_index(platform_get_core_pos(mpidr), context, security_state); +#pragma GCC diagnostic pop } /******************************************************************************* @@ -99,12 +111,20 @@ void cm_set_context_by_mpidr(uint64_t mpidr, void *context, uint32_t security_st * existing cm library routines. This function is expected to be invoked for * initializing the cpu_context for the CPU specified by MPIDR for first use. ******************************************************************************/ -void cm_init_context(unsigned long mpidr, const entry_point_info_t *ep) +void cm_init_context(uint64_t mpidr, const entry_point_info_t *ep) { if ((mpidr & MPIDR_AFFINITY_MASK) == (read_mpidr_el1() & MPIDR_AFFINITY_MASK)) cm_init_my_context(ep); - else + else { + /* + * Suppress deprecated declaration warning in compatibility + * function + */ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wdeprecated-declarations" cm_init_context_by_index(platform_get_core_pos(mpidr), ep); +#pragma GCC diagnostic pop + } } -#endif +#endif /* ERROR_DEPRECATED */ diff --git a/bl31/bl31_main.c b/bl31/bl31_main.c index a34cf86d..06647412 100644 --- a/bl31/bl31_main.c +++ b/bl31/bl31_main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -17,6 +17,7 @@ #include <pmf.h> #include <runtime_instr.h> #include <runtime_svc.h> +#include <std_svc.h> #include <string.h> #if ENABLE_RUNTIME_INSTRUMENTATION @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -9,6 +9,8 @@ */ #include <assert.h> +#include <context.h> +#include <context_mgmt.h> #include <cpu_data.h> #include <debug.h> #include <ehf.h> @@ -201,7 +203,7 @@ void ehf_deactivate_priority(unsigned int priority) else old_mask = plat_ic_set_priority_mask(priority); - if (old_mask >= priority) { + if (old_mask > priority) { ERROR("Deactivation priority (0x%x) lower than Priority Mask (0x%x)\n", priority, old_mask); panic(); @@ -308,15 +310,17 @@ static void *ehf_entering_normal_world(const void *arg) /* * Program Priority Mask to the original Non-secure priority such that * Non-secure interrupts may preempt Secure execution, viz. during Yielding SMC - * calls. + * calls. The 'preempt_ret_code' parameter indicates the Yielding SMC's return + * value in case the call was preempted. * * This API is expected to be invoked before delegating a yielding SMC to Secure * EL1. I.e. within the window of secure execution after Non-secure context is * saved (after entry into EL3) and Secure context is restored (before entering * Secure EL1). */ -void ehf_allow_ns_preemption(void) +void ehf_allow_ns_preemption(uint64_t preempt_ret_code) { + cpu_context_t *ns_ctx; unsigned int old_pmr __unused; pe_exc_data_t *pe_data = this_cpu_data(); @@ -333,6 +337,15 @@ void ehf_allow_ns_preemption(void) panic(); } + /* + * Program preempted return code to x0 right away so that, if the + * Yielding SMC was indeed preempted before a dispatcher gets a chance + * to populate it, the caller would find the correct return value. + */ + ns_ctx = cm_get_context(NON_SECURE); + assert(ns_ctx); + write_ctx_reg(get_gpregs_ctx(ns_ctx), CTX_GPREG_X0, preempt_ret_code); + old_pmr = plat_ic_set_priority_mask(pe_data->ns_pri_mask); EHF_LOG("Priority Mask: 0x%x => 0x%x\n", old_pmr, pe_data->ns_pri_mask); |