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-rw-r--r--bl32/tsp/aarch64/tsp_entrypoint.S5
-rw-r--r--bl32/tsp/tsp-fvp.mk38
-rw-r--r--bl32/tsp/tsp.ld.S4
-rw-r--r--bl32/tsp/tsp.mk4
-rw-r--r--bl32/tsp/tsp_interrupt.c37
-rw-r--r--bl32/tsp/tsp_main.c90
-rw-r--r--bl32/tsp/tsp_private.h133
-rw-r--r--bl32/tsp/tsp_timer.c2
8 files changed, 213 insertions, 100 deletions
diff --git a/bl32/tsp/aarch64/tsp_entrypoint.S b/bl32/tsp/aarch64/tsp_entrypoint.S
index 002c41b8..8fae1b2b 100644
--- a/bl32/tsp/aarch64/tsp_entrypoint.S
+++ b/bl32/tsp/aarch64/tsp_entrypoint.S
@@ -32,6 +32,7 @@
#include <asm_macros.S>
#include <tsp.h>
#include <xlat_tables.h>
+#include "../tsp_private.h"
.globl tsp_entrypoint
@@ -127,8 +128,8 @@ func tsp_entrypoint
* specific early arch. setup e.g. mmu setup
* ---------------------------------------------
*/
- bl bl32_early_platform_setup
- bl bl32_plat_arch_setup
+ bl tsp_early_platform_setup
+ bl tsp_plat_arch_setup
/* ---------------------------------------------
* Jump to main function.
diff --git a/bl32/tsp/tsp-fvp.mk b/bl32/tsp/tsp-fvp.mk
deleted file mode 100644
index 3220c08f..00000000
--- a/bl32/tsp/tsp-fvp.mk
+++ /dev/null
@@ -1,38 +0,0 @@
-#
-# Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-#
-# Redistributions of source code must retain the above copyright notice, this
-# list of conditions and the following disclaimer.
-#
-# Redistributions in binary form must reproduce the above copyright notice,
-# this list of conditions and the following disclaimer in the documentation
-# and/or other materials provided with the distribution.
-#
-# Neither the name of ARM nor the names of its contributors may be used
-# to endorse or promote products derived from this software without specific
-# prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
-# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-
-# TSP source files specific to FVP platform
-BL32_SOURCES += drivers/arm/gic/arm_gic.c \
- drivers/arm/gic/gic_v2.c \
- plat/common/aarch64/platform_mp_stack.S \
- plat/common/plat_gic.c \
- plat/fvp/aarch64/fvp_common.c \
- plat/fvp/aarch64/fvp_helpers.S \
- plat/fvp/bl32_fvp_setup.c
diff --git a/bl32/tsp/tsp.ld.S b/bl32/tsp/tsp.ld.S
index 5807141f..5d7ffa11 100644
--- a/bl32/tsp/tsp.ld.S
+++ b/bl32/tsp/tsp.ld.S
@@ -68,8 +68,8 @@ SECTIONS
__DATA_END__ = .;
} >RAM
-#ifdef BL32_PROGBITS_LIMIT
- ASSERT(. <= BL32_PROGBITS_LIMIT, "BL3-2 progbits has exceeded its limit.")
+#ifdef TSP_PROGBITS_LIMIT
+ ASSERT(. <= TSP_PROGBITS_LIMIT, "TSP progbits has exceeded its limit.")
#endif
stacks (NOLOAD) : {
diff --git a/bl32/tsp/tsp.mk b/bl32/tsp/tsp.mk
index 02cc13d3..f17ef1e1 100644
--- a/bl32/tsp/tsp.mk
+++ b/bl32/tsp/tsp.mk
@@ -28,6 +28,8 @@
# POSSIBILITY OF SUCH DAMAGE.
#
+INCLUDES += -Iinclude/bl32/tsp
+
BL32_SOURCES += bl32/tsp/tsp_main.c \
bl32/tsp/aarch64/tsp_entrypoint.S \
bl32/tsp/aarch64/tsp_exceptions.S \
@@ -50,7 +52,7 @@ $(eval $(call add_define,TSP_INIT_ASYNC))
# Include the platform-specific TSP Makefile
# If no platform-specific TSP Makefile exists, it means TSP is not supported
# on this platform.
-TSP_PLAT_MAKEFILE := bl32/tsp/tsp-${PLAT}.mk
+TSP_PLAT_MAKEFILE := plat/${PLAT}/tsp/tsp-${PLAT}.mk
ifeq (,$(wildcard ${TSP_PLAT_MAKEFILE}))
$(error TSP is not supported on platform ${PLAT})
else
diff --git a/bl32/tsp/tsp_interrupt.c b/bl32/tsp/tsp_interrupt.c
index c1c9aad2..7163badd 100644
--- a/bl32/tsp/tsp_interrupt.c
+++ b/bl32/tsp/tsp_interrupt.c
@@ -32,9 +32,10 @@
#include <assert.h>
#include <debug.h>
#include <gic_v2.h>
-#include <tsp.h>
#include <platform.h>
#include <platform_def.h>
+#include <tsp.h>
+#include "tsp_private.h"
/*******************************************************************************
* This function updates the TSP statistics for FIQs handled synchronously i.e
@@ -55,14 +56,16 @@ void tsp_update_sync_fiq_stats(uint32_t type, uint64_t elr_el3)
if (type == TSP_HANDLE_FIQ_AND_RETURN)
tsp_stats[linear_id].sync_fiq_ret_count++;
+#if LOG_LEVEL >= LOG_LEVEL_VERBOSE
spin_lock(&console_lock);
- tf_printf("TSP: cpu 0x%x sync fiq request from 0x%llx \n\r",
- mpidr, elr_el3);
- INFO("cpu 0x%x: %d sync fiq requests, %d sync fiq returns\n",
- mpidr,
- tsp_stats[linear_id].sync_fiq_count,
- tsp_stats[linear_id].sync_fiq_ret_count);
+ VERBOSE("TSP: cpu 0x%x sync fiq request from 0x%llx\n",
+ mpidr, elr_el3);
+ VERBOSE("TSP: cpu 0x%x: %d sync fiq requests, %d sync fiq returns\n",
+ mpidr,
+ tsp_stats[linear_id].sync_fiq_count,
+ tsp_stats[linear_id].sync_fiq_ret_count);
spin_unlock(&console_lock);
+#endif
}
/*******************************************************************************
@@ -85,7 +88,7 @@ int32_t tsp_fiq_handler(void)
id = plat_ic_get_pending_interrupt_id();
/* TSP can only handle the secure physical timer interrupt */
- if (id != IRQ_SEC_PHY_TIMER)
+ if (id != TSP_IRQ_SEC_PHY_TIMER)
return TSP_EL3_FIQ;
/*
@@ -93,19 +96,20 @@ int32_t tsp_fiq_handler(void)
* another secure interrupt through an assertion.
*/
id = plat_ic_acknowledge_interrupt();
- assert(id == IRQ_SEC_PHY_TIMER);
+ assert(id == TSP_IRQ_SEC_PHY_TIMER);
tsp_generic_timer_handler();
plat_ic_end_of_interrupt(id);
/* Update the statistics and print some messages */
tsp_stats[linear_id].fiq_count++;
+#if LOG_LEVEL >= LOG_LEVEL_VERBOSE
spin_lock(&console_lock);
- tf_printf("TSP: cpu 0x%x handled fiq %d \n\r",
+ VERBOSE("TSP: cpu 0x%x handled fiq %d\n",
mpidr, id);
- INFO("cpu 0x%x: %d fiq requests \n",
+ VERBOSE("TSP: cpu 0x%x: %d fiq requests\n",
mpidr, tsp_stats[linear_id].fiq_count);
spin_unlock(&console_lock);
-
+#endif
return 0;
}
@@ -115,11 +119,12 @@ int32_t tsp_irq_received(void)
uint32_t linear_id = platform_get_core_pos(mpidr);
tsp_stats[linear_id].irq_count++;
+#if LOG_LEVEL >= LOG_LEVEL_VERBOSE
spin_lock(&console_lock);
- tf_printf("TSP: cpu 0x%x received irq\n\r", mpidr);
- INFO("cpu 0x%x: %d irq requests \n",
- mpidr, tsp_stats[linear_id].irq_count);
+ VERBOSE("TSP: cpu 0x%x received irq\n", mpidr);
+ VERBOSE("TSP: cpu 0x%x: %d irq requests\n",
+ mpidr, tsp_stats[linear_id].irq_count);
spin_unlock(&console_lock);
-
+#endif
return TSP_PREEMPTED;
}
diff --git a/bl32/tsp/tsp_main.c b/bl32/tsp/tsp_main.c
index b2850e9d..08d89c3d 100644
--- a/bl32/tsp/tsp_main.c
+++ b/bl32/tsp/tsp_main.c
@@ -33,8 +33,10 @@
#include <debug.h>
#include <platform.h>
#include <platform_def.h>
+#include <platform_tsp.h>
#include <spinlock.h>
#include <tsp.h>
+#include "tsp_private.h"
/*******************************************************************************
* Declarations of linker defined symbols which will help us find the layout
@@ -105,11 +107,17 @@ static tsp_args_t *set_smc_args(uint64_t arg0,
******************************************************************************/
uint64_t tsp_main(void)
{
+ NOTICE("TSP: %s\n", version_string);
+ NOTICE("TSP: %s\n", build_message);
+ INFO("TSP: Total memory base : 0x%x\n", (unsigned long)BL32_TOTAL_BASE);
+ INFO("TSP: Total memory size : 0x%x bytes\n",
+ (unsigned long)(BL32_TOTAL_LIMIT - BL32_TOTAL_BASE));
+
uint64_t mpidr = read_mpidr();
uint32_t linear_id = platform_get_core_pos(mpidr);
/* Initialize the platform */
- bl32_platform_setup();
+ tsp_platform_setup();
/* Initialize secure/applications state here */
tsp_generic_timer_start();
@@ -119,18 +127,14 @@ uint64_t tsp_main(void)
tsp_stats[linear_id].eret_count++;
tsp_stats[linear_id].cpu_on_count++;
+#if LOG_LEVEL >= LOG_LEVEL_INFO
spin_lock(&console_lock);
- tf_printf("TSP %s\n", version_string);
- tf_printf("TSP %s\n", build_message);
- INFO("Total memory base : 0x%x\n", (unsigned long)BL32_TOTAL_BASE);
- INFO("Total memory size : 0x%x bytes\n",
- (unsigned long)(BL32_TOTAL_LIMIT - BL32_TOTAL_BASE));
- INFO("cpu 0x%x: %d smcs, %d erets %d cpu on requests\n", mpidr,
+ INFO("TSP: cpu 0x%x: %d smcs, %d erets %d cpu on requests\n", mpidr,
tsp_stats[linear_id].smc_count,
tsp_stats[linear_id].eret_count,
tsp_stats[linear_id].cpu_on_count);
spin_unlock(&console_lock);
-
+#endif
return (uint64_t) &tsp_vector_table;
}
@@ -152,14 +156,15 @@ tsp_args_t *tsp_cpu_on_main(void)
tsp_stats[linear_id].eret_count++;
tsp_stats[linear_id].cpu_on_count++;
+#if LOG_LEVEL >= LOG_LEVEL_INFO
spin_lock(&console_lock);
- tf_printf("SP: cpu 0x%x turned on\n\r", mpidr);
- INFO("cpu 0x%x: %d smcs, %d erets %d cpu on requests\n", mpidr,
- tsp_stats[linear_id].smc_count,
- tsp_stats[linear_id].eret_count,
- tsp_stats[linear_id].cpu_on_count);
+ INFO("TSP: cpu 0x%x turned on\n", mpidr);
+ INFO("TSP: cpu 0x%x: %d smcs, %d erets %d cpu on requests\n", mpidr,
+ tsp_stats[linear_id].smc_count,
+ tsp_stats[linear_id].eret_count,
+ tsp_stats[linear_id].cpu_on_count);
spin_unlock(&console_lock);
-
+#endif
/* Indicate to the SPD that we have completed turned ourselves on */
return set_smc_args(TSP_ON_DONE, 0, 0, 0, 0, 0, 0, 0);
}
@@ -192,14 +197,15 @@ tsp_args_t *tsp_cpu_off_main(uint64_t arg0,
tsp_stats[linear_id].eret_count++;
tsp_stats[linear_id].cpu_off_count++;
+#if LOG_LEVEL >= LOG_LEVEL_INFO
spin_lock(&console_lock);
- tf_printf("SP: cpu 0x%x off request\n\r", mpidr);
- INFO("cpu 0x%x: %d smcs, %d erets %d cpu off requests\n", mpidr,
- tsp_stats[linear_id].smc_count,
- tsp_stats[linear_id].eret_count,
- tsp_stats[linear_id].cpu_off_count);
+ INFO("TSP: cpu 0x%x off request\n", mpidr);
+ INFO("TSP: cpu 0x%x: %d smcs, %d erets %d cpu off requests\n", mpidr,
+ tsp_stats[linear_id].smc_count,
+ tsp_stats[linear_id].eret_count,
+ tsp_stats[linear_id].cpu_off_count);
spin_unlock(&console_lock);
-
+#endif
/* Indicate to the SPD that we have completed this request */
return set_smc_args(TSP_OFF_DONE, 0, 0, 0, 0, 0, 0, 0);
@@ -234,14 +240,17 @@ tsp_args_t *tsp_cpu_suspend_main(uint64_t power_state,
tsp_stats[linear_id].eret_count++;
tsp_stats[linear_id].cpu_suspend_count++;
+#if LOG_LEVEL >= LOG_LEVEL_INFO
spin_lock(&console_lock);
- tf_printf("SP: cpu 0x%x suspend request. power state: 0x%x\n\r",
- mpidr, power_state);
- INFO("cpu 0x%x: %d smcs, %d erets %d cpu suspend requests\n", mpidr,
- tsp_stats[linear_id].smc_count,
- tsp_stats[linear_id].eret_count,
- tsp_stats[linear_id].cpu_suspend_count);
+ INFO("TSP: cpu 0x%x suspend request. power state: 0x%x\n",
+ mpidr, power_state);
+ INFO("TSP: cpu 0x%x: %d smcs, %d erets %d cpu suspend requests\n",
+ mpidr,
+ tsp_stats[linear_id].smc_count,
+ tsp_stats[linear_id].eret_count,
+ tsp_stats[linear_id].cpu_suspend_count);
spin_unlock(&console_lock);
+#endif
/* Indicate to the SPD that we have completed this request */
return set_smc_args(TSP_SUSPEND_DONE, 0, 0, 0, 0, 0, 0, 0);
@@ -272,15 +281,17 @@ tsp_args_t *tsp_cpu_resume_main(uint64_t suspend_level,
tsp_stats[linear_id].eret_count++;
tsp_stats[linear_id].cpu_resume_count++;
+#if LOG_LEVEL >= LOG_LEVEL_INFO
spin_lock(&console_lock);
- tf_printf("SP: cpu 0x%x resumed. suspend level %d \n\r",
- mpidr, suspend_level);
- INFO("cpu 0x%x: %d smcs, %d erets %d cpu suspend requests\n", mpidr,
- tsp_stats[linear_id].smc_count,
- tsp_stats[linear_id].eret_count,
- tsp_stats[linear_id].cpu_suspend_count);
+ INFO("TSP: cpu 0x%x resumed. suspend level %d\n",
+ mpidr, suspend_level);
+ INFO("TSP: cpu 0x%x: %d smcs, %d erets %d cpu suspend requests\n",
+ mpidr,
+ tsp_stats[linear_id].smc_count,
+ tsp_stats[linear_id].eret_count,
+ tsp_stats[linear_id].cpu_suspend_count);
spin_unlock(&console_lock);
-
+#endif
/* Indicate to the SPD that we have completed this request */
return set_smc_args(TSP_RESUME_DONE, 0, 0, 0, 0, 0, 0, 0);
}
@@ -304,18 +315,17 @@ tsp_args_t *tsp_smc_handler(uint64_t func,
uint64_t service_args[2];
uint64_t mpidr = read_mpidr();
uint32_t linear_id = platform_get_core_pos(mpidr);
- const char *smc_type;
/* Update this cpu's statistics */
tsp_stats[linear_id].smc_count++;
tsp_stats[linear_id].eret_count++;
- smc_type = ((func >> 31) & 1) == 1 ? "fast" : "standard";
-
- tf_printf("SP: cpu 0x%x received %s smc 0x%x\n", read_mpidr(), smc_type, func);
- INFO("cpu 0x%x: %d smcs, %d erets\n", mpidr,
- tsp_stats[linear_id].smc_count,
- tsp_stats[linear_id].eret_count);
+ INFO("TSP: cpu 0x%x received %s smc 0x%x\n", read_mpidr(),
+ ((func >> 31) & 1) == 1 ? "fast" : "standard",
+ func);
+ INFO("TSP: cpu 0x%x: %d smcs, %d erets\n", mpidr,
+ tsp_stats[linear_id].smc_count,
+ tsp_stats[linear_id].eret_count);
/* Render secure services and obtain results here */
results[0] = arg1;
diff --git a/bl32/tsp/tsp_private.h b/bl32/tsp/tsp_private.h
new file mode 100644
index 00000000..39fb5f66
--- /dev/null
+++ b/bl32/tsp/tsp_private.h
@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __TSP_PRIVATE_H__
+#define __TSP_PRIVATE_H__
+
+/* Definitions to help the assembler access the SMC/ERET args structure */
+#define TSP_ARGS_SIZE 0x40
+#define TSP_ARG0 0x0
+#define TSP_ARG1 0x8
+#define TSP_ARG2 0x10
+#define TSP_ARG3 0x18
+#define TSP_ARG4 0x20
+#define TSP_ARG5 0x28
+#define TSP_ARG6 0x30
+#define TSP_ARG7 0x38
+#define TSP_ARGS_END 0x40
+
+
+#ifndef __ASSEMBLY__
+
+#include <cassert.h>
+#include <platform_def.h> /* For CACHE_WRITEBACK_GRANULE */
+#include <spinlock.h>
+#include <stdint.h>
+#include <tsp.h>
+
+
+typedef struct work_statistics {
+ uint32_t fiq_count; /* Number of FIQs on this cpu */
+ uint32_t irq_count; /* Number of IRQs on this cpu */
+ uint32_t sync_fiq_count; /* Number of sync. fiqs on this cpu */
+ uint32_t sync_fiq_ret_count; /* Number of fiq returns on this cpu */
+ uint32_t smc_count; /* Number of returns on this cpu */
+ uint32_t eret_count; /* Number of entries on this cpu */
+ uint32_t cpu_on_count; /* Number of cpu on requests */
+ uint32_t cpu_off_count; /* Number of cpu off requests */
+ uint32_t cpu_suspend_count; /* Number of cpu suspend requests */
+ uint32_t cpu_resume_count; /* Number of cpu resume requests */
+} __aligned(CACHE_WRITEBACK_GRANULE) work_statistics_t;
+
+typedef struct tsp_args {
+ uint64_t _regs[TSP_ARGS_END >> 3];
+} __aligned(CACHE_WRITEBACK_GRANULE) tsp_args_t;
+
+/* Macros to access members of the above structure using their offsets */
+#define read_sp_arg(args, offset) ((args)->_regs[offset >> 3])
+#define write_sp_arg(args, offset, val) (((args)->_regs[offset >> 3]) \
+ = val)
+/*
+ * Ensure that the assembler's view of the size of the tsp_args is the
+ * same as the compilers
+ */
+CASSERT(TSP_ARGS_SIZE == sizeof(tsp_args_t), assert_sp_args_size_mismatch);
+
+void tsp_get_magic(uint64_t args[4]);
+
+tsp_args_t *tsp_cpu_resume_main(uint64_t arg0,
+ uint64_t arg1,
+ uint64_t arg2,
+ uint64_t arg3,
+ uint64_t arg4,
+ uint64_t arg5,
+ uint64_t arg6,
+ uint64_t arg7);
+tsp_args_t *tsp_cpu_suspend_main(uint64_t arg0,
+ uint64_t arg1,
+ uint64_t arg2,
+ uint64_t arg3,
+ uint64_t arg4,
+ uint64_t arg5,
+ uint64_t arg6,
+ uint64_t arg7);
+tsp_args_t *tsp_cpu_on_main(void);
+tsp_args_t *tsp_cpu_off_main(uint64_t arg0,
+ uint64_t arg1,
+ uint64_t arg2,
+ uint64_t arg3,
+ uint64_t arg4,
+ uint64_t arg5,
+ uint64_t arg6,
+ uint64_t arg7);
+
+/* Generic Timer functions */
+void tsp_generic_timer_start(void);
+void tsp_generic_timer_handler(void);
+void tsp_generic_timer_stop(void);
+void tsp_generic_timer_save(void);
+void tsp_generic_timer_restore(void);
+
+/* FIQ management functions */
+void tsp_update_sync_fiq_stats(uint32_t type, uint64_t elr_el3);
+
+
+/* Data structure to keep track of TSP statistics */
+extern spinlock_t console_lock;
+extern work_statistics_t tsp_stats[PLATFORM_CORE_COUNT];
+
+/* Vector table of jumps */
+extern tsp_vectors_t tsp_vector_table;
+
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __TSP_PRIVATE_H__ */
+
diff --git a/bl32/tsp/tsp_timer.c b/bl32/tsp/tsp_timer.c
index a7fdfdaf..d9460b69 100644
--- a/bl32/tsp/tsp_timer.c
+++ b/bl32/tsp/tsp_timer.c
@@ -30,7 +30,7 @@
#include <arch_helpers.h>
#include <assert.h>
#include <platform.h>
-#include <tsp.h>
+#include "tsp_private.h"
/*******************************************************************************
* Data structure to keep track of per-cpu secure generic timer context across
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-20 10:55:05 +0000