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-rw-r--r--docs/porting-guide.md13
1 files changed, 8 insertions, 5 deletions
diff --git a/docs/porting-guide.md b/docs/porting-guide.md
index 6bba3604..5dca6fd5 100644
--- a/docs/porting-guide.md
+++ b/docs/porting-guide.md
@@ -208,6 +208,13 @@ the implementer chooses. In the ARM FVP port, they are implemented in
platform) & `platform_get_stack()` (to return the base address of that
stack) (see [../plat/common/aarch64/platform_helpers.S]).
+* **Function : uint64_t plat_get_syscnt_freq(void)**
+
+ This function is used by the architecture setup code to retrieve the
+ counter frequency for the CPU's generic timer. This value will be
+ programmed into the `CNTFRQ_EL0` register.
+ In the ARM FVP port, it returns the base frequency of the system counter,
+ which is retrieved from the first entry in the frequency modes table.
2.2 Common optional modifications
---------------------------------
@@ -446,10 +453,6 @@ This function executes with the MMU and data caches enabled. It is responsible
for performing any remaining platform-specific setup that can occur after the
MMU and data cache have been enabled.
-In the ARM FVP port, this function enables system-level implementation of the
-generic timer counter. It also initializes counter frequency for CPU's generic
-timers.
-
This function is also responsible for initializing the storage abstraction layer
which is used to load further bootloader images.
@@ -772,7 +775,7 @@ BL3-1 runtime services and normal world software can function correctly.
The ARM FVP port does the following:
* Initializes the generic interrupt controller.
* Configures the CLCD controller.
-* Initializes counter frequency for CPU's generic timer
+* Enables system-level implementation of the generic timer counter.
* Grants access to the system counter timer module
* Initializes the FVP power controller device
* Detects the system topology.