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Diffstat (limited to 'docs/user-guide.md')
| -rw-r--r-- | docs/user-guide.md | 80 |
1 files changed, 54 insertions, 26 deletions
diff --git a/docs/user-guide.md b/docs/user-guide.md index ef5de714..532236a6 100644 --- a/docs/user-guide.md +++ b/docs/user-guide.md @@ -51,10 +51,10 @@ The following tools are required to use the ARM Trusted Firmware: * Baremetal GNU GCC tools. Verified packages can be downloaded from [Linaro] [Linaro Toolchain]. The rest of this document assumes that the - `gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz` tools are used. + `gcc-linaro-aarch64-none-elf-4.9-2014.07_linux.tar.xz` tools are used. - wget http://releases.linaro.org/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz - tar -xf gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + wget http://releases.linaro.org/14.07/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.9-2014.07_linux.tar.xz + tar -xf gcc-linaro-aarch64-none-elf-4.9-2014.07_linux.tar.xz * The Device Tree Compiler (DTC) included with Linux kernel 3.15-rc6 is used to build the Flattened Device Tree (FDT) source files (`.dts` files) @@ -133,6 +133,8 @@ the build system doesn't track dependency for build options. Therefore, if any of the build options are changed from a previous build, a clean build must be performed. +#### Common build options + * `BL30`: Path to BL3-0 image in the host file system. This image is optional. If a BL3-0 image is present then this option must be passed for the `fip` target @@ -146,6 +148,19 @@ performed. * `DEBUG`: Chooses between a debug and release build. It can take either 0 (release) or 1 (debug) as values. 0 is the default +* `LOG_LEVEL`: Chooses the log level, which controls the amount of console log + output compiled into the build. This should be one of the following: + + 0 (LOG_LEVEL_NONE) + 10 (LOG_LEVEL_NOTICE) + 20 (LOG_LEVEL_ERROR) + 30 (LOG_LEVEL_WARNING) + 40 (LOG_LEVEL_INFO) + 50 (LOG_LEVEL_VERBOSE) + + All log output up to and including the log level is compiled into the build. + The default value is 40 in debug builds and 20 in release builds. + * `NS_TIMER_SWITCH`: Enable save and restore for non-secure timer register contents upon world switch. It can take either 0 (don't save and restore) or 1 (do save and restore). 0 is the default. An SPD could set this to 1 if it @@ -192,6 +207,19 @@ performed. synchronous method) or 1 (BL3-2 is initialized using asynchronous method). Default is 0. +#### FVP specific build options + +* `FVP_SHARED_DATA_LOCATION`: location of the shared memory page. Available + options: + - 'tsram' (default) : top of Trusted SRAM + - 'tdram' : base of Trusted DRAM + +* `FVP_TSP_RAM_LOCATION`: location of the TSP binary. Options: + - 'tsram' (default) : base of Trusted SRAM + - 'tdram' : Trusted DRAM (above shared data) + +For a better understanding of FVP options, the FVP memory map is detailed in +[Firmware Design]. ### Creating a Firmware Image Package @@ -314,11 +342,11 @@ The Firmware Package contains this new image: On FVP, the TSP binary runs from Trusted SRAM by default. It is also possible to run it from Trusted DRAM. This is controlled by the build configuration -`TSP_RAM_LOCATION`: +`FVP_TSP_RAM_LOCATION`: CROSS_COMPILE=<path-to-aarch64-gcc>/bin/aarch64-none-elf- \ BL33=<path-to>/<bl33_image> \ - make PLAT=fvp SPD=tspd TSP_RAM_LOCATION=tdram all fip + make PLAT=fvp SPD=tspd FVP_TSP_RAM_LOCATION=tdram all fip ### Checking source code style @@ -719,16 +747,16 @@ vector for each core. -C cluster1.NUM_CORES=4 \ -C cache_state_modelled=1 \ -C bp.pl011_uart0.untimed_fifos=1 \ - -C cluster0.cpu0.RVBAR=0x04006000 \ - -C cluster0.cpu1.RVBAR=0x04006000 \ - -C cluster0.cpu2.RVBAR=0x04006000 \ - -C cluster0.cpu3.RVBAR=0x04006000 \ - -C cluster1.cpu0.RVBAR=0x04006000 \ - -C cluster1.cpu1.RVBAR=0x04006000 \ - -C cluster1.cpu2.RVBAR=0x04006000 \ - -C cluster1.cpu3.RVBAR=0x04006000 \ - --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04006000 \ - --data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04024000 \ + -C cluster0.cpu0.RVBAR=0x04023000 \ + -C cluster0.cpu1.RVBAR=0x04023000 \ + -C cluster0.cpu2.RVBAR=0x04023000 \ + -C cluster0.cpu3.RVBAR=0x04023000 \ + -C cluster1.cpu0.RVBAR=0x04023000 \ + -C cluster1.cpu1.RVBAR=0x04023000 \ + -C cluster1.cpu2.RVBAR=0x04023000 \ + -C cluster1.cpu3.RVBAR=0x04023000 \ + --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04023000 \ + --data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04000000 \ --data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000 \ -C bp.virtioblockdevice.image_path="<path-to>/<file-system-image>" @@ -750,16 +778,16 @@ vector for each core. -C bp.tzc_400.diagnostics=1 \ -C cache_state_modelled=1 \ -C bp.pl011_uart0.untimed_fifos=1 \ - -C cluster0.cpu0.RVBARADDR=0x04006000 \ - -C cluster0.cpu1.RVBARADDR=0x04006000 \ - -C cluster0.cpu2.RVBARADDR=0x04006000 \ - -C cluster0.cpu3.RVBARADDR=0x04006000 \ - -C cluster1.cpu0.RVBARADDR=0x04006000 \ - -C cluster1.cpu1.RVBARADDR=0x04006000 \ - -C cluster1.cpu2.RVBARADDR=0x04006000 \ - -C cluster1.cpu3.RVBARADDR=0x04006000 \ - --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04006000 \ - --data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04024000 \ + -C cluster0.cpu0.RVBARADDR=0x04023000 \ + -C cluster0.cpu1.RVBARADDR=0x04023000 \ + -C cluster0.cpu2.RVBARADDR=0x04023000 \ + -C cluster0.cpu3.RVBARADDR=0x04023000 \ + -C cluster1.cpu0.RVBARADDR=0x04023000 \ + -C cluster1.cpu1.RVBARADDR=0x04023000 \ + -C cluster1.cpu2.RVBARADDR=0x04023000 \ + -C cluster1.cpu3.RVBARADDR=0x04023000 \ + --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04023000 \ + --data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04000000 \ --data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000 \ -C bp.virtioblockdevice.image_path="<path-to>/<file-system-image>" @@ -852,6 +880,6 @@ _Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved._ [Firmware Design]: ./firmware-design.md [ARM FVP website]: http://www.arm.com/fvp -[Linaro Toolchain]: http://releases.linaro.org/13.11/components/toolchain/binaries/ +[Linaro Toolchain]: http://releases.linaro.org/14.07/components/toolchain/binaries/ [EDK2]: http://github.com/tianocore/edk2 [DS-5]: http://www.arm.com/products/tools/software-tools/ds-5/index.php |