diff options
Diffstat (limited to 'docs')
-rw-r--r-- | docs/firmware-design.md | 5 | ||||
-rw-r--r-- | docs/user-guide.md | 61 |
2 files changed, 42 insertions, 24 deletions
diff --git a/docs/firmware-design.md b/docs/firmware-design.md index ed702a86..e98c4fa9 100644 --- a/docs/firmware-design.md +++ b/docs/firmware-design.md @@ -1299,6 +1299,11 @@ categories. Based upon the above, the code layout looks like this: lib Yes Yes Yes services No No Yes +The build system provides a non configurable build option IMAGE_BLx for each +boot loader stage (where x = BL stage). e.g. for BL1 , IMAGE_BL1 will be +defined by the build system. This enables the Trusted Firmware to compile +certain code only for specific boot loader stages + All assembler files have the `.S` extension. The linker source files for each boot stage have the extension `.ld.S`. These are processed by GCC to create the linker scripts which have the extension `.ld`. diff --git a/docs/user-guide.md b/docs/user-guide.md index fe9afb46..532236a6 100644 --- a/docs/user-guide.md +++ b/docs/user-guide.md @@ -51,10 +51,10 @@ The following tools are required to use the ARM Trusted Firmware: * Baremetal GNU GCC tools. Verified packages can be downloaded from [Linaro] [Linaro Toolchain]. The rest of this document assumes that the - `gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz` tools are used. + `gcc-linaro-aarch64-none-elf-4.9-2014.07_linux.tar.xz` tools are used. - wget http://releases.linaro.org/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz - tar -xf gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + wget http://releases.linaro.org/14.07/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.9-2014.07_linux.tar.xz + tar -xf gcc-linaro-aarch64-none-elf-4.9-2014.07_linux.tar.xz * The Device Tree Compiler (DTC) included with Linux kernel 3.15-rc6 is used to build the Flattened Device Tree (FDT) source files (`.dts` files) @@ -148,6 +148,19 @@ performed. * `DEBUG`: Chooses between a debug and release build. It can take either 0 (release) or 1 (debug) as values. 0 is the default +* `LOG_LEVEL`: Chooses the log level, which controls the amount of console log + output compiled into the build. This should be one of the following: + + 0 (LOG_LEVEL_NONE) + 10 (LOG_LEVEL_NOTICE) + 20 (LOG_LEVEL_ERROR) + 30 (LOG_LEVEL_WARNING) + 40 (LOG_LEVEL_INFO) + 50 (LOG_LEVEL_VERBOSE) + + All log output up to and including the log level is compiled into the build. + The default value is 40 in debug builds and 20 in release builds. + * `NS_TIMER_SWITCH`: Enable save and restore for non-secure timer register contents upon world switch. It can take either 0 (don't save and restore) or 1 (do save and restore). 0 is the default. An SPD could set this to 1 if it @@ -734,16 +747,16 @@ vector for each core. -C cluster1.NUM_CORES=4 \ -C cache_state_modelled=1 \ -C bp.pl011_uart0.untimed_fifos=1 \ - -C cluster0.cpu0.RVBAR=0x04006000 \ - -C cluster0.cpu1.RVBAR=0x04006000 \ - -C cluster0.cpu2.RVBAR=0x04006000 \ - -C cluster0.cpu3.RVBAR=0x04006000 \ - -C cluster1.cpu0.RVBAR=0x04006000 \ - -C cluster1.cpu1.RVBAR=0x04006000 \ - -C cluster1.cpu2.RVBAR=0x04006000 \ - -C cluster1.cpu3.RVBAR=0x04006000 \ - --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04006000 \ - --data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04024000 \ + -C cluster0.cpu0.RVBAR=0x04023000 \ + -C cluster0.cpu1.RVBAR=0x04023000 \ + -C cluster0.cpu2.RVBAR=0x04023000 \ + -C cluster0.cpu3.RVBAR=0x04023000 \ + -C cluster1.cpu0.RVBAR=0x04023000 \ + -C cluster1.cpu1.RVBAR=0x04023000 \ + -C cluster1.cpu2.RVBAR=0x04023000 \ + -C cluster1.cpu3.RVBAR=0x04023000 \ + --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04023000 \ + --data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04000000 \ --data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000 \ -C bp.virtioblockdevice.image_path="<path-to>/<file-system-image>" @@ -765,16 +778,16 @@ vector for each core. -C bp.tzc_400.diagnostics=1 \ -C cache_state_modelled=1 \ -C bp.pl011_uart0.untimed_fifos=1 \ - -C cluster0.cpu0.RVBARADDR=0x04006000 \ - -C cluster0.cpu1.RVBARADDR=0x04006000 \ - -C cluster0.cpu2.RVBARADDR=0x04006000 \ - -C cluster0.cpu3.RVBARADDR=0x04006000 \ - -C cluster1.cpu0.RVBARADDR=0x04006000 \ - -C cluster1.cpu1.RVBARADDR=0x04006000 \ - -C cluster1.cpu2.RVBARADDR=0x04006000 \ - -C cluster1.cpu3.RVBARADDR=0x04006000 \ - --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04006000 \ - --data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04024000 \ + -C cluster0.cpu0.RVBARADDR=0x04023000 \ + -C cluster0.cpu1.RVBARADDR=0x04023000 \ + -C cluster0.cpu2.RVBARADDR=0x04023000 \ + -C cluster0.cpu3.RVBARADDR=0x04023000 \ + -C cluster1.cpu0.RVBARADDR=0x04023000 \ + -C cluster1.cpu1.RVBARADDR=0x04023000 \ + -C cluster1.cpu2.RVBARADDR=0x04023000 \ + -C cluster1.cpu3.RVBARADDR=0x04023000 \ + --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04023000 \ + --data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04000000 \ --data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000 \ -C bp.virtioblockdevice.image_path="<path-to>/<file-system-image>" @@ -867,6 +880,6 @@ _Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved._ [Firmware Design]: ./firmware-design.md [ARM FVP website]: http://www.arm.com/fvp -[Linaro Toolchain]: http://releases.linaro.org/13.11/components/toolchain/binaries/ +[Linaro Toolchain]: http://releases.linaro.org/14.07/components/toolchain/binaries/ [EDK2]: http://github.com/tianocore/edk2 [DS-5]: http://www.arm.com/products/tools/software-tools/ds-5/index.php |