diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/common/aarch32/asm_macros.S | 16 | ||||
-rw-r--r-- | include/common/aarch64/asm_macros.S | 14 | ||||
-rw-r--r-- | include/common/ep_info.h | 47 | ||||
-rw-r--r-- | include/lib/aarch32/arch.h | 2 | ||||
-rw-r--r-- | include/lib/smccc.h | 19 | ||||
-rw-r--r-- | include/lib/utils_def.h | 4 | ||||
-rw-r--r-- | include/lib/xlat_tables/xlat_mmu_helpers.h | 5 | ||||
-rw-r--r-- | include/lib/xlat_tables/xlat_tables_v2.h | 4 | ||||
-rw-r--r-- | include/lib/xlat_tables/xlat_tables_v2_helpers.h | 16 | ||||
-rw-r--r-- | include/plat/arm/board/common/board_arm_def.h | 8 | ||||
-rw-r--r-- | include/plat/arm/css/common/css_pm.h | 12 | ||||
-rw-r--r-- | include/tools_share/firmware_image_package.h | 56 | ||||
-rw-r--r-- | include/tools_share/uuid.h | 6 |
13 files changed, 137 insertions, 72 deletions
diff --git a/include/common/aarch32/asm_macros.S b/include/common/aarch32/asm_macros.S index 74322228..f7d0595e 100644 --- a/include/common/aarch32/asm_macros.S +++ b/include/common/aarch32/asm_macros.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -10,6 +10,20 @@ #include <asm_macros_common.S> #include <spinlock.h> +/* + * TLBI instruction with type specifier that implements the workaround for + * errata 813419 of Cortex-A57. + */ +#if ERRATA_A57_813419 +#define TLB_INVALIDATE(_reg, _coproc) \ + stcopr _reg, _coproc; \ + dsb ish; \ + stcopr _reg, _coproc +#else +#define TLB_INVALIDATE(_reg, _coproc) \ + stcopr _reg, _coproc +#endif + #define WORD_SIZE 4 /* diff --git a/include/common/aarch64/asm_macros.S b/include/common/aarch64/asm_macros.S index 7c8e643d..5b050455 100644 --- a/include/common/aarch64/asm_macros.S +++ b/include/common/aarch64/asm_macros.S @@ -10,6 +10,20 @@ #include <asm_macros_common.S> #include <spinlock.h> +/* + * TLBI instruction with type specifier that implements the workaround for + * errata 813419 of Cortex-A57. + */ +#if ERRATA_A57_813419 +#define TLB_INVALIDATE(_type) \ + tlbi _type; \ + dsb ish; \ + tlbi _type +#else +#define TLB_INVALIDATE(_type) \ + tlbi _type +#endif + .macro func_prologue stp x29, x30, [sp, #-0x10]! diff --git a/include/common/ep_info.h b/include/common/ep_info.h index 3c2fe444..99a03906 100644 --- a/include/common/ep_info.h +++ b/include/common/ep_info.h @@ -29,33 +29,38 @@ /* The following are used to set/get image attributes. */ #define PARAM_EP_SECURITY_MASK U(0x1) +/* Secure or Non-secure image */ #define GET_SECURITY_STATE(x) (x & PARAM_EP_SECURITY_MASK) #define SET_SECURITY_STATE(x, security) \ ((x) = ((x) & ~PARAM_EP_SECURITY_MASK) | (security)) -#define EP_EE_MASK U(0x2) -#define EP_EE_SHIFT 1 -#define EP_EE_LITTLE U(0x0) -#define EP_EE_BIG U(0x2) -#define EP_GET_EE(x) (x & EP_EE_MASK) -#define EP_SET_EE(x, ee) ((x) = ((x) & ~EP_EE_MASK) | (ee)) - -#define EP_ST_MASK U(0x4) -#define EP_ST_DISABLE U(0x0) -#define EP_ST_ENABLE U(0x4) -#define EP_GET_ST(x) (x & EP_ST_MASK) -#define EP_SET_ST(x, ee) ((x) = ((x) & ~EP_ST_MASK) | (ee)) - -#define EP_EXE_MASK U(0x8) -#define NON_EXECUTABLE U(0x0) -#define EXECUTABLE U(0x8) -#define EP_GET_EXE(x) (x & EP_EXE_MASK) -#define EP_SET_EXE(x, ee) ((x) = ((x) & ~EP_EXE_MASK) | (ee)) - +/* Endianness of the image. */ +#define EP_EE_MASK U(0x2) +#define EP_EE_SHIFT U(1) +#define EP_EE_LITTLE U(0x0) +#define EP_EE_BIG U(0x2) +#define EP_GET_EE(x) ((x) & EP_EE_MASK) +#define EP_SET_EE(x, ee) ((x) = ((x) & ~EP_EE_MASK) | (ee)) + +/* Enable or disable access to the secure timer from secure images. */ +#define EP_ST_MASK U(0x4) +#define EP_ST_DISABLE U(0x0) +#define EP_ST_ENABLE U(0x4) +#define EP_GET_ST(x) ((x) & EP_ST_MASK) +#define EP_SET_ST(x, ee) ((x) = ((x) & ~EP_ST_MASK) | (ee)) + +/* Determine if an image is executable or not. */ +#define EP_EXE_MASK U(0x8) +#define NON_EXECUTABLE U(0x0) +#define EXECUTABLE U(0x8) +#define EP_GET_EXE(x) ((x) & EP_EXE_MASK) +#define EP_SET_EXE(x, ee) ((x) = ((x) & ~EP_EXE_MASK) | (ee)) + +/* Flag to indicate the first image that is executed. */ #define EP_FIRST_EXE_MASK U(0x10) #define EP_FIRST_EXE U(0x10) -#define EP_GET_FIRST_EXE(x) ((x) & EP_FIRST_EXE_MASK) -#define EP_SET_FIRST_EXE(x, ee) ((x) = ((x) & ~EP_FIRST_EXE_MASK) | (ee)) +#define EP_GET_FIRST_EXE(x) ((x) & EP_FIRST_EXE_MASK) +#define EP_SET_FIRST_EXE(x, ee) ((x) = ((x) & ~EP_FIRST_EXE_MASK) | (ee)) #ifndef __ASSEMBLY__ diff --git a/include/lib/aarch32/arch.h b/include/lib/aarch32/arch.h index 910341a7..a940b63b 100644 --- a/include/lib/aarch32/arch.h +++ b/include/lib/aarch32/arch.h @@ -340,7 +340,7 @@ /* * TTBR definitions */ -#define TTBR_CNP_BIT 0x1 +#define TTBR_CNP_BIT U(0x1) /* * CTR definitions diff --git a/include/lib/smccc.h b/include/lib/smccc.h index 660c1dbd..cb722b0e 100644 --- a/include/lib/smccc.h +++ b/include/lib/smccc.h @@ -57,6 +57,7 @@ * does not equal SMC_UNK. This is to ensure that the caller won't mistake the * returned UUID in x0 for an invalid SMC error return */ +#if !ERROR_DEPRECATED #define DEFINE_SVC_UUID(_name, _tl, _tm, _th, _cl, _ch, \ _n0, _n1, _n2, _n3, _n4, _n5) \ CASSERT((uint32_t)(_tl) != (uint32_t) SMC_UNK, invalid_svc_uuid);\ @@ -64,6 +65,24 @@ _tl, _tm, _th, _cl, _ch, \ { _n0, _n1, _n2, _n3, _n4, _n5 } \ } +#endif + + +#define DEFINE_SVC_UUID2(_name, _tl, _tm, _th, _cl, _ch, \ + _n0, _n1, _n2, _n3, _n4, _n5) \ + CASSERT((uint32_t)(_tl) != (uint32_t) SMC_UNK, invalid_svc_uuid);\ + static const uuid_t _name = { \ + {(_tl >> 24) & 0xFF, \ + (_tl >> 16) & 0xFF, \ + (_tl >> 8) & 0xFF, \ + (_tl & 0xFF)}, \ + {(_tm >> 8) & 0xFF, \ + (_tm & 0xFF)}, \ + {(_th >> 8) & 0xFF, \ + (_th & 0xFF)}, \ + _cl, _ch, \ + { _n0, _n1, _n2, _n3, _n4, _n5 } \ + } #endif /*__ASSEMBLY__*/ #endif /* __SMCCC_H__ */ diff --git a/include/lib/utils_def.h b/include/lib/utils_def.h index 7335103b..1bdf3c4b 100644 --- a/include/lib/utils_def.h +++ b/include/lib/utils_def.h @@ -127,8 +127,8 @@ * expected. */ #define ARM_ARCH_AT_LEAST(_maj, _min) \ - ((ARM_ARCH_MAJOR > _maj) || \ - ((ARM_ARCH_MAJOR == _maj) && (ARM_ARCH_MINOR >= _min))) + ((ARM_ARCH_MAJOR > (_maj)) || \ + ((ARM_ARCH_MAJOR == (_maj)) && (ARM_ARCH_MINOR >= (_min)))) /* * Import an assembly or linker symbol as a C expression with the specified diff --git a/include/lib/xlat_tables/xlat_mmu_helpers.h b/include/lib/xlat_tables/xlat_mmu_helpers.h index 77953177..b6c53e26 100644 --- a/include/lib/xlat_tables/xlat_mmu_helpers.h +++ b/include/lib/xlat_tables/xlat_mmu_helpers.h @@ -48,10 +48,15 @@ #ifdef AARCH32 /* AArch32 specific translation table API */ void enable_mmu_secure(unsigned int flags); + +void enable_mmu_direct(unsigned int flags); #else /* AArch64 specific translation table APIs */ void enable_mmu_el1(unsigned int flags); void enable_mmu_el3(unsigned int flags); + +void enable_mmu_direct_el1(unsigned int flags); +void enable_mmu_direct_el3(unsigned int flags); #endif /* AARCH32 */ int xlat_arch_is_granule_size_supported(size_t size); diff --git a/include/lib/xlat_tables/xlat_tables_v2.h b/include/lib/xlat_tables/xlat_tables_v2.h index 98f00d71..4dc2c5ec 100644 --- a/include/lib/xlat_tables/xlat_tables_v2.h +++ b/include/lib/xlat_tables/xlat_tables_v2.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -8,12 +8,12 @@ #define __XLAT_TABLES_V2_H__ #include <xlat_tables_defs.h> +#include <xlat_tables_v2_helpers.h> #ifndef __ASSEMBLY__ #include <stddef.h> #include <stdint.h> #include <xlat_mmu_helpers.h> -#include <xlat_tables_v2_helpers.h> /* * Default granularity size for an mmap_region_t. diff --git a/include/lib/xlat_tables/xlat_tables_v2_helpers.h b/include/lib/xlat_tables/xlat_tables_v2_helpers.h index de1c2d4b..e1ea2b64 100644 --- a/include/lib/xlat_tables/xlat_tables_v2_helpers.h +++ b/include/lib/xlat_tables/xlat_tables_v2_helpers.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -16,6 +16,13 @@ #error "Do not include this header file directly. Include xlat_tables_v2.h instead." #endif +/* Offsets into mmu_cfg_params array. All parameters are 32 bits wide. */ +#define MMU_CFG_MAIR0 0 +#define MMU_CFG_TCR 1 +#define MMU_CFG_TTBR0_LO 2 +#define MMU_CFG_TTBR0_HI 3 +#define MMU_CFG_PARAM_MAX 4 + #ifndef __ASSEMBLY__ #include <cassert.h> @@ -24,6 +31,9 @@ #include <xlat_tables_arch.h> #include <xlat_tables_defs.h> +/* Parameters of register values required when enabling MMU */ +extern uint32_t mmu_cfg_params[MMU_CFG_PARAM_MAX]; + /* Forward declaration */ struct mmap_region; @@ -162,6 +172,8 @@ struct xlat_ctx { .initialized = 0, \ } +#endif /*__ASSEMBLY__*/ + #if AARCH64 /* @@ -187,6 +199,4 @@ struct xlat_ctx { #endif /* AARCH64 */ -#endif /*__ASSEMBLY__*/ - #endif /* __XLAT_TABLES_V2_HELPERS_H__ */ diff --git a/include/plat/arm/board/common/board_arm_def.h b/include/plat/arm/board/common/board_arm_def.h index 96eefbbe..5e1d680c 100644 --- a/include/plat/arm/board/common/board_arm_def.h +++ b/include/plat/arm/board/common/board_arm_def.h @@ -122,14 +122,6 @@ #define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE #define PLAT_ARM_NVM_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE) -/* PSCI memory protect definitions: - * This variable is stored in a non-secure flash because some ARM reference - * platforms do not have secure NVRAM. Real systems that provided MEM_PROTECT - * support must use a secure NVRAM to store the PSCI MEM_PROTECT definitions. - */ -#define PLAT_ARM_MEM_PROT_ADDR (V2M_FLASH0_BASE + \ - V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE) - /* * Map mem_protect flash region with read and write permissions */ diff --git a/include/plat/arm/css/common/css_pm.h b/include/plat/arm/css/common/css_pm.h index 0f92e60b..e834fffc 100644 --- a/include/plat/arm/css/common/css_pm.h +++ b/include/plat/arm/css/common/css_pm.h @@ -17,9 +17,15 @@ /* Macros to read the CSS power domain state */ #define CSS_CORE_PWR_STATE(state) (state)->pwr_domain_state[ARM_PWR_LVL0] #define CSS_CLUSTER_PWR_STATE(state) (state)->pwr_domain_state[ARM_PWR_LVL1] -#define CSS_SYSTEM_PWR_STATE(state) \ - ((PLAT_MAX_PWR_LVL == CSS_SYSTEM_PWR_DMN_LVL) ?\ - (state)->pwr_domain_state[CSS_SYSTEM_PWR_DMN_LVL] : 0) + +static inline unsigned int css_system_pwr_state(const psci_power_state_t *state) +{ +#if (PLAT_MAX_PWR_LVL == CSS_SYSTEM_PWR_DMN_LVL) + return state->pwr_domain_state[CSS_SYSTEM_PWR_DMN_LVL]; +#else + return 0; +#endif +} int css_pwr_domain_on(u_register_t mpidr); void css_pwr_domain_on_finish(const psci_power_state_t *target_state); diff --git a/include/tools_share/firmware_image_package.h b/include/tools_share/firmware_image_package.h index f2585552..b1ce56af 100644 --- a/include/tools_share/firmware_image_package.h +++ b/include/tools_share/firmware_image_package.h @@ -16,64 +16,64 @@ /* ToC Entry UUIDs */ #define UUID_TRUSTED_UPDATE_FIRMWARE_SCP_BL2U \ - {0x03279265, 0x742f, 0x44e6, 0x8d, 0xff, {0x57, 0x9a, 0xc1, 0xff, 0x06, 0x10} } + {{0x65, 0x92, 0x27, 0x03}, {0x2f, 0x74}, {0xe6, 0x44}, 0x8d, 0xff, {0x57, 0x9a, 0xc1, 0xff, 0x06, 0x10} } #define UUID_TRUSTED_UPDATE_FIRMWARE_BL2U \ - {0x37ebb360, 0xe5c1, 0x41ea, 0x9d, 0xf3, {0x19, 0xed, 0xa1, 0x1f, 0x68, 0x01} } + {{0x60, 0xb3, 0xeb, 0x37}, {0xc1, 0xe5}, {0xea, 0x41}, 0x9d, 0xf3, {0x19, 0xed, 0xa1, 0x1f, 0x68, 0x01} } #define UUID_TRUSTED_UPDATE_FIRMWARE_NS_BL2U \ - {0x111d514f, 0xe52b, 0x494e, 0xb4, 0xc5, {0x83, 0xc2, 0xf7, 0x15, 0x84, 0x0a} } + {{0x4f, 0x51, 0x1d, 0x11}, {0x2b, 0xe5}, {0x4e, 0x49}, 0xb4, 0xc5, {0x83, 0xc2, 0xf7, 0x15, 0x84, 0x0a} } #define UUID_TRUSTED_FWU_CERT \ - {0xb28a4071, 0xd618, 0x4c87, 0x8b, 0x2e, {0xc6, 0xdc, 0xcd, 0x50, 0xf0, 0x96} } + {{0x71, 0x40, 0x8a, 0xb2}, {0x18, 0xd6}, {0x87, 0x4c}, 0x8b, 0x2e, {0xc6, 0xdc, 0xcd, 0x50, 0xf0, 0x96} } #define UUID_TRUSTED_BOOT_FIRMWARE_BL2 \ - {0x0becf95f, 0x224d, 0x4d3e, 0xa5, 0x44, {0xc3, 0x9d, 0x81, 0xc7, 0x3f, 0x0a} } + {{0x5f, 0xf9, 0xec, 0x0b}, {0x4d, 0x22}, {0x3e, 0x4d}, 0xa5, 0x44, {0xc3, 0x9d, 0x81, 0xc7, 0x3f, 0x0a} } #define UUID_SCP_FIRMWARE_SCP_BL2 \ - {0x3dfd6697, 0xbe89, 0x49e8, 0xae, 0x5d, {0x78, 0xa1, 0x40, 0x60, 0x82, 0x13} } + {{0x97, 0x66, 0xfd, 0x3d}, {0x89, 0xbe}, {0xe8, 0x49}, 0xae, 0x5d, {0x78, 0xa1, 0x40, 0x60, 0x82, 0x13} } #define UUID_EL3_RUNTIME_FIRMWARE_BL31 \ - {0x6d08d447, 0xfe4c, 0x4698, 0x9b, 0x95, {0x29, 0x50, 0xcb, 0xbd, 0x5a, 0x00} } + {{0x47, 0xd4, 0x08, 0x6d}, {0x4c, 0xfe}, {0x98, 0x46}, 0x9b, 0x95, {0x29, 0x50, 0xcb, 0xbd, 0x5a, 0x00} } #define UUID_SECURE_PAYLOAD_BL32 \ - {0x89e1d005, 0xdc53, 0x4713, 0x8d, 0x2b, {0x50, 0x0a, 0x4b, 0x7a, 0x3e, 0x38} } + {{0x05, 0xd0, 0xe1, 0x89}, {0x53, 0xdc}, {0x13, 0x47}, 0x8d, 0x2b, {0x50, 0x0a, 0x4b, 0x7a, 0x3e, 0x38} } #define UUID_SECURE_PAYLOAD_BL32_EXTRA1 \ - {0x9bc2700b, 0x5a2a, 0x4078, 0x9f, 0x65, {0x0a, 0x56, 0x82, 0x73, 0x82, 0x88} } + {{0x0b, 0x70, 0xc2, 0x9b}, {0x2a, 0x5a}, {0x78, 0x40}, 0x9f, 0x65, {0x0a, 0x56, 0x82, 0x73, 0x82, 0x88} } #define UUID_SECURE_PAYLOAD_BL32_EXTRA2 \ - {0xb17ba88e, 0xa2cf, 0x4d3f, 0x85, 0xfd, {0xe7, 0xbb, 0xa5, 0x02, 0x20, 0xd9} } + {{0x8e, 0xa8, 0x7b, 0xb1}, {0xcf, 0xa2}, {0x3f, 0x4d}, 0x85, 0xfd, {0xe7, 0xbb, 0xa5, 0x02, 0x20, 0xd9} } #define UUID_NON_TRUSTED_FIRMWARE_BL33 \ - {0xa7eed0d6, 0xeafc, 0x4bd5, 0x97, 0x82, {0x99, 0x34, 0xf2, 0x34, 0xb6, 0xe4} } + {{0xd6, 0xd0, 0xee, 0xa7}, {0xfc, 0xea}, {0xd5, 0x4b}, 0x97, 0x82, {0x99, 0x34, 0xf2, 0x34, 0xb6, 0xe4} } /* Key certificates */ #define UUID_ROT_KEY_CERT \ - {0x721d2d86, 0x60f8, 0x11e4, 0x92, 0x0b, {0x8b, 0xe7, 0x62, 0x16, 0x0f, 0x24} } + {{0x86, 0x2d, 0x1d, 0x72}, {0xf8, 0x60}, {0xe4, 0x11}, 0x92, 0x0b, {0x8b, 0xe7, 0x62, 0x16, 0x0f, 0x24} } #define UUID_TRUSTED_KEY_CERT \ - {0x90e87e82, 0x60f8, 0x11e4, 0xa1, 0xb4, {0x77, 0x7a, 0x21, 0xb4, 0xf9, 0x4c} } + {{0x82, 0x7e, 0xe8, 0x90}, {0xf8, 0x60}, {0xe4, 0x11}, 0xa1, 0xb4, {0x77, 0x7a, 0x21, 0xb4, 0xf9, 0x4c} } #define UUID_NON_TRUSTED_WORLD_KEY_CERT \ - {0x3d87671c, 0x635f, 0x11e4, 0x97, 0x8d, {0x27, 0xc0, 0xc7, 0x14, 0x8a, 0xbd} } + {{0x1c, 0x67, 0x87, 0x3d}, {0x5f, 0x63}, {0xe4, 0x11}, 0x97, 0x8d, {0x27, 0xc0, 0xc7, 0x14, 0x8a, 0xbd} } #define UUID_SCP_FW_KEY_CERT \ - {0xa1214202, 0x60f8, 0x11e4, 0x8d, 0x9b, {0xf3, 0x3c, 0x0e, 0x15, 0xa0, 0x14} } + {{0x02, 0x42, 0x21, 0xa1}, {0xf8, 0x60}, {0xe4, 0x11}, 0x8d, 0x9b, {0xf3, 0x3c, 0x0e, 0x15, 0xa0, 0x14} } #define UUID_SOC_FW_KEY_CERT \ - {0xccbeb88a, 0x60f9, 0x11e4, 0x9a, 0xd0, {0xeb, 0x48, 0x22, 0xd8, 0xdc, 0xf8} } + {{0x8a, 0xb8, 0xbe, 0xcc}, {0xf9, 0x60}, {0xe4, 0x11}, 0x9a, 0xd0, {0xeb, 0x48, 0x22, 0xd8, 0xdc, 0xf8} } #define UUID_TRUSTED_OS_FW_KEY_CERT \ - {0x03d67794, 0x60fb, 0x11e4, 0x85, 0xdd, {0xb7, 0x10, 0x5b, 0x8c, 0xee, 0x04} } + {{0x94, 0x77, 0xd6, 0x03}, {0xfb, 0x60}, {0xe4, 0x11}, 0x85, 0xdd, {0xb7, 0x10, 0x5b, 0x8c, 0xee, 0x04} } #define UUID_NON_TRUSTED_FW_KEY_CERT \ - {0x2a83d58a, 0x60fb, 0x11e4, 0x8a, 0xaf, {0xdf, 0x30, 0xbb, 0xc4, 0x98, 0x59} } + {{0x8a, 0xd5, 0x83, 0x2a}, {0xfb, 0x60}, {0xe4, 0x11}, 0x8a, 0xaf, {0xdf, 0x30, 0xbb, 0xc4, 0x98, 0x59} } /* Content certificates */ #define UUID_TRUSTED_BOOT_FW_CERT \ - {0xea69e2d6, 0x635d, 0x11e4, 0x8d, 0x8c, {0x9f, 0xba, 0xbe, 0x99, 0x56, 0xa5} } + {{0xd6, 0xe2, 0x69, 0xea}, {0x5d, 0x63}, {0xe4, 0x11}, 0x8d, 0x8c, {0x9f, 0xba, 0xbe, 0x99, 0x56, 0xa5} } #define UUID_SCP_FW_CONTENT_CERT \ - {0x046fbe44, 0x635e, 0x11e4, 0xb2, 0x8b, {0x73, 0xd8, 0xea, 0xae, 0x96, 0x56} } + {{0x44, 0xbe, 0x6f, 0x04}, {0x5e, 0x63}, {0xe4, 0x11}, 0xb2, 0x8b, {0x73, 0xd8, 0xea, 0xae, 0x96, 0x56} } #define UUID_SOC_FW_CONTENT_CERT \ - {0x200cb2e2, 0x635e, 0x11e4, 0x9c, 0xe8, {0xab, 0xcc, 0xf9, 0x2b, 0xb6, 0x66} } + {{0xe2, 0xb2, 0x0c, 0x20}, {0x5e, 0x63}, {0xe4, 0x11}, 0x9c, 0xe8, {0xab, 0xcc, 0xf9, 0x2b, 0xb6, 0x66} } #define UUID_TRUSTED_OS_FW_CONTENT_CERT \ - {0x11449fa4, 0x635e, 0x11e4, 0x87, 0x28, {0x3f, 0x05, 0x72, 0x2a, 0xf3, 0x3d} } + {{0xa4, 0x9f, 0x44, 0x11}, {0x5e, 0x63}, {0xe4, 0x11}, 0x87, 0x28, {0x3f, 0x05, 0x72, 0x2a, 0xf3, 0x3d} } #define UUID_NON_TRUSTED_FW_CONTENT_CERT \ - {0xf3c1c48e, 0x635d, 0x11e4, 0xa7, 0xa9, {0x87, 0xee, 0x40, 0xb2, 0x3f, 0xa7} } + {{0x8e, 0xc4, 0xc1, 0xf3}, {0x5d, 0x63}, {0xe4, 0x11}, 0xa7, 0xa9, {0x87, 0xee, 0x40, 0xb2, 0x3f, 0xa7} } /* Dynamic configs */ #define UUID_HW_CONFIG \ - {0xd9f1b808, 0xcfc9, 0x4993, 0xa9, 0x62, {0x6f, 0xbc, 0x6b, 0x72, 0x65, 0xcc} } + {{0x08, 0xb8, 0xf1, 0xd9}, {0xc9, 0xcf}, {0x93, 0x49}, 0xa9, 0x62, {0x6f, 0xbc, 0x6b, 0x72, 0x65, 0xcc} } #define UUID_TB_FW_CONFIG \ - {0xff58046c, 0x6baf, 0x4f7d, 0x82, 0xed, {0xaa, 0x27, 0xbc, 0x69, 0xbf, 0xd2} } + {{0x6c, 0x04, 0x58, 0xff}, {0xaf, 0x6b}, {0x7d, 0x4f}, 0x82, 0xed, {0xaa, 0x27, 0xbc, 0x69, 0xbf, 0xd2} } #define UUID_SOC_FW_CONFIG \ - {0x4b817999, 0x7603, 0x46fb, 0x8c, 0x8e, {0x8d, 0x26, 0x7f, 0x78, 0x59, 0xe0} } + {{0x99, 0x79, 0x81, 0x4b}, {0x03, 0x76}, {0xfb, 0x46}, 0x8c, 0x8e, {0x8d, 0x26, 0x7f, 0x78, 0x59, 0xe0} } #define UUID_TOS_FW_CONFIG \ - {0x1a7c2526, 0xc6bd, 0x477f, 0x8d, 0x96, {0xc4, 0xc4, 0xb0, 0x24, 0x80, 0x21} } + {{0x26, 0x25, 0x7c, 0x1a}, {0xdb, 0xc6}, {0x7f, 0x47}, 0x8d, 0x96, {0xc4, 0xc4, 0xb0, 0x24, 0x80, 0x21} } #define UUID_NT_FW_CONFIG \ - {0x1598da28, 0xe893, 0x447e, 0xac, 0x66, {0x1a, 0xaf, 0x80, 0x15, 0x50, 0xf9} } + {{0x28, 0xda, 0x98, 0x15}, {0x93, 0xe8}, {0x7e, 0x44}, 0xac, 0x66, {0x1a, 0xaf, 0x80, 0x15, 0x50, 0xf9} } typedef struct fip_toc_header { uint32_t name; diff --git a/include/tools_share/uuid.h b/include/tools_share/uuid.h index 6d935bd6..f3ac4af5 100644 --- a/include/tools_share/uuid.h +++ b/include/tools_share/uuid.h @@ -48,9 +48,9 @@ * A DCE 1.1 compatible source representation of UUIDs. */ struct uuid { - uint32_t time_low; - uint16_t time_mid; - uint16_t time_hi_and_version; + uint8_t time_low[4]; + uint8_t time_mid[2]; + uint8_t time_hi_and_version[2]; uint8_t clock_seq_hi_and_reserved; uint8_t clock_seq_low; uint8_t node[_UUID_NODE_LEN]; |