diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/common/context_mgmt.h | 3 | ||||
| -rw-r--r-- | include/drivers/arm/tzc400.h | 12 | ||||
| -rw-r--r-- | include/drivers/arm/tzc_dmc500.h | 4 | ||||
| -rw-r--r-- | include/drivers/emmc.h | 182 | ||||
| -rw-r--r-- | include/drivers/io/io_block.h | 52 | ||||
| -rw-r--r-- | include/drivers/io/io_storage.h | 1 | ||||
| -rw-r--r-- | include/lib/aarch64/arch.h | 74 | ||||
| -rw-r--r-- | include/lib/bakery_lock.h | 2 | ||||
| -rw-r--r-- | include/lib/cpus/aarch64/cortex_a57.h | 6 | ||||
| -rw-r--r-- | include/lib/xlat_tables.h (renamed from include/lib/aarch64/xlat_tables.h) | 97 | ||||
| -rw-r--r-- | include/plat/arm/common/aarch64/cci_macros.S | 2 | ||||
| -rw-r--r-- | include/plat/arm/css/common/aarch64/css_macros.S | 2 | ||||
| -rw-r--r-- | include/plat/common/platform.h | 2 |
13 files changed, 340 insertions, 99 deletions
diff --git a/include/common/context_mgmt.h b/include/common/context_mgmt.h index 11786a18..a76ecbe3 100644 --- a/include/common/context_mgmt.h +++ b/include/common/context_mgmt.h @@ -55,7 +55,6 @@ void cm_set_context_by_index(unsigned int cpu_idx, unsigned int security_state); void *cm_get_context(uint32_t security_state); void cm_set_context(void *context, uint32_t security_state); -inline void cm_set_next_context(void *context); void cm_init_context(uint64_t mpidr, const struct entry_point_info *ep) __deprecated; void cm_init_my_context(const struct entry_point_info *ep); @@ -80,7 +79,7 @@ uint32_t cm_get_scr_el3(uint32_t security_state); * return. This initializes the SP_EL3 to a pointer to a 'cpu_context' set for * the required security state ******************************************************************************/ -inline void cm_set_next_context(void *context) +static inline void cm_set_next_context(void *context) { #if DEBUG uint64_t sp_mode; diff --git a/include/drivers/arm/tzc400.h b/include/drivers/arm/tzc400.h index 30856889..d8af7e15 100644 --- a/include/drivers/arm/tzc400.h +++ b/include/drivers/arm/tzc400.h @@ -139,8 +139,8 @@ void tzc400_configure_region0(tzc_region_attributes_t sec_attr, unsigned int ns_device_access); void tzc400_configure_region(unsigned int filters, int region, - uintptr_t region_base, - uintptr_t region_top, + unsigned long long region_base, + unsigned long long region_top, tzc_region_attributes_t sec_attr, unsigned int ns_device_access); void tzc400_set_action(tzc_action_t action); @@ -157,8 +157,8 @@ static inline void tzc_configure_region0( static inline void tzc_configure_region( unsigned int filters, int region, - uintptr_t region_base, - uintptr_t region_top, + unsigned long long region_base, + unsigned long long region_top, tzc_region_attributes_t sec_attr, unsigned int ns_device_access) __deprecated; static inline void tzc_set_action(tzc_action_t action) __deprecated; @@ -180,8 +180,8 @@ static inline void tzc_configure_region0( static inline void tzc_configure_region( unsigned int filters, int region, - uintptr_t region_base, - uintptr_t region_top, + unsigned long long region_base, + unsigned long long region_top, tzc_region_attributes_t sec_attr, unsigned int ns_device_access) { diff --git a/include/drivers/arm/tzc_dmc500.h b/include/drivers/arm/tzc_dmc500.h index 70f8ad2d..e21818fe 100644 --- a/include/drivers/arm/tzc_dmc500.h +++ b/include/drivers/arm/tzc_dmc500.h @@ -160,8 +160,8 @@ void tzc_dmc500_driver_init(const tzc_dmc500_driver_data_t *plat_driver_data); void tzc_dmc500_configure_region0(tzc_region_attributes_t sec_attr, unsigned int nsaid_permissions); void tzc_dmc500_configure_region(int region_no, - uintptr_t region_base, - uintptr_t region_top, + unsigned long long region_base, + unsigned long long region_top, tzc_region_attributes_t sec_attr, unsigned int nsaid_permissions); void tzc_dmc500_set_action(tzc_action_t action); diff --git a/include/drivers/emmc.h b/include/drivers/emmc.h new file mode 100644 index 00000000..61d44959 --- /dev/null +++ b/include/drivers/emmc.h @@ -0,0 +1,182 @@ +/* + * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __EMMC_H__ +#define __EMMC_H__ + +#include <stdint.h> + +#define EMMC_BLOCK_SIZE 512 +#define EMMC_BLOCK_MASK (EMMC_BLOCK_SIZE - 1) +#define EMMC_BOOT_CLK_RATE (400 * 1000) + +#define EMMC_CMD0 0 +#define EMMC_CMD1 1 +#define EMMC_CMD2 2 +#define EMMC_CMD3 3 +#define EMMC_CMD6 6 +#define EMMC_CMD7 7 +#define EMMC_CMD8 8 +#define EMMC_CMD9 9 +#define EMMC_CMD12 12 +#define EMMC_CMD13 13 +#define EMMC_CMD17 17 +#define EMMC_CMD18 18 +#define EMMC_CMD24 24 +#define EMMC_CMD25 25 +#define EMMC_CMD35 35 +#define EMMC_CMD36 36 +#define EMMC_CMD38 38 + +#define OCR_POWERUP (1 << 31) +#define OCR_BYTE_MODE (0 << 29) +#define OCR_SECTOR_MODE (2 << 29) +#define OCR_ACCESS_MODE_MASK (3 << 29) +#define OCR_VDD_MIN_2V7 (0x1ff << 15) +#define OCR_VDD_MIN_2V0 (0x7f << 8) +#define OCR_VDD_MIN_1V7 (1 << 7) + +#define EMMC_RESPONSE_R1 1 +#define EMMC_RESPONSE_R1B 1 +#define EMMC_RESPONSE_R2 4 +#define EMMC_RESPONSE_R3 1 +#define EMMC_RESPONSE_R4 1 +#define EMMC_RESPONSE_R5 1 + +#define EMMC_FIX_RCA 6 /* > 1 */ +#define RCA_SHIFT_OFFSET 16 + +#define CMD_EXTCSD_PARTITION_CONFIG 179 +#define CMD_EXTCSD_BUS_WIDTH 183 +#define CMD_EXTCSD_HS_TIMING 185 + +#define PART_CFG_BOOT_PARTITION1_ENABLE (1 << 3) +#define PART_CFG_PARTITION1_ACCESS (1 << 0) + +/* values in EXT CSD register */ +#define EMMC_BUS_WIDTH_1 0 +#define EMMC_BUS_WIDTH_4 1 +#define EMMC_BUS_WIDTH_8 2 +#define EMMC_BOOT_MODE_BACKWARD (0 << 3) +#define EMMC_BOOT_MODE_HS_TIMING (1 << 3) +#define EMMC_BOOT_MODE_DDR (2 << 3) + +#define EXTCSD_SET_CMD (0 << 24) +#define EXTCSD_SET_BITS (1 << 24) +#define EXTCSD_CLR_BITS (2 << 24) +#define EXTCSD_WRITE_BYTES (3 << 24) +#define EXTCSD_CMD(x) (((x) & 0xff) << 16) +#define EXTCSD_VALUE(x) (((x) & 0xff) << 8) + +#define STATUS_CURRENT_STATE(x) (((x) & 0xf) << 9) +#define STATUS_READY_FOR_DATA (1 << 8) +#define STATUS_SWITCH_ERROR (1 << 7) +#define EMMC_GET_STATE(x) (((x) >> 9) & 0xf) +#define EMMC_STATE_IDLE 0 +#define EMMC_STATE_READY 1 +#define EMMC_STATE_IDENT 2 +#define EMMC_STATE_STBY 3 +#define EMMC_STATE_TRAN 4 +#define EMMC_STATE_DATA 5 +#define EMMC_STATE_RCV 6 +#define EMMC_STATE_PRG 7 +#define EMMC_STATE_DIS 8 +#define EMMC_STATE_BTST 9 +#define EMMC_STATE_SLP 10 + +typedef struct emmc_cmd { + unsigned int cmd_idx; + unsigned int cmd_arg; + unsigned int resp_type; + unsigned int resp_data[4]; +} emmc_cmd_t; + +typedef struct emmc_ops { + void (*init)(void); + int (*send_cmd)(emmc_cmd_t *cmd); + int (*set_ios)(int clk, int width); + int (*prepare)(int lba, uintptr_t buf, size_t size); + int (*read)(int lba, uintptr_t buf, size_t size); + int (*write)(int lba, const uintptr_t buf, size_t size); +} emmc_ops_t; + +typedef struct emmc_csd { + unsigned char not_used: 1; + unsigned char crc: 7; + unsigned char ecc: 2; + unsigned char file_format: 2; + unsigned char tmp_write_protect: 1; + unsigned char perm_write_protect: 1; + unsigned char copy: 1; + unsigned char file_format_grp: 1; + + unsigned short reserved_1: 5; + unsigned short write_bl_partial: 1; + unsigned short write_bl_len: 4; + unsigned short r2w_factor: 3; + unsigned short default_ecc: 2; + unsigned short wp_grp_enable: 1; + + unsigned int wp_grp_size: 5; + unsigned int erase_grp_mult: 5; + unsigned int erase_grp_size: 5; + unsigned int c_size_mult: 3; + unsigned int vdd_w_curr_max: 3; + unsigned int vdd_w_curr_min: 3; + unsigned int vdd_r_curr_max: 3; + unsigned int vdd_r_curr_min: 3; + unsigned int c_size_low: 2; + + unsigned int c_size_high: 10; + unsigned int reserved_2: 2; + unsigned int dsr_imp: 1; + unsigned int read_blk_misalign: 1; + unsigned int write_blk_misalign: 1; + unsigned int read_bl_partial: 1; + unsigned int read_bl_len: 4; + unsigned int ccc: 12; + + unsigned int tran_speed: 8; + unsigned int nsac: 8; + unsigned int taac: 8; + unsigned int reserved_3: 2; + unsigned int spec_vers: 4; + unsigned int csd_structure: 2; +} emmc_csd_t; + +size_t emmc_read_blocks(int lba, uintptr_t buf, size_t size); +size_t emmc_write_blocks(int lba, const uintptr_t buf, size_t size); +size_t emmc_erase_blocks(int lba, size_t size); +size_t emmc_rpmb_read_blocks(int lba, uintptr_t buf, size_t size); +size_t emmc_rpmb_write_blocks(int lba, const uintptr_t buf, size_t size); +size_t emmc_rpmb_erase_blocks(int lba, size_t size); +void emmc_init(const emmc_ops_t *ops, int clk, int bus_width); + +#endif /* __EMMC_H__ */ diff --git a/include/drivers/io/io_block.h b/include/drivers/io/io_block.h new file mode 100644 index 00000000..ebf43cd0 --- /dev/null +++ b/include/drivers/io/io_block.h @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __IO_BLOCK_H__ +#define __IO_BLOCK_H__ + +#include <io_storage.h> + +/* block devices ops */ +typedef struct io_block_ops { + size_t (*read)(int lba, uintptr_t buf, size_t size); + size_t (*write)(int lba, const uintptr_t buf, size_t size); +} io_block_ops_t; + +typedef struct io_block_dev_spec { + io_block_spec_t buffer; + io_block_ops_t ops; + size_t block_size; +} io_block_dev_spec_t; + +struct io_dev_connector; + +int register_io_dev_block(const struct io_dev_connector **dev_con); + +#endif /* __IO_BLOCK_H__ */ diff --git a/include/drivers/io/io_storage.h b/include/drivers/io/io_storage.h index 970ab2cd..243f6883 100644 --- a/include/drivers/io/io_storage.h +++ b/include/drivers/io/io_storage.h @@ -44,6 +44,7 @@ typedef enum { IO_TYPE_SEMIHOSTING, IO_TYPE_MEMMAP, IO_TYPE_FIRMWARE_IMAGE_PACKAGE, + IO_TYPE_BLOCK, IO_TYPE_MAX } io_type_t; diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index f9b8ed6a..07bbd899 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -359,80 +359,6 @@ #define clr_cntp_ctl_enable(x) (x &= ~(1 << CNTP_CTL_ENABLE_SHIFT)) #define clr_cntp_ctl_imask(x) (x &= ~(1 << CNTP_CTL_IMASK_SHIFT)) -/* Miscellaneous MMU related constants */ -#define NUM_2MB_IN_GB (1 << 9) -#define NUM_4K_IN_2MB (1 << 9) -#define NUM_GB_IN_4GB (1 << 2) - -#define TWO_MB_SHIFT 21 -#define ONE_GB_SHIFT 30 -#define FOUR_KB_SHIFT 12 - -#define ONE_GB_INDEX(x) ((x) >> ONE_GB_SHIFT) -#define TWO_MB_INDEX(x) ((x) >> TWO_MB_SHIFT) -#define FOUR_KB_INDEX(x) ((x) >> FOUR_KB_SHIFT) - -#define INVALID_DESC 0x0 -#define BLOCK_DESC 0x1 -#define TABLE_DESC 0x3 - -#define FIRST_LEVEL_DESC_N ONE_GB_SHIFT -#define SECOND_LEVEL_DESC_N TWO_MB_SHIFT -#define THIRD_LEVEL_DESC_N FOUR_KB_SHIFT - -#define LEVEL1 1 -#define LEVEL2 2 -#define LEVEL3 3 - -#define XN (1ull << 2) -#define PXN (1ull << 1) -#define CONT_HINT (1ull << 0) - -#define UPPER_ATTRS(x) (x & 0x7) << 52 -#define NON_GLOBAL (1 << 9) -#define ACCESS_FLAG (1 << 8) -#define NSH (0x0 << 6) -#define OSH (0x2 << 6) -#define ISH (0x3 << 6) - -#define PAGE_SIZE_SHIFT FOUR_KB_SHIFT -#define PAGE_SIZE (1 << PAGE_SIZE_SHIFT) -#define PAGE_SIZE_MASK (PAGE_SIZE - 1) -#define IS_PAGE_ALIGNED(addr) (((addr) & PAGE_SIZE_MASK) == 0) - -#define XLAT_ENTRY_SIZE_SHIFT 3 /* Each MMU table entry is 8 bytes (1 << 3) */ -#define XLAT_ENTRY_SIZE (1 << XLAT_ENTRY_SIZE_SHIFT) - -#define XLAT_TABLE_SIZE_SHIFT PAGE_SIZE_SHIFT -#define XLAT_TABLE_SIZE (1 << XLAT_TABLE_SIZE_SHIFT) - -/* Values for number of entries in each MMU translation table */ -#define XLAT_TABLE_ENTRIES_SHIFT (XLAT_TABLE_SIZE_SHIFT - XLAT_ENTRY_SIZE_SHIFT) -#define XLAT_TABLE_ENTRIES (1 << XLAT_TABLE_ENTRIES_SHIFT) -#define XLAT_TABLE_ENTRIES_MASK (XLAT_TABLE_ENTRIES - 1) - -/* Values to convert a memory address to an index into a translation table */ -#define L3_XLAT_ADDRESS_SHIFT PAGE_SIZE_SHIFT -#define L2_XLAT_ADDRESS_SHIFT (L3_XLAT_ADDRESS_SHIFT + XLAT_TABLE_ENTRIES_SHIFT) -#define L1_XLAT_ADDRESS_SHIFT (L2_XLAT_ADDRESS_SHIFT + XLAT_TABLE_ENTRIES_SHIFT) - -/* - * AP[1] bit is ignored by hardware and is - * treated as if it is One in EL2/EL3 - */ -#define AP_RO (0x1 << 5) -#define AP_RW (0x0 << 5) - -#define NS (0x1 << 3) -#define ATTR_NON_CACHEABLE_INDEX 0x2 -#define ATTR_DEVICE_INDEX 0x1 -#define ATTR_IWBWA_OWBWA_NTR_INDEX 0x0 -#define LOWER_ATTRS(x) (((x) & 0xfff) << 2) -#define ATTR_NON_CACHEABLE (0x44) -#define ATTR_DEVICE (0x4) -#define ATTR_IWBWA_OWBWA_NTR (0xff) -#define MAIR_ATTR_SET(attr, index) (attr << (index << 3)) - /* Exception Syndrome register bits and bobs */ #define ESR_EC_SHIFT 26 #define ESR_EC_MASK 0x3f diff --git a/include/lib/bakery_lock.h b/include/lib/bakery_lock.h index 8a538917..6b8157e6 100644 --- a/include/lib/bakery_lock.h +++ b/include/lib/bakery_lock.h @@ -96,7 +96,7 @@ typedef bakery_info_t bakery_lock_t; #endif /* __USE_COHERENT_MEM__ */ -inline void bakery_lock_init(bakery_lock_t *bakery) {} +static inline void bakery_lock_init(bakery_lock_t *bakery) {} void bakery_lock_get(bakery_lock_t *bakery); void bakery_lock_release(bakery_lock_t *bakery); diff --git a/include/lib/cpus/aarch64/cortex_a57.h b/include/lib/cpus/aarch64/cortex_a57.h index c512129a..ac4ae570 100644 --- a/include/lib/cpus/aarch64/cortex_a57.h +++ b/include/lib/cpus/aarch64/cortex_a57.h @@ -61,9 +61,15 @@ ******************************************************************************/ #define CPUACTLR_EL1 S3_1_C15_C2_0 /* Instruction def. */ +#define CPUACTLR_DIS_LOAD_PASS_DMB (1 << 59) +#define CPUACTLR_GRE_NGRE_AS_NGNRE (1 << 54) #define CPUACTLR_DIS_OVERREAD (1 << 52) #define CPUACTLR_NO_ALLOC_WBWA (1 << 49) #define CPUACTLR_DCC_AS_DCCI (1 << 44) +#define CPUACTLR_FORCE_FPSCR_FLUSH (1 << 38) +#define CPUACTLR_DIS_STREAMING (3 << 27) +#define CPUACTLR_DIS_L1_STREAMING (3 << 25) +#define CPUACTLR_DIS_INDIRECT_PREDICTOR (1 << 4) /******************************************************************************* * L2 Control register specific definitions. diff --git a/include/lib/aarch64/xlat_tables.h b/include/lib/xlat_tables.h index d21100e3..abe46ed9 100644 --- a/include/lib/aarch64/xlat_tables.h +++ b/include/lib/xlat_tables.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -31,6 +31,79 @@ #ifndef __XLAT_TABLES_H__ #define __XLAT_TABLES_H__ +/* Miscellaneous MMU related constants */ +#define NUM_2MB_IN_GB (1 << 9) +#define NUM_4K_IN_2MB (1 << 9) +#define NUM_GB_IN_4GB (1 << 2) + +#define TWO_MB_SHIFT 21 +#define ONE_GB_SHIFT 30 +#define FOUR_KB_SHIFT 12 + +#define ONE_GB_INDEX(x) ((x) >> ONE_GB_SHIFT) +#define TWO_MB_INDEX(x) ((x) >> TWO_MB_SHIFT) +#define FOUR_KB_INDEX(x) ((x) >> FOUR_KB_SHIFT) + +#define INVALID_DESC 0x0 +#define BLOCK_DESC 0x1 +#define TABLE_DESC 0x3 + +#define FIRST_LEVEL_DESC_N ONE_GB_SHIFT +#define SECOND_LEVEL_DESC_N TWO_MB_SHIFT +#define THIRD_LEVEL_DESC_N FOUR_KB_SHIFT + +#define LEVEL1 1 +#define LEVEL2 2 +#define LEVEL3 3 + +#define XN (1ull << 2) +#define PXN (1ull << 1) +#define CONT_HINT (1ull << 0) + +#define UPPER_ATTRS(x) (x & 0x7) << 52 +#define NON_GLOBAL (1 << 9) +#define ACCESS_FLAG (1 << 8) +#define NSH (0x0 << 6) +#define OSH (0x2 << 6) +#define ISH (0x3 << 6) + +#define PAGE_SIZE_SHIFT FOUR_KB_SHIFT +#define PAGE_SIZE (1 << PAGE_SIZE_SHIFT) +#define PAGE_SIZE_MASK (PAGE_SIZE - 1) +#define IS_PAGE_ALIGNED(addr) (((addr) & PAGE_SIZE_MASK) == 0) + +#define XLAT_ENTRY_SIZE_SHIFT 3 /* Each MMU table entry is 8 bytes (1 << 3) */ +#define XLAT_ENTRY_SIZE (1 << XLAT_ENTRY_SIZE_SHIFT) + +#define XLAT_TABLE_SIZE_SHIFT PAGE_SIZE_SHIFT +#define XLAT_TABLE_SIZE (1 << XLAT_TABLE_SIZE_SHIFT) + +/* Values for number of entries in each MMU translation table */ +#define XLAT_TABLE_ENTRIES_SHIFT (XLAT_TABLE_SIZE_SHIFT - XLAT_ENTRY_SIZE_SHIFT) +#define XLAT_TABLE_ENTRIES (1 << XLAT_TABLE_ENTRIES_SHIFT) +#define XLAT_TABLE_ENTRIES_MASK (XLAT_TABLE_ENTRIES - 1) + +/* Values to convert a memory address to an index into a translation table */ +#define L3_XLAT_ADDRESS_SHIFT PAGE_SIZE_SHIFT +#define L2_XLAT_ADDRESS_SHIFT (L3_XLAT_ADDRESS_SHIFT + XLAT_TABLE_ENTRIES_SHIFT) +#define L1_XLAT_ADDRESS_SHIFT (L2_XLAT_ADDRESS_SHIFT + XLAT_TABLE_ENTRIES_SHIFT) + +/* + * AP[1] bit is ignored by hardware and is + * treated as if it is One in EL2/EL3 + */ +#define AP_RO (0x1 << 5) +#define AP_RW (0x0 << 5) + +#define NS (0x1 << 3) +#define ATTR_NON_CACHEABLE_INDEX 0x2 +#define ATTR_DEVICE_INDEX 0x1 +#define ATTR_IWBWA_OWBWA_NTR_INDEX 0x0 +#define LOWER_ATTRS(x) (((x) & 0xfff) << 2) +#define ATTR_NON_CACHEABLE (0x44) +#define ATTR_DEVICE (0x4) +#define ATTR_IWBWA_OWBWA_NTR (0xff) +#define MAIR_ATTR_SET(attr, index) (attr << (index << 3)) /* * Flags to override default values used to program system registers while @@ -39,6 +112,7 @@ #define DISABLE_DCACHE (1 << 0) #ifndef __ASSEMBLY__ +#include <stddef.h> #include <stdint.h> /* Helper macro to define entries for mmap_region_t. It creates @@ -93,20 +167,21 @@ typedef enum { * Structure for specifying a single region of memory. */ typedef struct mmap_region { - unsigned long base_pa; - unsigned long base_va; - unsigned long size; - mmap_attr_t attr; + unsigned long long base_pa; + uintptr_t base_va; + size_t size; + mmap_attr_t attr; } mmap_region_t; -void mmap_add_region(unsigned long base_pa, unsigned long base_va, - unsigned long size, unsigned attr); -void mmap_add(const mmap_region_t *mm); - +/* Generic translation table APIs */ void init_xlat_tables(void); +void mmap_add_region(unsigned long long base_pa, uintptr_t base_va, + size_t size, unsigned int attr); +void mmap_add(const mmap_region_t *mm); -void enable_mmu_el1(uint32_t flags); -void enable_mmu_el3(uint32_t flags); +/* AArch64 specific translation table APIs */ +void enable_mmu_el1(unsigned int flags); +void enable_mmu_el3(unsigned int flags); #endif /*__ASSEMBLY__*/ #endif /* __XLAT_TABLES_H__ */ diff --git a/include/plat/arm/common/aarch64/cci_macros.S b/include/plat/arm/common/aarch64/cci_macros.S index 40f9d7e0..902fb159 100644 --- a/include/plat/arm/common/aarch64/cci_macros.S +++ b/include/plat/arm/common/aarch64/cci_macros.S @@ -44,7 +44,7 @@ cci_iface_regs: * Clobbers: x0 - x9, sp * ------------------------------------------------ */ - .macro plat_print_interconnect_regs + .macro print_cci_regs adr x6, cci_iface_regs /* Store in x7 the base address of the first interface */ mov_imm x7, (PLAT_ARM_CCI_BASE + SLAVE_IFACE_OFFSET( \ diff --git a/include/plat/arm/css/common/aarch64/css_macros.S b/include/plat/arm/css/common/aarch64/css_macros.S index 9124fdc7..518867bd 100644 --- a/include/plat/arm/css/common/aarch64/css_macros.S +++ b/include/plat/arm/css/common/aarch64/css_macros.S @@ -40,7 +40,7 @@ * Clobbers: x0 - x10, x16, x17, sp * --------------------------------------------- */ - .macro plat_print_gic_regs + .macro css_print_gic_regs mov_imm x16, PLAT_ARM_GICD_BASE mov_imm x17, PLAT_ARM_GICC_BASE arm_print_gic_regs diff --git a/include/plat/common/platform.h b/include/plat/common/platform.h index 58575012..42260e9f 100644 --- a/include/plat/common/platform.h +++ b/include/plat/common/platform.h @@ -56,7 +56,7 @@ struct image_desc; /******************************************************************************* * Mandatory common functions ******************************************************************************/ -uint64_t plat_get_syscnt_freq(void); +unsigned long long plat_get_syscnt_freq(void); int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle, uintptr_t *image_spec); |