diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/common/aarch64/el3_common_macros.S | 7 | ||||
| -rw-r--r-- | include/drivers/arm/tzc400.h | 105 | ||||
| -rw-r--r-- | include/drivers/arm/tzc_common.h | 112 | ||||
| -rw-r--r-- | include/drivers/arm/tzc_dmc500.h | 116 | ||||
| -rw-r--r-- | include/lib/aarch64/arch.h | 4 | ||||
| -rw-r--r-- | include/lib/libc/string.h | 1 | ||||
| -rw-r--r-- | include/lib/libfdt/fdt.h | 18 | ||||
| -rw-r--r-- | include/lib/libfdt/libfdt.h | 270 | ||||
| -rw-r--r-- | include/lib/libfdt/libfdt_env.h | 61 | ||||
| -rw-r--r-- | include/plat/arm/common/arm_def.h | 30 | ||||
| -rw-r--r-- | include/plat/arm/common/plat_arm.h | 2 |
11 files changed, 477 insertions, 249 deletions
diff --git a/include/common/aarch64/el3_common_macros.S b/include/common/aarch64/el3_common_macros.S index 03b977e3..143c70c3 100644 --- a/include/common/aarch64/el3_common_macros.S +++ b/include/common/aarch64/el3_common_macros.S @@ -70,9 +70,14 @@ * * SCR_EL3.EA: Set to one to route External Aborts and SError Interrupts * to EL3 when executing at any EL. + * + * SCR_EL3.{API,APK}: For Armv8.3 pointer authentication feature, + * disable traps to EL3 when accessing key registers or using pointer + * authentication instructions from lower ELs. * --------------------------------------------------------------------- */ - mov x0, #((SCR_RESET_VAL | SCR_EA_BIT | SCR_SIF_BIT) \ + mov_imm x0, ((SCR_RESET_VAL | SCR_EA_BIT | SCR_SIF_BIT | \ + SCR_API_BIT | SCR_APK_BIT) \ & ~(SCR_TWE_BIT | SCR_TWI_BIT | SCR_SMD_BIT)) msr scr_el3, x0 diff --git a/include/drivers/arm/tzc400.h b/include/drivers/arm/tzc400.h index 095099c6..a7bb3f64 100644 --- a/include/drivers/arm/tzc400.h +++ b/include/drivers/arm/tzc400.h @@ -4,83 +4,84 @@ * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __TZC400_H__ -#define __TZC400_H__ +#ifndef TZC400_H +#define TZC400_H #include <tzc_common.h> +#include <utils_def.h> -#define BUILD_CONFIG_OFF 0x000 -#define GATE_KEEPER_OFF 0x008 -#define SPECULATION_CTRL_OFF 0x00c -#define INT_STATUS 0x010 -#define INT_CLEAR 0x014 +#define BUILD_CONFIG_OFF U(0x000) +#define GATE_KEEPER_OFF U(0x008) +#define SPECULATION_CTRL_OFF U(0x00c) +#define INT_STATUS U(0x010) +#define INT_CLEAR U(0x014) -#define FAIL_ADDRESS_LOW_OFF 0x020 -#define FAIL_ADDRESS_HIGH_OFF 0x024 -#define FAIL_CONTROL_OFF 0x028 -#define FAIL_ID 0x02c +#define FAIL_ADDRESS_LOW_OFF U(0x020) +#define FAIL_ADDRESS_HIGH_OFF U(0x024) +#define FAIL_CONTROL_OFF U(0x028) +#define FAIL_ID U(0x02c) /* ID registers not common across different varieties of TZC */ -#define PID5 0xFD4 -#define PID6 0xFD8 -#define PID7 0xFDC +#define PID5 U(0xFD4) +#define PID6 U(0xFD8) +#define PID7 U(0xFDC) #define BUILD_CONFIG_NF_SHIFT 24 -#define BUILD_CONFIG_NF_MASK 0x3 +#define BUILD_CONFIG_NF_MASK U(0x3) #define BUILD_CONFIG_AW_SHIFT 8 -#define BUILD_CONFIG_AW_MASK 0x3f +#define BUILD_CONFIG_AW_MASK U(0x3f) #define BUILD_CONFIG_NR_SHIFT 0 -#define BUILD_CONFIG_NR_MASK 0x1f +#define BUILD_CONFIG_NR_MASK U(0x1f) /* * Number of gate keepers is implementation defined. But we know the max for * this device is 4. Get implementation details from BUILD_CONFIG. */ #define GATE_KEEPER_OS_SHIFT 16 -#define GATE_KEEPER_OS_MASK 0xf +#define GATE_KEEPER_OS_MASK U(0xf) #define GATE_KEEPER_OR_SHIFT 0 -#define GATE_KEEPER_OR_MASK 0xf -#define GATE_KEEPER_FILTER_MASK 0x1 +#define GATE_KEEPER_OR_MASK U(0xf) +#define GATE_KEEPER_FILTER_MASK U(0x1) /* Speculation is enabled by default. */ -#define SPECULATION_CTRL_WRITE_DISABLE (1 << 1) -#define SPECULATION_CTRL_READ_DISABLE (1 << 0) +#define SPECULATION_CTRL_WRITE_DISABLE BIT_32(1) +#define SPECULATION_CTRL_READ_DISABLE BIT_32(0) /* Max number of filters allowed is 4. */ #define INT_STATUS_OVERLAP_SHIFT 16 -#define INT_STATUS_OVERLAP_MASK 0xf +#define INT_STATUS_OVERLAP_MASK U(0xf) #define INT_STATUS_OVERRUN_SHIFT 8 -#define INT_STATUS_OVERRUN_MASK 0xf +#define INT_STATUS_OVERRUN_MASK U(0xf) #define INT_STATUS_STATUS_SHIFT 0 -#define INT_STATUS_STATUS_MASK 0xf +#define INT_STATUS_STATUS_MASK U(0xf) #define INT_CLEAR_CLEAR_SHIFT 0 -#define INT_CLEAR_CLEAR_MASK 0xf - -#define FAIL_CONTROL_DIR_SHIFT (1 << 24) -#define FAIL_CONTROL_DIR_READ 0x0 -#define FAIL_CONTROL_DIR_WRITE 0x1 -#define FAIL_CONTROL_NS_SHIFT (1 << 21) -#define FAIL_CONTROL_NS_SECURE 0x0 -#define FAIL_CONTROL_NS_NONSECURE 0x1 -#define FAIL_CONTROL_PRIV_SHIFT (1 << 20) -#define FAIL_CONTROL_PRIV_PRIV 0x0 -#define FAIL_CONTROL_PRIV_UNPRIV 0x1 +#define INT_CLEAR_CLEAR_MASK U(0xf) + +#define FAIL_CONTROL_DIR_SHIFT 24 +#define FAIL_CONTROL_DIR_READ U(0) +#define FAIL_CONTROL_DIR_WRITE U(1) +#define FAIL_CONTROL_NS_SHIFT 21 +#define FAIL_CONTROL_NS_SECURE U(0) +#define FAIL_CONTROL_NS_NONSECURE U(1) +#define FAIL_CONTROL_PRIV_SHIFT 20 +#define FAIL_CONTROL_PRIV_PRIV U(0) +#define FAIL_CONTROL_PRIV_UNPRIV U(1) /* * FAIL_ID_ID_MASK depends on AID_WIDTH which is platform specific. * Platform should provide the value on initialisation. */ #define FAIL_ID_VNET_SHIFT 24 -#define FAIL_ID_VNET_MASK 0xf +#define FAIL_ID_VNET_MASK U(0xf) #define FAIL_ID_ID_SHIFT 0 -#define TZC_400_PERIPHERAL_ID 0x460 +#define TZC_400_PERIPHERAL_ID U(0x460) /* Filter enable bits in a TZC */ -#define TZC_400_REGION_ATTR_F_EN_MASK 0xf -#define TZC_400_REGION_ATTR_FILTER_BIT(x) ((1 << x) \ - << TZC_REGION_ATTR_F_EN_SHIFT) +#define TZC_400_REGION_ATTR_F_EN_MASK U(0xf) +#define TZC_400_REGION_ATTR_FILTER_BIT(x) \ + ((U(1) << (x)) << TZC_REGION_ATTR_F_EN_SHIFT) #define TZC_400_REGION_ATTR_FILTER_BIT_ALL \ (TZC_400_REGION_ATTR_F_EN_MASK << \ TZC_REGION_ATTR_F_EN_SHIFT) @@ -89,8 +90,8 @@ * All TZC region configuration registers are placed one after another. It * depicts size of block of registers for programming each region. */ -#define TZC_400_REGION_SIZE 0x20 -#define TZC_400_ACTION_OFF 0x4 +#define TZC_400_REGION_SIZE U(0x20) +#define TZC_400_ACTION_OFF U(0x4) #ifndef __ASSEMBLY__ @@ -101,15 +102,15 @@ * Function & variable prototypes ******************************************************************************/ void tzc400_init(uintptr_t base); -void tzc400_configure_region0(tzc_region_attributes_t sec_attr, +void tzc400_configure_region0(unsigned int sec_attr, unsigned int ns_device_access); void tzc400_configure_region(unsigned int filters, - int region, + unsigned int region, unsigned long long region_base, unsigned long long region_top, - tzc_region_attributes_t sec_attr, + unsigned int sec_attr, unsigned int nsaid_permissions); -void tzc400_set_action(tzc_action_t action); +void tzc400_set_action(unsigned int action); void tzc400_enable_filters(void); void tzc400_disable_filters(void); @@ -119,7 +120,7 @@ static inline void tzc_init(uintptr_t base) } static inline void tzc_configure_region0( - tzc_region_attributes_t sec_attr, + unsigned int sec_attr, unsigned int ns_device_access) { tzc400_configure_region0(sec_attr, ns_device_access); @@ -127,17 +128,17 @@ static inline void tzc_configure_region0( static inline void tzc_configure_region( unsigned int filters, - int region, + unsigned int region, unsigned long long region_base, unsigned long long region_top, - tzc_region_attributes_t sec_attr, + unsigned int sec_attr, unsigned int ns_device_access) { tzc400_configure_region(filters, region, region_base, region_top, sec_attr, ns_device_access); } -static inline void tzc_set_action(tzc_action_t action) +static inline void tzc_set_action(unsigned int action) { tzc400_set_action(action); } @@ -155,4 +156,4 @@ static inline void tzc_disable_filters(void) #endif /* __ASSEMBLY__ */ -#endif /* __TZC400__ */ +#endif /* TZC400_H */ diff --git a/include/drivers/arm/tzc_common.h b/include/drivers/arm/tzc_common.h index bb64b008..dac79aa4 100644 --- a/include/drivers/arm/tzc_common.h +++ b/include/drivers/arm/tzc_common.h @@ -1,11 +1,13 @@ /* - * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __TZC_COMMON_H__ -#define __TZC_COMMON_H__ +#ifndef TZC_COMMON_H +#define TZC_COMMON_H + +#include <utils_def.h> /* * Offset of core registers from the start of the base of configuration @@ -13,83 +15,83 @@ */ /* ID Registers */ -#define PID0_OFF 0xfe0 -#define PID1_OFF 0xfe4 -#define PID2_OFF 0xfe8 -#define PID3_OFF 0xfec -#define PID4_OFF 0xfd0 -#define CID0_OFF 0xff0 -#define CID1_OFF 0xff4 -#define CID2_OFF 0xff8 -#define CID3_OFF 0xffc +#define PID0_OFF U(0xfe0) +#define PID1_OFF U(0xfe4) +#define PID2_OFF U(0xfe8) +#define PID3_OFF U(0xfec) +#define PID4_OFF U(0xfd0) +#define CID0_OFF U(0xff0) +#define CID1_OFF U(0xff4) +#define CID2_OFF U(0xff8) +#define CID3_OFF U(0xffc) + +/* + * What type of action is expected when an access violation occurs. + * The memory requested is returned as zero. But we can also raise an event to + * let the system know it happened. + * We can raise an interrupt(INT) and/or cause an exception(ERR). + * TZC_ACTION_NONE - No interrupt, no Exception + * TZC_ACTION_ERR - No interrupt, raise exception -> sync external + * data abort + * TZC_ACTION_INT - Raise interrupt, no exception + * TZC_ACTION_ERR_INT - Raise interrupt, raise exception -> sync + * external data abort + */ +#define TZC_ACTION_NONE U(0) +#define TZC_ACTION_ERR U(1) +#define TZC_ACTION_INT U(2) +#define TZC_ACTION_ERR_INT (TZC_ACTION_ERR | TZC_ACTION_INT) /* Bit positions of TZC_ACTION registers */ #define TZC_ACTION_RV_SHIFT 0 -#define TZC_ACTION_RV_MASK 0x3 -#define TZC_ACTION_RV_LOWOK 0x0 -#define TZC_ACTION_RV_LOWERR 0x1 -#define TZC_ACTION_RV_HIGHOK 0x2 -#define TZC_ACTION_RV_HIGHERR 0x3 +#define TZC_ACTION_RV_MASK U(0x3) +#define TZC_ACTION_RV_LOWOK U(0x0) +#define TZC_ACTION_RV_LOWERR U(0x1) +#define TZC_ACTION_RV_HIGHOK U(0x2) +#define TZC_ACTION_RV_HIGHERR U(0x3) + +/* + * Controls secure access to a region. If not enabled secure access is not + * allowed to region. + */ +#define TZC_REGION_S_NONE U(0) +#define TZC_REGION_S_RD U(1) +#define TZC_REGION_S_WR U(2) +#define TZC_REGION_S_RDWR (TZC_REGION_S_RD | TZC_REGION_S_WR) -/* Used along with 'tzc_region_attributes_t' below */ #define TZC_REGION_ATTR_S_RD_SHIFT 30 #define TZC_REGION_ATTR_S_WR_SHIFT 31 #define TZC_REGION_ATTR_F_EN_SHIFT 0 #define TZC_REGION_ATTR_SEC_SHIFT 30 -#define TZC_REGION_ATTR_S_RD_MASK 0x1 -#define TZC_REGION_ATTR_S_WR_MASK 0x1 -#define TZC_REGION_ATTR_SEC_MASK 0x3 +#define TZC_REGION_ATTR_S_RD_MASK U(0x1) +#define TZC_REGION_ATTR_S_WR_MASK U(0x1) +#define TZC_REGION_ATTR_SEC_MASK U(0x3) #define TZC_REGION_ACCESS_WR_EN_SHIFT 16 #define TZC_REGION_ACCESS_RD_EN_SHIFT 0 -#define TZC_REGION_ACCESS_ID_MASK 0xf +#define TZC_REGION_ACCESS_ID_MASK U(0xf) /* Macros for allowing Non-Secure access to a region based on NSAID */ #define TZC_REGION_ACCESS_RD(nsaid) \ - ((1 << ((nsaid) & TZC_REGION_ACCESS_ID_MASK)) << \ + ((U(1) << (nsaid & TZC_REGION_ACCESS_ID_MASK)) << \ TZC_REGION_ACCESS_RD_EN_SHIFT) #define TZC_REGION_ACCESS_WR(nsaid) \ - ((1 << ((nsaid) & TZC_REGION_ACCESS_ID_MASK)) << \ + ((U(1) << (nsaid & TZC_REGION_ACCESS_ID_MASK)) << \ TZC_REGION_ACCESS_WR_EN_SHIFT) #define TZC_REGION_ACCESS_RDWR(nsaid) \ (TZC_REGION_ACCESS_RD(nsaid) | \ TZC_REGION_ACCESS_WR(nsaid)) -#ifndef __ASSEMBLY__ - /* Returns offset of registers to program for a given region no */ #define TZC_REGION_OFFSET(region_size, region_no) \ ((region_size) * (region_no)) -/* - * What type of action is expected when an access violation occurs. - * The memory requested is returned as zero. But we can also raise an event to - * let the system know it happened. - * We can raise an interrupt(INT) and/or cause an exception(ERR). - * TZC_ACTION_NONE - No interrupt, no Exception - * TZC_ACTION_ERR - No interrupt, raise exception -> sync external - * data abort - * TZC_ACTION_INT - Raise interrupt, no exception - * TZC_ACTION_ERR_INT - Raise interrupt, raise exception -> sync - * external data abort - */ -typedef enum { - TZC_ACTION_NONE = 0, - TZC_ACTION_ERR = 1, - TZC_ACTION_INT = 2, - TZC_ACTION_ERR_INT = (TZC_ACTION_ERR | TZC_ACTION_INT) -} tzc_action_t; +#ifndef __ASSEMBLY__ -/* - * Controls secure access to a region. If not enabled secure access is not - * allowed to region. - */ -typedef enum { - TZC_REGION_S_NONE = 0, - TZC_REGION_S_RD = 1, - TZC_REGION_S_WR = 2, - TZC_REGION_S_RDWR = (TZC_REGION_S_RD | TZC_REGION_S_WR) -} tzc_region_attributes_t; +#if !ERROR_DEPRECATED +typedef unsigned int tzc_action_t; +typedef unsigned int tzc_region_attributes_t; +#endif #endif /* __ASSEMBLY__ */ -#endif /* __TZC_COMMON_H__ */ +#endif /* TZC_COMMON_H */ diff --git a/include/drivers/arm/tzc_dmc500.h b/include/drivers/arm/tzc_dmc500.h index ff58a279..df6e7f94 100644 --- a/include/drivers/arm/tzc_dmc500.h +++ b/include/drivers/arm/tzc_dmc500.h @@ -1,38 +1,39 @@ /* - * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __TZC_DMC500_H__ -#define __TZC_DMC500_H__ +#ifndef TZC_DMC500_H +#define TZC_DMC500_H #include <tzc_common.h> +#include <utils_def.h> -#define SI_STATUS_OFFSET 0x000 -#define SI_STATE_CTRL_OFFSET 0x030 -#define SI_FLUSH_CTRL_OFFSET 0x034 -#define SI_INT_CONTROL_OFFSET 0x048 +#define SI_STATUS_OFFSET U(0x000) +#define SI_STATE_CTRL_OFFSET U(0x030) +#define SI_FLUSH_CTRL_OFFSET U(0x034) +#define SI_INT_CONTROL_OFFSET U(0x048) -#define SI_INT_STATUS_OFFSET 0x004 -#define SI_TZ_FAIL_ADDRESS_LOW_OFFSET 0x008 -#define SI_TZ_FAIL_ADDRESS_HIGH_OFFSET 0x00c -#define SI_FAIL_CONTROL_OFFSET 0x010 -#define SI_FAIL_ID_OFFSET 0x014 -#define SI_INT_CLR_OFFSET 0x04c +#define SI_INT_STATUS_OFFSET U(0x004) +#define SI_TZ_FAIL_ADDRESS_LOW_OFFSET U(0x008) +#define SI_TZ_FAIL_ADDRESS_HIGH_OFFSET U(0x00c) +#define SI_FAIL_CONTROL_OFFSET U(0x010) +#define SI_FAIL_ID_OFFSET U(0x014) +#define SI_INT_CLR_OFFSET U(0x04c) /* * DMC-500 has 2 system interfaces each having a similar set of regs * to configure each interface. */ -#define SI0_BASE 0x0000 -#define SI1_BASE 0x0200 +#define SI0_BASE U(0x0000) +#define SI1_BASE U(0x0200) /* Bit positions of SIx_SI_STATUS */ -#define SI_EMPTY_SHIFT 0x01 -#define SI_STALL_ACK_SHIFT 0x00 -#define SI_EMPTY_MASK 0x01 -#define SI_STALL_ACK_MASK 0x01 +#define SI_EMPTY_SHIFT 1 +#define SI_STALL_ACK_SHIFT 0 +#define SI_EMPTY_MASK U(0x01) +#define SI_STALL_ACK_MASK U(0x01) /* Bit positions of SIx_SI_INT_STATUS */ #define PMU_REQ_INT_OVERFLOW_STATUS_SHIFT 18 @@ -40,11 +41,11 @@ #define PMU_REQ_INT_STATUS_SHIFT 2 #define FAILED_ACCESS_INT_INFO_TZ_OVERLAP_STATUS_SHIFT 1 #define FAILED_ACCESS_INT_STATUS_SHIFT 0 -#define PMU_REQ_INT_OVERFLOW_STATUS_MASK 0x1 -#define FAILED_ACCESS_INT_OVERFLOW_STATUS_MASK 0x1 -#define PMU_REQ_INT_STATUS_MASK 0x1 -#define FAILED_ACCESS_INT_INFO_TZ_OVERLAP_STATUS_MASK 0x1 -#define FAILED_ACCESS_INT_STATUS_MASK 0x1 +#define PMU_REQ_INT_OVERFLOW_STATUS_MASK U(0x1) +#define FAILED_ACCESS_INT_OVERFLOW_STATUS_MASK U(0x1) +#define PMU_REQ_INT_STATUS_MASK U(0x1) +#define FAILED_ACCESS_INT_INFO_TZ_OVERLAP_STATUS_MASK U(0x1) +#define FAILED_ACCESS_INT_STATUS_MASK U(0x1) /* Bit positions of SIx_TZ_FAIL_CONTROL */ #define DIRECTION_SHIFT 24 @@ -52,21 +53,21 @@ #define PRIVILEGED_SHIFT 20 #define FAILED_ACCESS_INT_INFO_RANK_MASKED_SHIFT 3 #define FAILED_ACCESS_INT_INFO_UNMAPPED_SHIFT 2 -#define FAILED_ACCESS_INT_TZ_FAIL_SHIFT 0x1 +#define FAILED_ACCESS_INT_TZ_FAIL_SHIFT 1 #define FAILED_ACCESS_INT_INFO_OUTSIDE_DEFAULT_SHIFT 0 -#define DIRECTION_MASK 0x1 -#define NON_SECURE_MASK 0x1 -#define PRIVILEGED_MASK 0x1 -#define FAILED_ACCESS_INT_INFO_RANK_MASKED_MASK 0x1 -#define FAILED_ACCESS_INT_INFO_UNMAPPED_MASK 0x1 -#define FAILED_ACCESS_INT_TZ_FAIL_MASK 1 -#define FAILED_ACCESS_INT_INFO_OUTSIDE_DEFAULT_MASK 0x1 +#define DIRECTION_MASK U(0x1) +#define NON_SECURE_MASK U(0x1) +#define PRIVILEGED_MASK U(0x1) +#define FAILED_ACCESS_INT_INFO_RANK_MASKED_MASK U(0x1) +#define FAILED_ACCESS_INT_INFO_UNMAPPED_MASK U(0x1) +#define FAILED_ACCESS_INT_TZ_FAIL_MASK U(0x1) +#define FAILED_ACCESS_INT_INFO_OUTSIDE_DEFAULT_MASK U(0x1) /* Bit positions of SIx_FAIL_STATUS */ #define FAIL_ID_VNET_SHIFT 24 #define FAIL_ID_ID_SHIFT 0 -#define FAIL_ID_VNET_MASK 0xf -#define FAIL_ID_ID_MASK 0xffffff +#define FAIL_ID_VNET_MASK U(0xf) +#define FAIL_ID_ID_MASK U(0xffffff) /* Bit positions of SIx_SI_STATE_CONTRL */ #define SI_STALL_REQ_GO 0x0 @@ -81,44 +82,44 @@ #define PMU_REQ_INT_EN_SHIFT 2 #define OVERLAP_DETECT_INT_EN_SHIFT 1 #define FAILED_ACCESS_INT_EN_SHIFT 0 -#define PMU_REQ_INT_EN_MASK 0x1 -#define OVERLAP_DETECT_INT_EN_MASK 0x1 -#define FAILED_ACCESS_INT_EN_MASK 0x1 -#define PMU_REQ_INT_EN 0x1 -#define OVERLAP_DETECT_INT_EN 0x1 -#define FAILED_ACCESS_INT_EN 0x1 +#define PMU_REQ_INT_EN_MASK U(0x1) +#define OVERLAP_DETECT_INT_EN_MASK U(0x1) +#define FAILED_ACCESS_INT_EN_MASK U(0x1) +#define PMU_REQ_INT_EN U(0x1) +#define OVERLAP_DETECT_INT_EN U(0x1) +#define FAILED_ACCESS_INT_EN U(0x1) /* Bit positions of SIx_SI_INT_CLR */ #define PMU_REQ_OFLOW_CLR_SHIFT 18 #define FAILED_ACCESS_OFLOW_CLR_SHIFT 16 #define PMU_REQ_INT_CLR_SHIFT 2 #define FAILED_ACCESS_INT_CLR_SHIFT 0 -#define PMU_REQ_OFLOW_CLR_MASK 0x1 -#define FAILED_ACCESS_OFLOW_CLR_MASK 0x1 -#define PMU_REQ_INT_CLR_MASK 0x1 -#define FAILED_ACCESS_INT_CLR_MASK 0x1 -#define PMU_REQ_OFLOW_CLR 0x1 -#define FAILED_ACCESS_OFLOW_CLR 0x1 -#define PMU_REQ_INT_CLR 0x1 -#define FAILED_ACCESS_INT_CLR 0x1 +#define PMU_REQ_OFLOW_CLR_MASK U(0x1) +#define FAILED_ACCESS_OFLOW_CLR_MASK U(0x1) +#define PMU_REQ_INT_CLR_MASK U(0x1) +#define FAILED_ACCESS_INT_CLR_MASK U(0x1) +#define PMU_REQ_OFLOW_CLR U(0x1) +#define FAILED_ACCESS_OFLOW_CLR U(0x1) +#define PMU_REQ_INT_CLR U(0x1) +#define FAILED_ACCESS_INT_CLR U(0x1) /* Macro to get the correct base register for a system interface */ #define IFACE_OFFSET(sys_if) ((sys_if) ? SI1_BASE : SI0_BASE) -#define MAX_SYS_IF_COUNT 2 +#define MAX_SYS_IF_COUNT U(2) #define MAX_REGION_VAL 8 /* DMC-500 supports striping across a max of 4 DMC instances */ #define MAX_DMC_COUNT 4 /* Consist of part_number_1 and part_number_0 */ -#define DMC500_PERIPHERAL_ID 0x0450 +#define DMC500_PERIPHERAL_ID U(0x0450) /* Filter enable bits in a TZC */ -#define TZC_DMC500_REGION_ATTR_F_EN_MASK 0x1 +#define TZC_DMC500_REGION_ATTR_F_EN_MASK U(0x1) /* Length of registers for configuring each region */ -#define TZC_DMC500_REGION_SIZE 0x018 +#define TZC_DMC500_REGION_SIZE U(0x018) #ifndef __ASSEMBLY__ @@ -134,18 +135,17 @@ typedef struct tzc_dmc500_driver_data { } tzc_dmc500_driver_data_t; void tzc_dmc500_driver_init(const tzc_dmc500_driver_data_t *plat_driver_data); -void tzc_dmc500_configure_region0(tzc_region_attributes_t sec_attr, +void tzc_dmc500_configure_region0(unsigned int sec_attr, unsigned int nsaid_permissions); -void tzc_dmc500_configure_region(int region_no, +void tzc_dmc500_configure_region(unsigned int region_no, unsigned long long region_base, unsigned long long region_top, - tzc_region_attributes_t sec_attr, + unsigned int sec_attr, unsigned int nsaid_permissions); -void tzc_dmc500_set_action(tzc_action_t action); +void tzc_dmc500_set_action(unsigned int action); void tzc_dmc500_config_complete(void); int tzc_dmc500_verify_complete(void); #endif /* __ASSEMBLY__ */ -#endif /* __TZC_DMC500_H__ */ - +#endif /* TZC_DMC500_H */ diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index a6022cb0..e6842e14 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -218,6 +218,8 @@ /* SCR definitions */ #define SCR_RES1_BITS ((U(1) << 4) | (U(1) << 5)) #define SCR_FIEN_BIT (U(1) << 21) +#define SCR_API_BIT (U(1) << 17) +#define SCR_APK_BIT (U(1) << 16) #define SCR_TWE_BIT (U(1) << 13) #define SCR_TWI_BIT (U(1) << 12) #define SCR_ST_BIT (U(1) << 11) @@ -274,6 +276,8 @@ #define VTTBR_BADDR_SHIFT U(0) /* HCR definitions */ +#define HCR_API_BIT (ULL(1) << 41) +#define HCR_APK_BIT (ULL(1) << 40) #define HCR_RW_SHIFT U(31) #define HCR_RW_BIT (ULL(1) << HCR_RW_SHIFT) #define HCR_AMO_BIT (ULL(1) << 5) diff --git a/include/lib/libc/string.h b/include/lib/libc/string.h index 050f6438..3c8e3b65 100644 --- a/include/lib/libc/string.h +++ b/include/lib/libc/string.h @@ -27,5 +27,6 @@ char *strchr(const char *s, int c); void *memset(void *dst, int val, size_t count); size_t strlen(const char *s); size_t strnlen(const char *s, size_t maxlen); +char *strrchr(const char *p, int ch); #endif /* STRING_H */ diff --git a/include/lib/libfdt/fdt.h b/include/lib/libfdt/fdt.h index c833dc1b..74961f90 100644 --- a/include/lib/libfdt/fdt.h +++ b/include/lib/libfdt/fdt.h @@ -1,5 +1,5 @@ -#ifndef _FDT_H -#define _FDT_H +#ifndef FDT_H +#define FDT_H /* * libfdt - Flat Device Tree manipulation * Copyright (C) 2006 David Gibson, IBM Corporation. @@ -52,16 +52,8 @@ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* - * Portions copyright (c) 2016-2017, ARM Limited and Contributors. - * All rights reserved. - */ - #ifndef __ASSEMBLY__ -#include <libfdt_env.h> - - struct fdt_header { fdt32_t magic; /* magic word FDT_MAGIC */ fdt32_t totalsize; /* total size of DT block */ @@ -88,14 +80,14 @@ struct fdt_reserve_entry { struct fdt_node_header { fdt32_t tag; - char name[]; + char name[0]; }; struct fdt_property { fdt32_t tag; fdt32_t len; fdt32_t nameoff; - char data[]; + char data[0]; }; #endif /* !__ASSEMBLY */ @@ -116,4 +108,4 @@ struct fdt_property { #define FDT_V16_SIZE FDT_V3_SIZE #define FDT_V17_SIZE (FDT_V16_SIZE + sizeof(fdt32_t)) -#endif /* _FDT_H */ +#endif /* FDT_H */ diff --git a/include/lib/libfdt/libfdt.h b/include/lib/libfdt/libfdt.h index f6623785..830b77e4 100644 --- a/include/lib/libfdt/libfdt.h +++ b/include/lib/libfdt/libfdt.h @@ -1,5 +1,5 @@ -#ifndef _LIBFDT_H -#define _LIBFDT_H +#ifndef LIBFDT_H +#define LIBFDT_H /* * libfdt - Flat Device Tree manipulation * Copyright (C) 2006 David Gibson, IBM Corporation. @@ -51,22 +51,17 @@ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* - * Portions copyright (c) 2016-2017, ARM Limited and Contributors. - * All rights reserved. - */ - #include <libfdt_env.h> #include <fdt.h> -#define FDT_FIRST_SUPPORTED_VERSION 0x10 +#define FDT_FIRST_SUPPORTED_VERSION 0x02 #define FDT_LAST_SUPPORTED_VERSION 0x11 /* Error codes: informative error codes */ #define FDT_ERR_NOTFOUND 1 /* FDT_ERR_NOTFOUND: The requested node or property does not exist */ #define FDT_ERR_EXISTS 2 - /* FDT_ERR_EXISTS: Attemped to create a node or property which + /* FDT_ERR_EXISTS: Attempted to create a node or property which * already exists */ #define FDT_ERR_NOSPACE 3 /* FDT_ERR_NOSPACE: Operation needed to expand the device @@ -84,8 +79,10 @@ * (e.g. missing a leading / for a function which requires an * absolute path) */ #define FDT_ERR_BADPHANDLE 6 - /* FDT_ERR_BADPHANDLE: Function was passed an invalid phandle - * value. phandle values of 0 and -1 are not permitted. */ + /* FDT_ERR_BADPHANDLE: Function was passed an invalid phandle. + * This can be caused either by an invalid phandle property + * length, or the phandle value was either 0 or -1, which are + * not permitted. */ #define FDT_ERR_BADSTATE 7 /* FDT_ERR_BADSTATE: Function was passed an incomplete device * tree created by the sequential-write functions, which is @@ -93,8 +90,9 @@ /* Error codes: codes for bad device tree blobs */ #define FDT_ERR_TRUNCATED 8 - /* FDT_ERR_TRUNCATED: Structure block of the given device tree - * ends without an FDT_END tag. */ + /* FDT_ERR_TRUNCATED: FDT or a sub-block is improperly + * terminated (overflows, goes outside allowed bounds, or + * isn't properly terminated). */ #define FDT_ERR_BADMAGIC 9 /* FDT_ERR_BADMAGIC: Given "device tree" appears not to be a * device tree at all - it is missing the flattened device @@ -131,13 +129,24 @@ * value. For example: a property expected to contain a string list * is not NUL-terminated within the length of its value. */ -#define FDT_ERR_MAX 15 +#define FDT_ERR_BADOVERLAY 16 + /* FDT_ERR_BADOVERLAY: The device tree overlay, while + * correctly structured, cannot be applied due to some + * unexpected or missing value, property or node. */ + +#define FDT_ERR_NOPHANDLES 17 + /* FDT_ERR_NOPHANDLES: The device tree doesn't have any + * phandle available anymore without causing an overflow */ + +#define FDT_ERR_MAX 17 /**********************************************************************/ /* Low-level functions (you probably don't need these) */ /**********************************************************************/ +#ifndef SWIG /* This function is not useful in Python */ const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int checklen); +#endif static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen) { return (void *)(uintptr_t)fdt_offset_ptr(fdt, offset, checklen); @@ -145,6 +154,29 @@ static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen) uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset); +/* + * Alignment helpers: + * These helpers access words from a device tree blob. They're + * built to work even with unaligned pointers on platforms (ike + * ARM) that don't like unaligned loads and stores + */ + +static inline uint32_t fdt32_ld(const fdt32_t *p) +{ + fdt32_t v; + + memcpy(&v, p, sizeof(v)); + return fdt32_to_cpu(v); +} + +static inline uint64_t fdt64_ld(const fdt64_t *p) +{ + fdt64_t v; + + memcpy(&v, p, sizeof(v)); + return fdt64_to_cpu(v); +} + /**********************************************************************/ /* Traversal functions */ /**********************************************************************/ @@ -204,9 +236,8 @@ int fdt_next_subnode(const void *fdt, int offset); /**********************************************************************/ /* General functions */ /**********************************************************************/ - #define fdt_get_header(fdt, field) \ - (fdt32_to_cpu(((const struct fdt_header *)(fdt))->field)) + (fdt32_ld(&((const struct fdt_header *)(fdt))->field)) #define fdt_magic(fdt) (fdt_get_header(fdt, magic)) #define fdt_totalsize(fdt) (fdt_get_header(fdt, totalsize)) #define fdt_off_dt_struct(fdt) (fdt_get_header(fdt, off_dt_struct)) @@ -218,37 +249,50 @@ int fdt_next_subnode(const void *fdt, int offset); #define fdt_size_dt_strings(fdt) (fdt_get_header(fdt, size_dt_strings)) #define fdt_size_dt_struct(fdt) (fdt_get_header(fdt, size_dt_struct)) -#define __fdt_set_hdr(name) \ +#define fdt_set_hdr_(name) \ static inline void fdt_set_##name(void *fdt, uint32_t val) \ { \ struct fdt_header *fdth = (struct fdt_header *)fdt; \ fdth->name = cpu_to_fdt32(val); \ } -__fdt_set_hdr(magic) -__fdt_set_hdr(totalsize) -__fdt_set_hdr(off_dt_struct) -__fdt_set_hdr(off_dt_strings) -__fdt_set_hdr(off_mem_rsvmap) -__fdt_set_hdr(version) -__fdt_set_hdr(last_comp_version) -__fdt_set_hdr(boot_cpuid_phys) -__fdt_set_hdr(size_dt_strings) -__fdt_set_hdr(size_dt_struct) -#undef __fdt_set_hdr - -/** - * fdt_check_header - sanity check a device tree or possible device tree +fdt_set_hdr_(magic); +fdt_set_hdr_(totalsize); +fdt_set_hdr_(off_dt_struct); +fdt_set_hdr_(off_dt_strings); +fdt_set_hdr_(off_mem_rsvmap); +fdt_set_hdr_(version); +fdt_set_hdr_(last_comp_version); +fdt_set_hdr_(boot_cpuid_phys); +fdt_set_hdr_(size_dt_strings); +fdt_set_hdr_(size_dt_struct); +#undef fdt_set_hdr_ + +/** + * fdt_header_size - return the size of the tree's header + * @fdt: pointer to a flattened device tree + */ +size_t fdt_header_size_(uint32_t version); +static inline size_t fdt_header_size(const void *fdt) +{ + return fdt_header_size_(fdt_version(fdt)); +} + +/** + * fdt_check_header - sanity check a device tree header + * @fdt: pointer to data which might be a flattened device tree * * fdt_check_header() checks that the given buffer contains what - * appears to be a flattened device tree with sane information in its - * header. + * appears to be a flattened device tree, and that the header contains + * valid information (to the extent that can be determined from the + * header alone). * * returns: * 0, if the buffer appears to contain a valid device tree * -FDT_ERR_BADMAGIC, * -FDT_ERR_BADVERSION, - * -FDT_ERR_BADSTATE, standard meanings, as above + * -FDT_ERR_BADSTATE, + * -FDT_ERR_TRUNCATED, standard meanings, as above */ int fdt_check_header(const void *fdt); @@ -277,6 +321,24 @@ int fdt_move(const void *fdt, void *buf, int bufsize); /* Read-only functions */ /**********************************************************************/ +int fdt_check_full(const void *fdt, size_t bufsize); + +/** + * fdt_get_string - retrieve a string from the strings block of a device tree + * @fdt: pointer to the device tree blob + * @stroffset: offset of the string within the strings block (native endian) + * @lenp: optional pointer to return the string's length + * + * fdt_get_string() retrieves a pointer to a single string from the + * strings block of the device tree blob at fdt, and optionally also + * returns the string's length in *lenp. + * + * returns: + * a pointer to the string, on success + * NULL, if stroffset is out of bounds, or doesn't point to a valid string + */ +const char *fdt_get_string(const void *fdt, int stroffset, int *lenp); + /** * fdt_string - retrieve a string from the strings block of a device tree * @fdt: pointer to the device tree blob @@ -287,7 +349,7 @@ int fdt_move(const void *fdt, void *buf, int bufsize); * * returns: * a pointer to the string, on success - * NULL, if stroffset is out of bounds + * NULL, if stroffset is out of bounds, or doesn't point to a valid string */ const char *fdt_string(const void *fdt, int stroffset); @@ -348,8 +410,10 @@ int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size); * useful for finding subnodes based on a portion of a larger string, * such as a full path. */ +#ifndef SWIG /* Not available in Python */ int fdt_subnode_offset_namelen(const void *fdt, int parentoffset, const char *name, int namelen); +#endif /** * fdt_subnode_offset - find a subnode of a given node * @fdt: pointer to the device tree blob @@ -385,7 +449,9 @@ int fdt_subnode_offset(const void *fdt, int parentoffset, const char *name); * Identical to fdt_path_offset(), but only consider the first namelen * characters of path as the path name. */ +#ifndef SWIG /* Not available in Python */ int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen); +#endif /** * fdt_path_offset - find a tree node by its full path @@ -516,6 +582,9 @@ int fdt_next_property_offset(const void *fdt, int offset); * offset. If lenp is non-NULL, the length of the property value is * also returned, in the integer pointed to by lenp. * + * Note that this code only works on device tree versions >= 16. fdt_getprop() + * works on all versions. + * * returns: * pointer to the structure representing the property * if lenp is non-NULL, *lenp contains the length of the property @@ -544,10 +613,12 @@ const struct fdt_property *fdt_get_property_by_offset(const void *fdt, * Identical to fdt_get_property(), but only examine the first namelen * characters of name for matching the property name. */ +#ifndef SWIG /* Not available in Python */ const struct fdt_property *fdt_get_property_namelen(const void *fdt, int nodeoffset, const char *name, int namelen, int *lenp); +#endif /** * fdt_get_property - find a given property in a given node @@ -618,8 +689,10 @@ static inline struct fdt_property *fdt_get_property_w(void *fdt, int nodeoffset, * -FDT_ERR_BADSTRUCTURE, * -FDT_ERR_TRUNCATED, standard meanings */ +#ifndef SWIG /* This function is not useful in Python */ const void *fdt_getprop_by_offset(const void *fdt, int offset, const char **namep, int *lenp); +#endif /** * fdt_getprop_namelen - get property value based on substring @@ -632,6 +705,7 @@ const void *fdt_getprop_by_offset(const void *fdt, int offset, * Identical to fdt_getprop(), but only examine the first namelen * characters of name for matching the property name. */ +#ifndef SWIG /* Not available in Python */ const void *fdt_getprop_namelen(const void *fdt, int nodeoffset, const char *name, int namelen, int *lenp); static inline void *fdt_getprop_namelen_w(void *fdt, int nodeoffset, @@ -641,6 +715,7 @@ static inline void *fdt_getprop_namelen_w(void *fdt, int nodeoffset, return (void *)(uintptr_t)fdt_getprop_namelen(fdt, nodeoffset, name, namelen, lenp); } +#endif /** * fdt_getprop - retrieve the value of a given property @@ -701,11 +776,13 @@ uint32_t fdt_get_phandle(const void *fdt, int nodeoffset); * Identical to fdt_get_alias(), but only examine the first namelen * characters of name for matching the alias name. */ +#ifndef SWIG /* Not available in Python */ const char *fdt_get_alias_namelen(const void *fdt, const char *name, int namelen); +#endif /** - * fdt_get_alias - retreive the path referenced by a given alias + * fdt_get_alias - retrieve the path referenced by a given alias * @fdt: pointer to the device tree blob * @name: name of the alias th look up * @@ -1068,7 +1145,7 @@ int fdt_address_cells(const void *fdt, int nodeoffset); * * returns: * 0 <= n < FDT_MAX_NCELLS, on success - * 2, if the node has no #address-cells property + * 2, if the node has no #size-cells property * -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid * #size-cells property * -FDT_ERR_BADMAGIC, @@ -1100,10 +1177,12 @@ int fdt_size_cells(const void *fdt, int nodeoffset); * of the name. It is useful when you want to manipulate only one value of * an array and you have a string that doesn't end with \0. */ +#ifndef SWIG /* Not available in Python */ int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset, const char *name, int namelen, uint32_t idx, const void *val, int len); +#endif /** * fdt_setprop_inplace - change a property's value, but not its size @@ -1133,8 +1212,10 @@ int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset, * -FDT_ERR_BADSTRUCTURE, * -FDT_ERR_TRUNCATED, standard meanings */ +#ifndef SWIG /* Not available in Python */ int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name, const void *val, int len); +#endif /** * fdt_setprop_inplace_u32 - change the value of a 32-bit integer property @@ -1287,10 +1368,29 @@ static inline int fdt_property_u64(void *fdt, const char *name, uint64_t val) fdt64_t tmp = cpu_to_fdt64(val); return fdt_property(fdt, name, &tmp, sizeof(tmp)); } + +#ifndef SWIG /* Not available in Python */ static inline int fdt_property_cell(void *fdt, const char *name, uint32_t val) { return fdt_property_u32(fdt, name, val); } +#endif + +/** + * fdt_property_placeholder - add a new property and return a ptr to its value + * + * @fdt: pointer to the device tree blob + * @name: name of property to add + * @len: length of property value in bytes + * @valp: returns a pointer to where where the value should be placed + * + * returns: + * 0, on success + * -FDT_ERR_BADMAGIC, + * -FDT_ERR_NOSPACE, standard meanings + */ +int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp); + #define fdt_property_string(fdt, name, str) \ fdt_property(fdt, name, str, strlen(str)+1) int fdt_end_node(void *fdt); @@ -1410,6 +1510,37 @@ int fdt_setprop(void *fdt, int nodeoffset, const char *name, const void *val, int len); /** + * fdt_setprop_placeholder - allocate space for a property + * @fdt: pointer to the device tree blob + * @nodeoffset: offset of the node whose property to change + * @name: name of the property to change + * @len: length of the property value + * @prop_data: return pointer to property data + * + * fdt_setprop_placeholer() allocates the named property in the given node. + * If the property exists it is resized. In either case a pointer to the + * property data is returned. + * + * This function may insert or delete data from the blob, and will + * therefore change the offsets of some existing nodes. + * + * returns: + * 0, on success + * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to + * contain the new property value + * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag + * -FDT_ERR_BADLAYOUT, + * -FDT_ERR_BADMAGIC, + * -FDT_ERR_BADVERSION, + * -FDT_ERR_BADSTATE, + * -FDT_ERR_BADSTRUCTURE, + * -FDT_ERR_BADLAYOUT, + * -FDT_ERR_TRUNCATED, standard meanings + */ +int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name, + int len, void **prop_data); + +/** * fdt_setprop_u32 - set a property to a 32-bit integer * @fdt: pointer to the device tree blob * @nodeoffset: offset of the node whose property to change @@ -1521,6 +1652,36 @@ static inline int fdt_setprop_cell(void *fdt, int nodeoffset, const char *name, #define fdt_setprop_string(fdt, nodeoffset, name, str) \ fdt_setprop((fdt), (nodeoffset), (name), (str), strlen(str)+1) + +/** + * fdt_setprop_empty - set a property to an empty value + * @fdt: pointer to the device tree blob + * @nodeoffset: offset of the node whose property to change + * @name: name of the property to change + * + * fdt_setprop_empty() sets the value of the named property in the + * given node to an empty (zero length) value, or creates a new empty + * property if it does not already exist. + * + * This function may insert or delete data from the blob, and will + * therefore change the offsets of some existing nodes. + * + * returns: + * 0, on success + * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to + * contain the new property value + * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag + * -FDT_ERR_BADLAYOUT, + * -FDT_ERR_BADMAGIC, + * -FDT_ERR_BADVERSION, + * -FDT_ERR_BADSTATE, + * -FDT_ERR_BADSTRUCTURE, + * -FDT_ERR_BADLAYOUT, + * -FDT_ERR_TRUNCATED, standard meanings + */ +#define fdt_setprop_empty(fdt, nodeoffset, name) \ + fdt_setprop((fdt), (nodeoffset), (name), NULL, 0) + /** * fdt_appendprop - append to or create a property * @fdt: pointer to the device tree blob @@ -1698,8 +1859,10 @@ int fdt_delprop(void *fdt, int nodeoffset, const char *name); * creating subnodes based on a portion of a larger string, such as a * full path. */ +#ifndef SWIG /* Not available in Python */ int fdt_add_subnode_namelen(void *fdt, int parentoffset, const char *name, int namelen); +#endif /** * fdt_add_subnode - creates a new node @@ -1757,10 +1920,41 @@ int fdt_add_subnode(void *fdt, int parentoffset, const char *name); */ int fdt_del_node(void *fdt, int nodeoffset); +/** + * fdt_overlay_apply - Applies a DT overlay on a base DT + * @fdt: pointer to the base device tree blob + * @fdto: pointer to the device tree overlay blob + * + * fdt_overlay_apply() will apply the given device tree overlay on the + * given base device tree. + * + * Expect the base device tree to be modified, even if the function + * returns an error. + * + * returns: + * 0, on success + * -FDT_ERR_NOSPACE, there's not enough space in the base device tree + * -FDT_ERR_NOTFOUND, the overlay points to some inexistant nodes or + * properties in the base DT + * -FDT_ERR_BADPHANDLE, + * -FDT_ERR_BADOVERLAY, + * -FDT_ERR_NOPHANDLES, + * -FDT_ERR_INTERNAL, + * -FDT_ERR_BADLAYOUT, + * -FDT_ERR_BADMAGIC, + * -FDT_ERR_BADOFFSET, + * -FDT_ERR_BADPATH, + * -FDT_ERR_BADVERSION, + * -FDT_ERR_BADSTRUCTURE, + * -FDT_ERR_BADSTATE, + * -FDT_ERR_TRUNCATED, standard meanings + */ +int fdt_overlay_apply(void *fdt, void *fdto); + /**********************************************************************/ /* Debugging / informational functions */ /**********************************************************************/ const char *fdt_strerror(int errval); -#endif /* _LIBFDT_H */ +#endif /* LIBFDT_H */ diff --git a/include/lib/libfdt/libfdt_env.h b/include/lib/libfdt/libfdt_env.h index 9dea97df..eb205384 100644 --- a/include/lib/libfdt/libfdt_env.h +++ b/include/lib/libfdt/libfdt_env.h @@ -1,5 +1,5 @@ -#ifndef _LIBFDT_ENV_H -#define _LIBFDT_ENV_H +#ifndef LIBFDT_ENV_H +#define LIBFDT_ENV_H /* * libfdt - Flat Device Tree manipulation * Copyright (C) 2006 David Gibson, IBM Corporation. @@ -54,19 +54,21 @@ #include <stddef.h> #include <stdint.h> +#include <stdlib.h> #include <string.h> +#include <limits.h> #ifdef __CHECKER__ -#define __force __attribute__((force)) -#define __bitwise __attribute__((bitwise)) +#define FDT_FORCE __attribute__((force)) +#define FDT_BITWISE __attribute__((bitwise)) #else -#define __force -#define __bitwise +#define FDT_FORCE +#define FDT_BITWISE #endif -typedef uint16_t __bitwise fdt16_t; -typedef uint32_t __bitwise fdt32_t; -typedef uint64_t __bitwise fdt64_t; +typedef uint16_t FDT_BITWISE fdt16_t; +typedef uint32_t FDT_BITWISE fdt32_t; +typedef uint64_t FDT_BITWISE fdt64_t; #define EXTRACT_BYTE(x, n) ((unsigned long long)((uint8_t *)&x)[n]) #define CPU_TO_FDT16(x) ((EXTRACT_BYTE(x, 0) << 8) | EXTRACT_BYTE(x, 1)) @@ -79,33 +81,60 @@ typedef uint64_t __bitwise fdt64_t; static inline uint16_t fdt16_to_cpu(fdt16_t x) { - return (__force uint16_t)CPU_TO_FDT16(x); + return (FDT_FORCE uint16_t)CPU_TO_FDT16(x); } static inline fdt16_t cpu_to_fdt16(uint16_t x) { - return (__force fdt16_t)CPU_TO_FDT16(x); + return (FDT_FORCE fdt16_t)CPU_TO_FDT16(x); } static inline uint32_t fdt32_to_cpu(fdt32_t x) { - return (__force uint32_t)CPU_TO_FDT32(x); + return (FDT_FORCE uint32_t)CPU_TO_FDT32(x); } static inline fdt32_t cpu_to_fdt32(uint32_t x) { - return (__force fdt32_t)CPU_TO_FDT32(x); + return (FDT_FORCE fdt32_t)CPU_TO_FDT32(x); } static inline uint64_t fdt64_to_cpu(fdt64_t x) { - return (__force uint64_t)CPU_TO_FDT64(x); + return (FDT_FORCE uint64_t)CPU_TO_FDT64(x); } static inline fdt64_t cpu_to_fdt64(uint64_t x) { - return (__force fdt64_t)CPU_TO_FDT64(x); + return (FDT_FORCE fdt64_t)CPU_TO_FDT64(x); } #undef CPU_TO_FDT64 #undef CPU_TO_FDT32 #undef CPU_TO_FDT16 #undef EXTRACT_BYTE -#endif /* _LIBFDT_ENV_H */ +#ifdef __APPLE__ +#include <AvailabilityMacros.h> + +/* strnlen() is not available on Mac OS < 10.7 */ +# if !defined(MAC_OS_X_VERSION_10_7) || (MAC_OS_X_VERSION_MAX_ALLOWED < \ + MAC_OS_X_VERSION_10_7) + +#define strnlen fdt_strnlen + +/* + * fdt_strnlen: returns the length of a string or max_count - which ever is + * smallest. + * Input 1 string: the string whose size is to be determined + * Input 2 max_count: the maximum value returned by this function + * Output: length of the string or max_count (the smallest of the two) + */ +static inline size_t fdt_strnlen(const char *string, size_t max_count) +{ + const char *p = memchr(string, 0, max_count); + return p ? p - string : max_count; +} + +#endif /* !defined(MAC_OS_X_VERSION_10_7) || (MAC_OS_X_VERSION_MAX_ALLOWED < + MAC_OS_X_VERSION_10_7) */ + +#endif /* __APPLE__ */ + +#endif /* LIBFDT_ENV_H */ diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h index d5f5c15a..0f5b57f4 100644 --- a/include/plat/arm/common/arm_def.h +++ b/include/plat/arm/common/arm_def.h @@ -53,9 +53,9 @@ #define ARM_DRAM_ID 2 /* The first 4KB of Trusted SRAM are used as shared memory */ -#define ARM_TRUSTED_SRAM_BASE 0x04000000 +#define ARM_TRUSTED_SRAM_BASE UL(0x04000000) #define ARM_SHARED_RAM_BASE ARM_TRUSTED_SRAM_BASE -#define ARM_SHARED_RAM_SIZE 0x00001000 /* 4 KB */ +#define ARM_SHARED_RAM_SIZE UL(0x00001000) /* 4 KB */ /* The remaining Trusted SRAM is used to load the BL images */ #define ARM_BL_RAM_BASE (ARM_SHARED_RAM_BASE + \ @@ -68,7 +68,7 @@ * - SCP TZC DRAM: If present, DRAM reserved for SCP use * - AP TZC DRAM: The remaining TZC secured DRAM reserved for AP use */ -#define ARM_TZC_DRAM1_SIZE ULL(0x01000000) +#define ARM_TZC_DRAM1_SIZE UL(0x01000000) #define ARM_SCP_TZC_DRAM1_BASE (ARM_DRAM1_BASE + \ ARM_DRAM1_SIZE - \ @@ -84,7 +84,7 @@ * placed here. */ #define ARM_EL3_TZC_DRAM1_BASE (ARM_SCP_TZC_DRAM1_BASE - ARM_EL3_TZC_DRAM1_SIZE) -#define ARM_EL3_TZC_DRAM1_SIZE ULL(0x00200000) /* 2 MB */ +#define ARM_EL3_TZC_DRAM1_SIZE UL(0x00200000) /* 2 MB */ #define ARM_EL3_TZC_DRAM1_END (ARM_EL3_TZC_DRAM1_BASE + \ ARM_EL3_TZC_DRAM1_SIZE - 1) @@ -122,7 +122,7 @@ #define ARM_OPTEE_PAGEABLE_LOAD_BASE (ARM_AP_TZC_DRAM1_BASE + \ ARM_AP_TZC_DRAM1_SIZE - \ ARM_OPTEE_PAGEABLE_LOAD_SIZE) -#define ARM_OPTEE_PAGEABLE_LOAD_SIZE 0x400000 +#define ARM_OPTEE_PAGEABLE_LOAD_SIZE UL(0x400000) #define ARM_OPTEE_PAGEABLE_LOAD_MEM MAP_REGION_FLAT( \ ARM_OPTEE_PAGEABLE_LOAD_BASE, \ ARM_OPTEE_PAGEABLE_LOAD_SIZE, \ @@ -144,12 +144,12 @@ #define ARM_NS_DRAM1_END (ARM_NS_DRAM1_BASE + \ ARM_NS_DRAM1_SIZE - 1) -#define ARM_DRAM1_BASE ULL(0x80000000) -#define ARM_DRAM1_SIZE ULL(0x80000000) +#define ARM_DRAM1_BASE UL(0x80000000) +#define ARM_DRAM1_SIZE UL(0x80000000) #define ARM_DRAM1_END (ARM_DRAM1_BASE + \ ARM_DRAM1_SIZE - 1) -#define ARM_DRAM2_BASE ULL(0x880000000) +#define ARM_DRAM2_BASE UL(0x880000000) #define ARM_DRAM2_SIZE PLAT_ARM_DRAM2_SIZE #define ARM_DRAM2_END (ARM_DRAM2_BASE + \ ARM_DRAM2_SIZE - 1) @@ -293,16 +293,16 @@ ARM_BL_REGIONS) /* Memory mapped Generic timer interfaces */ -#define ARM_SYS_CNTCTL_BASE 0x2a430000 -#define ARM_SYS_CNTREAD_BASE 0x2a800000 -#define ARM_SYS_TIMCTL_BASE 0x2a810000 -#define ARM_SYS_CNT_BASE_S 0x2a820000 -#define ARM_SYS_CNT_BASE_NS 0x2a830000 +#define ARM_SYS_CNTCTL_BASE UL(0x2a430000) +#define ARM_SYS_CNTREAD_BASE UL(0x2a800000) +#define ARM_SYS_TIMCTL_BASE UL(0x2a810000) +#define ARM_SYS_CNT_BASE_S UL(0x2a820000) +#define ARM_SYS_CNT_BASE_NS UL(0x2a830000) #define ARM_CONSOLE_BAUDRATE 115200 /* Trusted Watchdog constants */ -#define ARM_SP805_TWDG_BASE 0x2a490000 +#define ARM_SP805_TWDG_BASE UL(0x2a490000) #define ARM_SP805_TWDG_CLK_HZ 32768 /* The TBBR document specifies a watchdog timeout of 256 seconds. SP805 * asserts reset after two consecutive countdowns (2 x 128 = 256 sec) */ @@ -344,7 +344,7 @@ * This is known only to the platform as it might have a combination of * integrated and external caches. */ -#define CACHE_WRITEBACK_GRANULE (1 << ARM_CACHE_WRITEBACK_SHIFT) +#define CACHE_WRITEBACK_GRANULE (U(1) << ARM_CACHE_WRITEBACK_SHIFT) /* * To enable TB_FW_CONFIG to be loaded by BL1, define the corresponding base diff --git a/include/plat/arm/common/plat_arm.h b/include/plat/arm/common/plat_arm.h index 848f4eea..773c3603 100644 --- a/include/plat/arm/common/plat_arm.h +++ b/include/plat/arm/common/plat_arm.h @@ -25,7 +25,7 @@ struct bl_params; typedef struct arm_tzc_regions_info { unsigned long long base; unsigned long long end; - tzc_region_attributes_t sec_attr; + unsigned int sec_attr; unsigned int nsaid_permissions; } arm_tzc_regions_info_t; |