diff options
Diffstat (limited to 'lib/extensions/amu/aarch32/amu.c')
| -rw-r--r-- | lib/extensions/amu/aarch32/amu.c | 39 |
1 files changed, 20 insertions, 19 deletions
diff --git a/lib/extensions/amu/aarch32/amu.c b/lib/extensions/amu/aarch32/amu.c index 05c98f1c..585d908f 100644 --- a/lib/extensions/amu/aarch32/amu.c +++ b/lib/extensions/amu/aarch32/amu.c @@ -10,6 +10,7 @@ #include <arch_helpers.h> #include <platform.h> #include <pubsub_events.h> +#include <stdbool.h> #define AMU_GROUP0_NR_COUNTERS 4 @@ -20,17 +21,17 @@ struct amu_ctx { static struct amu_ctx amu_ctxs[PLATFORM_CORE_COUNT]; -int amu_supported(void) +bool amu_supported(void) { uint64_t features; features = read_id_pfr0() >> ID_PFR0_AMU_SHIFT; - return (features & ID_PFR0_AMU_MASK) == 1; + return (features & ID_PFR0_AMU_MASK) == 1U; } -void amu_enable(int el2_unused) +void amu_enable(bool el2_unused) { - if (amu_supported() == 0) + if (!amu_supported()) return; if (el2_unused) { @@ -54,8 +55,8 @@ void amu_enable(int el2_unused) /* Read the group 0 counter identified by the given `idx`. */ uint64_t amu_group0_cnt_read(int idx) { - assert(amu_supported() != 0); - assert(idx >= 0 && idx < AMU_GROUP0_NR_COUNTERS); + assert(amu_supported()); + assert((idx >= 0) && (idx < AMU_GROUP0_NR_COUNTERS)); return amu_group0_cnt_read_internal(idx); } @@ -63,8 +64,8 @@ uint64_t amu_group0_cnt_read(int idx) /* Write the group 0 counter identified by the given `idx` with `val`. */ void amu_group0_cnt_write(int idx, uint64_t val) { - assert(amu_supported() != 0); - assert(idx >= 0 && idx < AMU_GROUP0_NR_COUNTERS); + assert(amu_supported()); + assert((idx >= 0) && (idx < AMU_GROUP0_NR_COUNTERS)); amu_group0_cnt_write_internal(idx, val); isb(); @@ -73,8 +74,8 @@ void amu_group0_cnt_write(int idx, uint64_t val) /* Read the group 1 counter identified by the given `idx`. */ uint64_t amu_group1_cnt_read(int idx) { - assert(amu_supported() != 0); - assert(idx >= 0 && idx < AMU_GROUP1_NR_COUNTERS); + assert(amu_supported()); + assert((idx >= 0) && (idx < AMU_GROUP1_NR_COUNTERS)); return amu_group1_cnt_read_internal(idx); } @@ -82,8 +83,8 @@ uint64_t amu_group1_cnt_read(int idx) /* Write the group 1 counter identified by the given `idx` with `val`. */ void amu_group1_cnt_write(int idx, uint64_t val) { - assert(amu_supported() != 0); - assert(idx >= 0 && idx < AMU_GROUP1_NR_COUNTERS); + assert(amu_supported()); + assert((idx >= 0) && (idx < AMU_GROUP1_NR_COUNTERS)); amu_group1_cnt_write_internal(idx, val); isb(); @@ -91,8 +92,8 @@ void amu_group1_cnt_write(int idx, uint64_t val) void amu_group1_set_evtype(int idx, unsigned int val) { - assert(amu_supported() != 0); - assert(idx >= 0 && idx < AMU_GROUP1_NR_COUNTERS); + assert(amu_supported()); + assert((idx >= 0) && (idx < AMU_GROUP1_NR_COUNTERS)); amu_group1_set_evtype_internal(idx, val); isb(); @@ -103,7 +104,7 @@ static void *amu_context_save(const void *arg) struct amu_ctx *ctx; int i; - if (amu_supported() == 0) + if (!amu_supported()) return (void *)-1; ctx = &amu_ctxs[plat_my_core_pos()]; @@ -126,7 +127,7 @@ static void *amu_context_save(const void *arg) for (i = 0; i < AMU_GROUP1_NR_COUNTERS; i++) ctx->group1_cnts[i] = amu_group1_cnt_read(i); - return 0; + return (void *)0; } static void *amu_context_restore(const void *arg) @@ -134,13 +135,13 @@ static void *amu_context_restore(const void *arg) struct amu_ctx *ctx; int i; - if (amu_supported() == 0) + if (!amu_supported()) return (void *)-1; ctx = &amu_ctxs[plat_my_core_pos()]; /* Counters were disabled in `amu_context_save()` */ - assert(read_amcntenset0() == 0 && read_amcntenset1() == 0); + assert((read_amcntenset0() == 0U) && (read_amcntenset1() == 0U)); /* Restore group 0 counters */ for (i = 0; i < AMU_GROUP0_NR_COUNTERS; i++) @@ -153,7 +154,7 @@ static void *amu_context_restore(const void *arg) /* Enable group 1 counters */ write_amcntenset1(AMU_GROUP1_COUNTERS_MASK); - return 0; + return (void *)0; } SUBSCRIBE_TO_EVENT(psci_suspend_pwrdown_start, amu_context_save); |