diff options
Diffstat (limited to 'lib')
-rw-r--r-- | lib/cpus/aarch64/cortex_a57.S | 4 | ||||
-rw-r--r-- | lib/cpus/aarch64/cortex_a72.S | 10 | ||||
-rw-r--r-- | lib/cpus/aarch64/cortex_a73.S | 9 | ||||
-rw-r--r-- | lib/cpus/aarch64/cortex_a75.S | 23 | ||||
-rw-r--r-- | lib/cpus/aarch64/cpu_helpers.S | 37 | ||||
-rw-r--r-- | lib/el3_runtime/aarch32/context_mgmt.c | 4 | ||||
-rw-r--r-- | lib/el3_runtime/aarch64/context_mgmt.c | 4 | ||||
-rw-r--r-- | lib/pmf/pmf_smc.c | 4 | ||||
-rw-r--r-- | lib/psci/psci_main.c | 2 | ||||
-rw-r--r-- | lib/stdlib/puts.c | 20 |
10 files changed, 70 insertions, 47 deletions
diff --git a/lib/cpus/aarch64/cortex_a57.S b/lib/cpus/aarch64/cortex_a57.S index c82ebfc9..4d072e11 100644 --- a/lib/cpus/aarch64/cortex_a57.S +++ b/lib/cpus/aarch64/cortex_a57.S @@ -555,8 +555,8 @@ func cortex_a57_cpu_reg_dump ret endfunc cortex_a57_cpu_reg_dump - -declare_cpu_ops cortex_a57, CORTEX_A57_MIDR, \ +declare_cpu_ops_workaround_cve_2017_5715 cortex_a57, CORTEX_A57_MIDR, \ cortex_a57_reset_func, \ + check_errata_cve_2017_5715, \ cortex_a57_core_pwr_dwn, \ cortex_a57_cluster_pwr_dwn diff --git a/lib/cpus/aarch64/cortex_a72.S b/lib/cpus/aarch64/cortex_a72.S index 9633aa8f..29fa77b9 100644 --- a/lib/cpus/aarch64/cortex_a72.S +++ b/lib/cpus/aarch64/cortex_a72.S @@ -98,12 +98,16 @@ func check_errata_859971 endfunc check_errata_859971 func check_errata_cve_2017_5715 + cpu_check_csv2 x0, 1f #if WORKAROUND_CVE_2017_5715 mov x0, #ERRATA_APPLIES #else mov x0, #ERRATA_MISSING #endif ret +1: + mov x0, #ERRATA_NOT_APPLIES + ret endfunc check_errata_cve_2017_5715 /* ------------------------------------------------- @@ -121,8 +125,10 @@ func cortex_a72_reset_func #endif #if IMAGE_BL31 && WORKAROUND_CVE_2017_5715 + cpu_check_csv2 x0, 1f adr x0, workaround_mmu_runtime_exceptions msr vbar_el3, x0 +1: #endif /* --------------------------------------------- @@ -286,8 +292,8 @@ func cortex_a72_cpu_reg_dump ret endfunc cortex_a72_cpu_reg_dump - -declare_cpu_ops cortex_a72, CORTEX_A72_MIDR, \ +declare_cpu_ops_workaround_cve_2017_5715 cortex_a72, CORTEX_A72_MIDR, \ cortex_a72_reset_func, \ + check_errata_cve_2017_5715, \ cortex_a72_core_pwr_dwn, \ cortex_a72_cluster_pwr_dwn diff --git a/lib/cpus/aarch64/cortex_a73.S b/lib/cpus/aarch64/cortex_a73.S index 11680a09..0a961ea3 100644 --- a/lib/cpus/aarch64/cortex_a73.S +++ b/lib/cpus/aarch64/cortex_a73.S @@ -37,8 +37,10 @@ endfunc cortex_a73_disable_smp func cortex_a73_reset_func #if IMAGE_BL31 && WORKAROUND_CVE_2017_5715 + cpu_check_csv2 x0, 1f adr x0, workaround_bpiall_vbar0_runtime_exceptions msr vbar_el3, x0 +1: #endif /* --------------------------------------------- @@ -115,12 +117,16 @@ func cortex_a73_cluster_pwr_dwn endfunc cortex_a73_cluster_pwr_dwn func check_errata_cve_2017_5715 + cpu_check_csv2 x0, 1f #if WORKAROUND_CVE_2017_5715 mov x0, #ERRATA_APPLIES #else mov x0, #ERRATA_MISSING #endif ret +1: + mov x0, #ERRATA_NOT_APPLIES + ret endfunc check_errata_cve_2017_5715 #if REPORT_ERRATA @@ -164,7 +170,8 @@ func cortex_a73_cpu_reg_dump ret endfunc cortex_a73_cpu_reg_dump -declare_cpu_ops cortex_a73, CORTEX_A73_MIDR, \ +declare_cpu_ops_workaround_cve_2017_5715 cortex_a73, CORTEX_A73_MIDR, \ cortex_a73_reset_func, \ + check_errata_cve_2017_5715, \ cortex_a73_core_pwr_dwn, \ cortex_a73_cluster_pwr_dwn diff --git a/lib/cpus/aarch64/cortex_a75.S b/lib/cpus/aarch64/cortex_a75.S index 12ea304d..288f5afe 100644 --- a/lib/cpus/aarch64/cortex_a75.S +++ b/lib/cpus/aarch64/cortex_a75.S @@ -12,15 +12,7 @@ func cortex_a75_reset_func #if IMAGE_BL31 && WORKAROUND_CVE_2017_5715 - mrs x0, id_aa64pfr0_el1 - ubfx x0, x0, #ID_AA64PFR0_CSV2_SHIFT, #ID_AA64PFR0_CSV2_LENGTH - /* - * If the field equals to 1 then branch targets trained in one - * context cannot affect speculative execution in a different context. - */ - cmp x0, #1 - beq 1f - + cpu_check_csv2 x0, 1f adr x0, workaround_bpiall_vbar0_runtime_exceptions msr vbar_el3, x0 1: @@ -53,15 +45,7 @@ func cortex_a75_reset_func endfunc cortex_a75_reset_func func check_errata_cve_2017_5715 - mrs x0, id_aa64pfr0_el1 - ubfx x0, x0, #ID_AA64PFR0_CSV2_SHIFT, #ID_AA64PFR0_CSV2_LENGTH - /* - * If the field equals to 1 then branch targets trained in one - * context cannot affect speculative execution in a different context. - */ - cmp x0, #1 - beq 1f - + cpu_check_csv2 x0, 1f #if WORKAROUND_CVE_2017_5715 mov x0, #ERRATA_APPLIES #else @@ -129,6 +113,7 @@ func cortex_a75_cpu_reg_dump ret endfunc cortex_a75_cpu_reg_dump -declare_cpu_ops cortex_a75, CORTEX_A75_MIDR, \ +declare_cpu_ops_workaround_cve_2017_5715 cortex_a75, CORTEX_A75_MIDR, \ cortex_a75_reset_func, \ + check_errata_cve_2017_5715, \ cortex_a75_core_pwr_dwn diff --git a/lib/cpus/aarch64/cpu_helpers.S b/lib/cpus/aarch64/cpu_helpers.S index ae1c3c25..5a9226d8 100644 --- a/lib/cpus/aarch64/cpu_helpers.S +++ b/lib/cpus/aarch64/cpu_helpers.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -7,9 +7,7 @@ #include <arch.h> #include <asm_macros.S> #include <assert_macros.S> -#if defined(IMAGE_BL31) || (defined(IMAGE_BL2) && BL2_AT_EL3) #include <cpu_data.h> -#endif #include <cpu_macros.S> #include <debug.h> #include <errata_report.h> @@ -281,3 +279,36 @@ func print_errata_status br x1 endfunc print_errata_status #endif + +/* + * int check_workaround_cve_2017_5715(void); + * + * This function returns: + * - ERRATA_APPLIES when firmware mitigation is required. + * - ERRATA_NOT_APPLIES when firmware mitigation is _not_ required. + * - ERRATA_MISSING when firmware mitigation would be required but + * is not compiled in. + * + * NOTE: Must be called only after cpu_ops have been initialized + * in per-CPU data. + */ + .globl check_workaround_cve_2017_5715 +func check_workaround_cve_2017_5715 + mrs x0, tpidr_el3 +#if ENABLE_ASSERTIONS + cmp x0, #0 + ASM_ASSERT(ne) +#endif + ldr x0, [x0, #CPU_DATA_CPU_OPS_PTR] + ldr x0, [x0, #CPU_EXTRA1_FUNC] + /* + * If the reserved function pointer is NULL, this CPU + * is unaffected by CVE-2017-5715 so bail out. + */ + cmp x0, #0 + beq 1f + br x0 +1: + mov x0, #ERRATA_NOT_APPLIES + ret +endfunc check_workaround_cve_2017_5715 diff --git a/lib/el3_runtime/aarch32/context_mgmt.c b/lib/el3_runtime/aarch32/context_mgmt.c index 76e440e3..c784c225 100644 --- a/lib/el3_runtime/aarch32/context_mgmt.c +++ b/lib/el3_runtime/aarch32/context_mgmt.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -13,7 +13,7 @@ #include <context_mgmt.h> #include <platform.h> #include <platform_def.h> -#include <smcc_helpers.h> +#include <smccc_helpers.h> #include <string.h> #include <utils.h> diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c index c6c2249a..2608d1fc 100644 --- a/lib/el3_runtime/aarch64/context_mgmt.c +++ b/lib/el3_runtime/aarch64/context_mgmt.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -15,7 +15,7 @@ #include <platform.h> #include <platform_def.h> #include <pubsub_events.h> -#include <smcc_helpers.h> +#include <smccc_helpers.h> #include <spe.h> #include <string.h> #include <sve.h> diff --git a/lib/pmf/pmf_smc.c b/lib/pmf/pmf_smc.c index 248c1fac..5cf193e2 100644 --- a/lib/pmf/pmf_smc.c +++ b/lib/pmf/pmf_smc.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -7,7 +7,7 @@ #include <debug.h> #include <platform.h> #include <pmf.h> -#include <smcc_helpers.h> +#include <smccc_helpers.h> /* * This function is responsible for handling all PMF SMC calls. diff --git a/lib/psci/psci_main.c b/lib/psci/psci_main.c index 88cf5cbe..d25d1775 100644 --- a/lib/psci/psci_main.c +++ b/lib/psci/psci_main.c @@ -12,7 +12,7 @@ #include <platform.h> #include <pmf.h> #include <runtime_instr.h> -#include <smcc.h> +#include <smccc.h> #include <string.h> #include "psci_private.h" diff --git a/lib/stdlib/puts.c b/lib/stdlib/puts.c index 693a6bff..284cf8c5 100644 --- a/lib/stdlib/puts.c +++ b/lib/stdlib/puts.c @@ -9,23 +9,17 @@ int puts(const char *s) { int count = 0; - while(*s) - { - if (putchar(*s++) != EOF) { - count++; - } else { - count = EOF; - break; - } + while(*s) { + if (putchar(*s++) == EOF) + return EOF; + count++; } /* According to the puts(3) manpage, the function should write a * trailing newline. */ - if ((count != EOF) && (putchar('\n') != EOF)) - count++; - else - count = EOF; + if (putchar('\n') == EOF) + return EOF; - return count; + return count + 1; } |