diff options
Diffstat (limited to 'plat/imx/common/include/sci/sci_types.h')
| -rwxr-xr-x[-rw-r--r--] | plat/imx/common/include/sci/sci_types.h | 120 |
1 files changed, 82 insertions, 38 deletions
diff --git a/plat/imx/common/include/sci/sci_types.h b/plat/imx/common/include/sci/sci_types.h index 6ade01cd..32ff1026 100644..100755 --- a/plat/imx/common/include/sci/sci_types.h +++ b/plat/imx/common/include/sci/sci_types.h @@ -1,5 +1,6 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2019 NXP * * SPDX-License-Identifier: BSD-3-Clause */ @@ -8,11 +9,12 @@ * Header file containing types used across multiple service APIs. */ -#ifndef SCI_TYPES_H -#define SCI_TYPES_H +#ifndef SC_TYPES_H +#define SC_TYPES_H /* Includes */ +#include <stdbool.h> #include <sci/sci_scfw.h> /* Defines */ @@ -23,6 +25,7 @@ /*@{*/ #define SC_32KHZ 32768U /* 32KHz */ #define SC_10MHZ 10000000U /* 10MHz */ +#define SC_16MHZ 16000000U /* 16MHz */ #define SC_20MHZ 20000000U /* 20MHz */ #define SC_25MHZ 25000000U /* 25MHz */ #define SC_27MHZ 27000000U /* 27MHz */ @@ -36,6 +39,7 @@ #define SC_83MHZ 83333333U /* 83MHz */ #define SC_84MHZ 84375000U /* 84.37MHz */ #define SC_100MHZ 100000000U /* 100MHz */ +#define SC_114MHZ 114000000U /* 114MHz */ #define SC_125MHZ 125000000U /* 125MHz */ #define SC_133MHZ 133333333U /* 133MHz */ #define SC_135MHZ 135000000U /* 135MHz */ @@ -56,29 +60,43 @@ #define SC_372MHZ 372000000U /* 372MHz */ #define SC_375MHZ 375000000U /* 375MHz */ #define SC_400MHZ 400000000U /* 400MHz */ +#define SC_465MHZ 465000000U /* 465MHz */ #define SC_500MHZ 500000000U /* 500MHz */ #define SC_594MHZ 594000000U /* 594MHz */ #define SC_625MHZ 625000000U /* 625MHz */ #define SC_640MHZ 640000000U /* 640MHz */ +#define SC_648MHZ 648000000U /* 648MHz */ #define SC_650MHZ 650000000U /* 650MHz */ #define SC_667MHZ 666666667U /* 667MHz */ #define SC_675MHZ 675000000U /* 675MHz */ #define SC_700MHZ 700000000U /* 700MHz */ #define SC_720MHZ 720000000U /* 720MHz */ #define SC_750MHZ 750000000U /* 750MHz */ +#define SC_753MHZ 753000000U /* 753MHz */ +#define SC_793MHZ 793000000U /* 793MHz */ #define SC_800MHZ 800000000U /* 800MHz */ #define SC_850MHZ 850000000U /* 850MHz */ +#define SC_858MHZ 858000000U /* 858MHz */ #define SC_900MHZ 900000000U /* 900MHz */ +#define SC_953MHZ 953000000U /* 953MHz */ +#define SC_963MHZ 963000000U /* 963MHz */ #define SC_1000MHZ 1000000000U /* 1GHz */ -#define SC_1056MHZ 1056000000U /* 1.056GHz */ +#define SC_1060MHZ 1060000000U /* 1.06GHz */ +#define SC_1068MHZ 1068000000U /* 1.068GHz */ +#define SC_1121MHZ 1121000000U /* 1.121GHz */ +#define SC_1173MHZ 1173000000U /* 1.173GHz */ #define SC_1188MHZ 1188000000U /* 1.188GHz */ #define SC_1260MHZ 1260000000U /* 1.26GHz */ +#define SC_1278MHZ 1278000000U /* 1.278GHz */ #define SC_1280MHZ 1280000000U /* 1.28GHz */ #define SC_1300MHZ 1300000000U /* 1.3GHz */ +#define SC_1313MHZ 1313000000U /* 1.313GHz */ +#define SC_1345MHZ 1345000000U /* 1.345GHz */ #define SC_1400MHZ 1400000000U /* 1.4GHz */ #define SC_1500MHZ 1500000000U /* 1.5GHz */ #define SC_1600MHZ 1600000000U /* 1.6GHz */ #define SC_1800MHZ 1800000000U /* 1.8GHz */ +#define SC_1860MHZ 1860000000U /* 1.86GHz */ #define SC_2000MHZ 2000000000U /* 2.0GHz */ #define SC_2112MHZ 2112000000U /* 2.12GHz */ /*@}*/ @@ -97,6 +115,7 @@ #define SC_144MHZ 144000000U /* 144MHz */ #define SC_192MHZ 192000000U /* 192MHz */ #define SC_211MHZ 211200000U /* 211.2MHz */ +#define SC_228MHZ 228000000U /* 233MHz */ #define SC_240MHZ 240000000U /* 240MHz */ #define SC_264MHZ 264000000U /* 264MHz */ #define SC_352MHZ 352000000U /* 352MHz */ @@ -104,13 +123,16 @@ #define SC_384MHZ 384000000U /* 384MHz */ #define SC_396MHZ 396000000U /* 396MHz */ #define SC_432MHZ 432000000U /* 432MHz */ +#define SC_456MHZ 456000000U /* 466MHz */ #define SC_480MHZ 480000000U /* 480MHz */ #define SC_600MHZ 600000000U /* 600MHz */ #define SC_744MHZ 744000000U /* 744MHz */ #define SC_792MHZ 792000000U /* 792MHz */ #define SC_864MHZ 864000000U /* 864MHz */ +#define SC_912MHZ 912000000U /* 912MHz */ #define SC_960MHZ 960000000U /* 960MHz */ #define SC_1056MHZ 1056000000U /* 1056MHz */ +#define SC_1104MHZ 1104000000U /* 1104MHz */ #define SC_1200MHZ 1200000000U /* 1.2GHz */ #define SC_1464MHZ 1464000000U /* 1.464GHz */ #define SC_2400MHZ 2400000000U /* 2.4GHz */ @@ -128,7 +150,6 @@ * @name Defines for type widths */ /*@{*/ -#define SC_FADDR_W 36U /* Width of sc_faddr_t */ #define SC_BOOL_W 1U /* Width of sc_bool_t */ #define SC_ERR_W 4U /* Width of sc_err_t */ #define SC_RSRC_W 10U /* Width of sc_rsrc_t */ @@ -139,8 +160,8 @@ * @name Defines for sc_bool_t */ /*@{*/ -#define SC_FALSE ((sc_bool_t) 0U) /* True */ -#define SC_TRUE ((sc_bool_t) 1U) /* False */ +#define SC_FALSE ((sc_bool_t) 0U) /* False */ +#define SC_TRUE ((sc_bool_t) 1U) /* True */ /*@}*/ /*! @@ -189,15 +210,15 @@ #define SC_R_DC_0_BLIT1 20U #define SC_R_DC_0_BLIT2 21U #define SC_R_DC_0_BLIT_OUT 22U -#define SC_R_DC_0_CAPTURE0 23U -#define SC_R_DC_0_CAPTURE1 24U +#define SC_R_PERF 23U +#define SC_R_USB_1_PHY 24U #define SC_R_DC_0_WARP 25U -#define SC_R_DC_0_INTEGRAL0 26U -#define SC_R_DC_0_INTEGRAL1 27U +#define SC_R_V2X_MU_0 26U +#define SC_R_V2X_MU_1 27U #define SC_R_DC_0_VIDEO0 28U #define SC_R_DC_0_VIDEO1 29U #define SC_R_DC_0_FRAC0 30U -#define SC_R_DC_0_FRAC1 31U +#define SC_R_V2X_MU_2 31U #define SC_R_DC_0 32U #define SC_R_GPU_2_PID0 33U #define SC_R_DC_0_PLL_0 34U @@ -206,17 +227,17 @@ #define SC_R_DC_1_BLIT1 37U #define SC_R_DC_1_BLIT2 38U #define SC_R_DC_1_BLIT_OUT 39U -#define SC_R_DC_1_CAPTURE0 40U -#define SC_R_DC_1_CAPTURE1 41U +#define SC_R_V2X_MU_3 40U +#define SC_R_V2X_MU_4 41U #define SC_R_DC_1_WARP 42U -#define SC_R_DC_1_INTEGRAL0 43U -#define SC_R_DC_1_INTEGRAL1 44U +#define SC_R_TBU_CTL 43U +#define SC_R_SECVIO 44U #define SC_R_DC_1_VIDEO0 45U #define SC_R_DC_1_VIDEO1 46U #define SC_R_DC_1_FRAC0 47U -#define SC_R_DC_1_FRAC1 48U +#define SC_R_UNUSED13 48U #define SC_R_DC_1 49U -#define SC_R_GPU_3_PID0 50U +#define SC_R_UNUSED14 50U #define SC_R_DC_1_PLL_0 51U #define SC_R_DC_1_PLL_1 52U #define SC_R_SPI_0 53U @@ -306,10 +327,10 @@ #define SC_R_DMA_1_CH29 137U #define SC_R_DMA_1_CH30 138U #define SC_R_DMA_1_CH31 139U -#define SC_R_UNUSED1 140U -#define SC_R_UNUSED2 141U -#define SC_R_UNUSED3 142U -#define SC_R_UNUSED4 143U +#define SC_R_V2X_PID0 140U +#define SC_R_V2X_PID1 141U +#define SC_R_V2X_PID2 142U +#define SC_R_V2X_PID3 143U #define SC_R_GPU_0_PID0 144U #define SC_R_GPU_0_PID1 145U #define SC_R_GPU_0_PID2 146U @@ -456,8 +477,8 @@ #define SC_R_M4_0_UART 287U #define SC_R_M4_0_I2C 288U #define SC_R_M4_0_INTMUX 289U -#define SC_R_M4_0_SIM 290U -#define SC_R_M4_0_WDOG 291U +#define SC_R_ENET_0_A0 290U +#define SC_R_ENET_0_A1 291U #define SC_R_M4_0_MU_0B 292U #define SC_R_M4_0_MU_0A0 293U #define SC_R_M4_0_MU_0A1 294U @@ -476,8 +497,8 @@ #define SC_R_M4_1_UART 307U #define SC_R_M4_1_I2C 308U #define SC_R_M4_1_INTMUX 309U -#define SC_R_M4_1_SIM 310U -#define SC_R_M4_1_WDOG 311U +#define SC_R_UNUSED17 310U +#define SC_R_UNUSED18 311U #define SC_R_M4_1_MU_0B 312U #define SC_R_M4_1_MU_0A0 313U #define SC_R_M4_1_MU_0A1 314U @@ -489,7 +510,7 @@ #define SC_R_SAI_2 320U #define SC_R_IRQSTR_SCU2 321U #define SC_R_IRQSTR_DSP 322U -#define SC_R_UNUSED5 323U +#define SC_R_ELCDIF_PLL 323U #define SC_R_OCRAM 324U #define SC_R_AUDIO_PLL_0 325U #define SC_R_PI_0 326U @@ -532,12 +553,12 @@ #define SC_R_VPU_PID5 363U #define SC_R_VPU_PID6 364U #define SC_R_VPU_PID7 365U -#define SC_R_VPU_UART 366U -#define SC_R_VPUCORE 367U -#define SC_R_VPUCORE_0 368U -#define SC_R_VPUCORE_1 369U -#define SC_R_VPUCORE_2 370U -#define SC_R_VPUCORE_3 371U +#define SC_R_ENET_0_A2 366U +#define SC_R_ENET_1_A0 367U +#define SC_R_ENET_1_A1 368U +#define SC_R_ENET_1_A2 369U +#define SC_R_ENET_1_A3 370U +#define SC_R_ENET_1_A4 371U #define SC_R_DMA_4_CH0 372U #define SC_R_DMA_4_CH1 373U #define SC_R_DMA_4_CH2 374U @@ -707,14 +728,25 @@ #define SC_R_VPU_MU_3 538U #define SC_R_VPU_ENC_1 539U #define SC_R_VPU 540U -#define SC_R_LAST 541U +#define SC_R_DMA_5_CH0 541U +#define SC_R_DMA_5_CH1 542U +#define SC_R_DMA_5_CH2 543U +#define SC_R_DMA_5_CH3 544U +#define SC_R_ATTESTATION 545U +#define SC_R_LAST 546U #define SC_R_ALL ((sc_rsrc_t) UINT16_MAX) /* All resources */ /*@}*/ +/*! + * Define for ATF/Linux. Not used by SCFW. Not a valid parameter + * for any SCFW API calls! + */ +#define SC_R_NONE 0xFFF0U + /* NOTE - please add by replacing some of the UNUSED from above! */ /*! - * Defnes for sc_ctrl_t. + * Defines for sc_ctrl_t. */ #define SC_C_TEMP 0U #define SC_C_TEMP_HI 1U @@ -762,7 +794,19 @@ #define SC_C_RST0 43U #define SC_C_RST1 44U #define SC_C_SEL0 45U -#define SC_C_LAST 46U +#define SC_C_CALIB0 46U +#define SC_C_CALIB1 47U +#define SC_C_CALIB2 48U +#define SC_C_IPG_DEBUG 49U +#define SC_C_IPG_DOZE 50U +#define SC_C_IPG_WAIT 51U +#define SC_C_IPG_STOP 52U +#define SC_C_IPG_STOP_MODE 53U +#define SC_C_IPG_STOP_ACK 54U +#define SC_C_SYNC_CTRL 55U +#define SC_C_OFS_AUDIO_ALT 56U +#define SC_C_DSP_BYP 57U +#define SC_C_LAST 58U #define SC_P_ALL ((sc_pad_t) UINT16_MAX) /* All pads */ @@ -793,7 +837,7 @@ typedef uint16_t sc_rsrc_t; /*! * This type is used to indicate a control. */ -typedef uint8_t sc_ctrl_t; +typedef uint32_t sc_ctrl_t; /*! * This type is used to indicate a pad. Valid values are SoC specific. @@ -846,4 +890,4 @@ typedef __UINT32_TYPE__ uint32_t; typedef __UINT64_TYPE__ uint64_t; #endif -#endif /* SCI_TYPES_H */ +#endif /* SC_TYPES_H */ |