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2017-09-18Merge pull request #1093 from soby-mathew/eb/log_fwdavidcunado-arm
Implement log framework
2017-09-11Implement log frameworkSoby Mathew
This patch gives users control over logging messages printed from the C code using the LOG macros defined in debug.h Users now have the ability to reduce the log_level at run time using the tf_log_set_max_level() function. The default prefix string can be defined by platform by overriding the `plat_log_get_prefix()` platform API which is also introduced in this patch. The new log framework results in saving of some RO data. For example, when BL1 is built for FVP with LOG_LEVEL=LOG_LEVEL_VERBOSE, resulted in saving 384 bytes of RO data and increase of 8 bytes of RW data. The framework also adds about 108 bytes of code to the release build of FVP. Fixes ARM-software/tf-issues#462 Change-Id: I476013d9c3deedfdd4c8b0b0f125665ba6250554 Co-authored-by: Eleanor Bonnici <Eleanor.bonnici@arm.com> Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2017-09-08Filter out invalid configure for EL3_PAYLOAD_BASEQixiang Xu
TRUSTED_BOARD_BOOT and GENERATE_COT is not compatible with EL3_PAYLOAD_BASE Change-Id: I538c77e1f6c7da400d30ae4d633b8fcc55742202 Signed-off-by: Qixiang Xu <qixiang.xu@arm.com>
2017-08-23Makefile: correct path for CHECKPATCH warningsEtienne Carriere
Change-Id: I08c9789d3fd2b034b08de663d151023ca005f77f Reported-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2017-08-01CCI: Adapt for specific product at run timeJeenu Viswambharan
The current build system and driver requires the CCI product to be specified at build time. The device constraints can be determined at run time from its ID registers, obviating the need for specifying them ahead. This patch adds changes to identify and validate CCI at run time. Some global variables are renamed to be in line with the rest of the code base. The build option ARM_CCI_PRODUCT_ID is now removed, and user guide is updated. Change-Id: Ibb765e349d3bc95ff3eb9a64bde1207ab710a93d Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2017-07-24Fix alphabetic orderingJeenu Viswambharan
Commit d832aee90, which added SPE support, got the alphabetical ordering wrong for documentation and Makefile addition. This patch fixes that. Change-Id: I061ecfba4db363902c9d7d577d2ce6c612cb9e1d Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2017-07-06Release v1.4: Update minor version number to 4David Cunado
Change-Id: I8676a22649dce92d0ddd98013fc6dafcfbe94c90 Signed-off-by: David Cunado <david.cunado@arm.com>
2017-06-28Introduce TF_LDFLAGSDouglas Raillard
Use TF_LDFLAGS from the Makefiles, and still append LDFLAGS as well to the compiler's invocation. This allows passing extra options from the make command line using LDFLAGS. Document new LDFLAGS Makefile option. Change-Id: I88c5ac26ca12ac2b2d60a6f150ae027639991f27 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
2017-06-28Merge pull request #1002 from douglas-raillard-arm/dr/fix_errata_a53danh-arm
Apply workarounds for A53 Cat A Errata 835769 and 843419
2017-06-22Apply workarounds for A53 Cat A Errata 835769 and 843419Douglas Raillard
These errata are only applicable to AArch64 state. See the errata notice for more details: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.epm048406/index.html Introduce the build options ERRATA_A53_835769 and ERRATA_A53_843419. Enable both of them for Juno. Apply the 835769 workaround as following: * Compile with -mfix-cortex-a53-835769 * Link with --fix-cortex-a53-835769 Apply the 843419 workaround as following: * Link with --fix-cortex-a53-843419 The erratum 843419 workaround can lead the linker to create new sections suffixed with "*.stub*" and 4KB aligned. The erratum 835769 can lead the linker to create new "*.stub" sections with no particular alignment. Also add support for LDFLAGS_aarch32 and LDFLAGS_aarch64 in Makefile for architecture-specific linker options. Change-Id: Iab3337e338b7a0a16b0d102404d9db98c154f8f8 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
2017-06-22aarch64: Enable Statistical Profiling Extensions for lower ELsdp-arm
SPE is only supported in non-secure state. Accesses to SPE specific registers from SEL1 will trap to EL3. During a world switch, before `TTBR` is modified the SPE profiling buffers are drained. This is to avoid a potential invalid memory access in SEL1. SPE is architecturally specified only for AArch64. Change-Id: I04a96427d9f9d586c331913d815fdc726855f6b0 Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-06-01Remove `DISABLE_PEDANTIC` build optionAntonio Nino Diaz
It doesn't make sense to use the `-pedantic` flag when building the Trusted Firmware as we use GNU extensions and so our code is not fully ISO C compliant. This flag only makes sense if the code intends to be ISO C compliant. Change-Id: I6273564112759ff57f03b273f5349733a5f38aef Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2017-05-30Merge pull request #949 from antonio-nino-diaz-arm/an/printf-memorydavidcunado-arm
Reduce code size when building with Trusted Board Boot enabled
2017-05-24build: Introduce ARM Compiler 6 supportdp-arm
Only the compiler is switched to ARM Compiler 6. The assembler and linker are provided by the GCC toolchain. ARM Compiler 6 is used to build TF when the base name of the path assigned to `CC` matches the string 'armclang'. `CROSS_COMPILE` is still needed and should point to the appropriate GCC toolchain. Tested with ARM CC 6.7. Change-Id: Ib359bf9c1e8aeed3f662668e44830864f3fe7b4a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-05-24build: Introduce clang supportdp-arm
Only the compiler is switched to clang. The assembler and linker are provided by the GCC toolchain. clang is used to build TF when the base name of the path assigned to `CC` contains the string 'clang'. `CROSS_COMPILE` is still needed and should point to the appropriate GCC toolchain. Tested with clang 3.9.x and 4.0.x. Change-Id: I53236d64e3c83ad27fc843bae5fcdae30f2e325e Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-05-24build: Introduce HOSTCC flagdp-arm
Tools are built using the compiler specified in `HOSTCC` instead of reusing the `CC` variable. By default, gcc is used. Change-Id: I83636a375c61f4804b4e80784db9d061fe20af87 Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-05-24Switch default C environment from c99 to gnu99dp-arm
Since TF uses GCC extensions, switch the C environment from c99 to gnu99. This change allows armclang to build TF. Change-Id: Iaacb2726ba1458af59faf607ae9405d6eedb9962 Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-05-24Merge pull request #938 from masahir0y/tools_sharedanh-arm
Collect headers shared between TF and host-tools into include/tools_share
2017-05-24Introduce `tf_snprintf`Antonio Nino Diaz
This is a reduced version of `snprintf` that only supports formats '%d', '%i' and '%u'. It can be used when the full `snprintf` is not needed in order to save memory. If it finds an unknown format specifier, it prints an error message and panics. Change-Id: I2cb06fcdf74cda2c43caf73ae0762a91499fc04e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2017-05-24cert: move platform_oid.h to include/tools_share for all platformsMasahiro Yamada
Platforms aligned with TBBR are supposed to use their own OIDs, but defining the same macros with different OIDs does not provide any value (at least technically). For easier use of TBBR, this commit allows platforms to reuse the OIDs obtained by ARM Ltd. This will be useful for non-ARM vendors that do not need their own extension fields in their certificate files. The OIDs of ARM Ltd. have been moved to include/tools_share/tbbr_oid.h Platforms can include <tbbr_oid.h> instead of <platform_oid.h> by defining USE_TBBR_DEFS as 1. USE_TBBR_DEFS is 0 by default to keep the backward compatibility. For clarification, I inserted a blank line between headers from the include/ directory (#include <...>) and ones from a local directory (#include "..." ). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-23fip: move headers shared between TF and fiptool to include/tools_shareMasahiro Yamada
Some header files need to be shared between TF and host programs. For fiptool, two headers are copied to the tools/fiptool directory, but it looks clumsy. This commit introduces a new directory, include/tools_share, which collects headers that should be shared between TF and host programs. This will clarify the interface exposed to host tools. We should add new headers to this directory only when we really need to do so. For clarification, I inserted a blank line between headers from the include/ directory (#include <...>) and ones from a local directory (#include "..." ). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-15AArch32: Add BL2U supportYatharth Kochar
Add support for firmware upgrade on AArch32. This patch has been tested on the FVP models. NOTE: Firmware upgrade on Juno AArch32 is not currently supported. Change-Id: I1ca8078214eaf86b46463edd14740120af930aec Signed-off-by: dp-arm <dimitris.papastamos@arm.com> Co-Authored-By: Yatharth Kochar <yatharth.kochar@arm.com>
2017-05-15AArch32: Add `TRUSTED_BOARD_BOOT` supportdp-arm
This patch adds `TRUSTED_BOARD_BOOT` support for AArch32 mode. To build this patch the "mbedtls/include/mbedtls/bignum.h" needs to be modified to remove `#define MBEDTLS_HAVE_UDBL` when `MBEDTLS_HAVE_INT32` is defined. This is a workaround for "https://github.com/ARMmbed/mbedtls/issues/708" NOTE: TBBR support on Juno AArch32 is not currently supported. Change-Id: I86d80e30b9139adc4d9663f112801ece42deafcf Signed-off-by: dp-arm <dimitris.papastamos@arm.com> Co-Authored-By: Yatharth Kochar <yatharth.kochar@arm.com>
2017-05-12Hook up LLVM compiler-rt in the build systemdp-arm
This patch enables compiler-rt for the AArch32 target. The code is not used for AArch64 as the architecture supports the 64-bit division and modulo operations natively. Change-Id: I1703a92872b0bb56ac0b98c67193830683963b13 Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-05-08Merge pull request #926 from EvanLloyd/win_make_4davidcunado-arm
Minor makefile fixes
2017-05-03Use SPDX license identifiersdp-arm
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-05-02Build: Correct Unix specific echo commandsEvan Lloyd
Some recent changes have added direct use of the echo command without parameters. This fails on a Windows shell, because echo without parameters reports the mode ("ECHO is on"). This is corrected using the ECHO_BLANK_LINE macro already provided for that purpose. Change-Id: I5fd7192861b4496f6f46b4f096e80a752cd135d6 Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
2017-04-21Merge pull request #898 from soby-mathew/sm/dcache-earlydavidcunado-arm
PSCI: Build option to enable D-Caches early in warmboot
2017-04-20Remove build option `ASM_ASSERTION`Antonio Nino Diaz
The build option `ENABLE_ASSERTIONS` should be used instead. That way both C and ASM assertions can be enabled or disabled together. All occurrences of `ASM_ASSERTION` in common code and ARM platforms have been replaced by `ENABLE_ASSERTIONS`. ASM_ASSERTION has been removed from the user guide. Change-Id: I51f1991f11b9b7ff83e787c9a3270c274748ec6f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2017-04-19Add `ENABLE_ASSERTIONS` build optionAntonio Nino Diaz
Add the new build option `ENABLE_ASSERTIONS` that controls whether or not assert functions are compiled out. It defaults to 1 for debug builds and to 0 for release builds. Additionally, a following patch will be done to allow this build option to hide auxiliary code used for the checks done in an `assert()`. This code is is currently under the DEBUG build flag. Assert messages are now only printed if LOG_LEVEL >= LOG_LEVEL_INFO, which is the default for debug builds. This patch also updates the User Guide. Change-Id: I1401530b56bab25561bb0f274529f1d12c5263bc Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2017-04-19PSCI: Build option to enable D-Caches early in warmbootSoby Mathew
This patch introduces a build option to enable D-cache early on the CPU after warm boot. This is applicable for platforms which do not require interconnect programming to enable cache coherency (eg: single cluster platforms). If this option is enabled, then warm boot path enables D-caches immediately after enabling MMU. Fixes ARM-Software/tf-issues#456 Change-Id: I44c8787d116d7217837ced3bcf0b1d3441c8d80e Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2017-04-14Merge pull request #890 from masahir0y/scpdavidcunado-arm
Build: add generic way to include SCP_BL2 into FIP image
2017-04-06Merge pull request #886 from dp-arm/dp/stack-protectordavidcunado-arm
Add support for GCC stack protection
2017-04-05Merge pull request #877 from soby-mathew/sm/build_opt_checksdavidcunado-arm
Include all makefiles before build option checks
2017-04-05Build: add generic way to include SCP_BL2 into FIP imageMasahiro Yamada
If SCP_BL2 is passed in from the command line, it is recognized by make_helpers/tbbr/tbbr_tools.mk, and the cert_create tool generates the corresponding key and content certificates. On the other hand, the top-level Makefile does not care SCP_BL2, so the --scp-fw option is not passed to the fiptool. As far as I see plat/arm/css/common/css_common.mk, it looks like a platform's job to add $(eval $(call FIP_ADD_IMG,SCP_BL2,--scp-fw)). We can make the top-level Makefile kind enough to take care of it. This is useful when we want to have optional SCP_BL2 firmware. Adjust css_common.mk so that Juno still requires SCP_BL2 by default. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-03-31Add support for GCC stack protectionDouglas Raillard
Introduce new build option ENABLE_STACK_PROTECTOR. It enables compilation of all BL images with one of the GCC -fstack-protector-* options. A new platform function plat_get_stack_protector_canary() is introduced. It returns a value that is used to initialize the canary for stack corruption detection. Returning a random value will prevent an attacker from predicting the value and greatly increase the effectiveness of the protection. A message is printed at the ERROR level when a stack corruption is detected. To be effective, the global data must be stored at an address lower than the base of the stacks. Failure to do so would allow an attacker to overwrite the canary as part of an attack which would void the protection. FVP implementation of plat_get_stack_protector_canary is weak as there is no real source of entropy on the FVP. It therefore relies on a timer's value, which could be predictable. Change-Id: Icaaee96392733b721fa7c86a81d03660d3c1bc06 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
2017-03-27Include all makefiles before build option checksSoby Mathew
At present, the build option checks are done prior to inclusion of BL makefiles. This meant if the BL makefiles modified any of the options then these checks were bypassed. This patch corrects this problem. Change-Id: I0b591392a74d6d456d2b19bbe292f42b5aeae048 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2017-03-20Move plat/common source file definitions to generic Makefilesdp-arm
These source file definitions should be defined in generic Makefiles so that all platforms can benefit. Ensure that the symbols are properly marked as weak so they can be overridden by platforms. NOTE: This change is a potential compatibility break for non-upstream platforms. Change-Id: I7b892efa9f2d6d216931360dc6c436e1d10cffed Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-03-17Merge pull request #860 from jeenu-arm/hw-asstd-cohdavidcunado-arm
Patches for platforms with hardware-assisted coherency
2017-03-16Merge pull request #856 from antonio-nino-diaz-arm/an/dynamic-xlatdavidcunado-arm
Introduce version 2 of the translation tables library
2017-03-08Add version 2 of xlat tables libraryAntonio Nino Diaz
The folder lib/xlat_tables_v2 has been created to store a new version of the translation tables library for further modifications in patches to follow. At the moment it only contains a basic implementation that supports static regions. This library allows different translation tables to be modified by using different 'contexts'. For now, the implementation defaults to the translation tables used by the current image, but it is possible to modify other tables than the ones in use. Added a new API to print debug information for the current state of the translation tables, rather than printing the information while the tables are being created. This allows subsequent debug printing of the xlat tables after they have been changed, which will be useful when dynamic regions are implemented in a patch to follow. The common definitions stored in `xlat_tables.h` header have been moved to a new file common to both versions, `xlat_tables_defs.h`. All headers related to the translation tables library have been moved to a the subfolder `xlat_tables`. Change-Id: Ia55962c33e0b781831d43a548e505206dffc5ea9 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2017-03-02Disallow using coherent memory with hardware-assisted coherencyJeenu Viswambharan
ARM Trusted Firmware keeps certain data structures in a memory region with non-cacheable attributes (termed as "coherent memory") to keep data coherent with observers that are cache-coherent, and those not. These data structures pertain to power management and mutual exclusion. Using coherent memory also costs at least an additional page to map memory with special memory attributes. On systems with hardware-assisted coherency, all CPUs that participate in power management and mutual exclusion are cache-coherent, obviating the need for special memory attributes for such data structures. Instead, they can be placed in normal memory, along with rest of data. On systems with hardware-assisted coherency, where build option HW_ASSISTED_COHERENCY will be set, also having USE_COHERENT_MEMORY enabled only wastes a page of memory without any benefit. Therefore, with HW_ASSISTED_COHERENCY set to 1, require that USE_COHERENT_MEMORY is explicitly set to 0. Change-Id: I5101657ae6b1a46278069f23e2d88ee5cbd98efa Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2017-03-02build: Define build option for hardware-assisted coherencyJeenu Viswambharan
The boolean build option HW_ASSISTED_COHERENCY is introduced to enable various optimizations in ARM Trusted Software, when built for such systems. It's set to 0 by default. Change-Id: I638390da6e1718fe024dcf5b402e07084f1eb014 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2017-02-28Merge pull request #837 from douglas-raillard-arm/dr/fix_tools_cflagsdanh-arm
build: Use separate CFLAGS for tools
2017-02-20Merge pull request #843 from jeenu-arm/cas-lockdanh-arm
Introduce locking primitives using CAS instruction
2017-02-16Merge pull request #829 from masahir0y/builddavidcunado-arm
Makefile: use git describe for BUILD_STRING
2017-02-14Introduce locking primitives using CAS instructionJeenu Viswambharan
The ARMv8v.1 architecture extension has introduced support for far atomics, which includes compare-and-swap. Compare and Swap instruction is only available for AArch64. Introduce build options to choose the architecture versions to target ARM Trusted Firmware: - ARM_ARCH_MAJOR: selects the major version of target ARM Architecture. Default value is 8. - ARM_ARCH_MINOR: selects the minor version of target ARM Architecture. Default value is 0. When: (ARM_ARCH_MAJOR > 8) || ((ARM_ARCH_MAJOR == 8) && (ARM_ARCH_MINOR >= 1)), for AArch64, Compare and Swap instruction is used to implement spin locks. Otherwise, the implementation falls back to using load-/store-exclusive instructions. Update user guide, and introduce a section in Firmware Design guide to summarize support for features introduced in ARMv8 Architecture Extensions. Change-Id: I73096a0039502f7aef9ec6ab3ae36680da033f16 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2017-02-13PSCI: Decouple PSCI stat residency calculation from PMFdp-arm
This patch introduces the following three platform interfaces: * void plat_psci_stat_accounting_start(const psci_power_state_t *state_info) This is an optional hook that platforms can implement in order to perform accounting before entering a low power state. This typically involves capturing a timestamp. * void plat_psci_stat_accounting_stop(const psci_power_state_t *state_info) This is an optional hook that platforms can implement in order to perform accounting after exiting from a low power state. This typically involves capturing a timestamp. * u_register_t plat_psci_stat_get_residency(unsigned int lvl, const psci_power_state_t *state_info, unsigned int last_cpu_index) This is an optional hook that platforms can implement in order to calculate the PSCI stat residency. If any of these interfaces are overridden by the platform, it is recommended that all of them are. By default `ENABLE_PSCI_STAT` is disabled. If `ENABLE_PSCI_STAT` is set but `ENABLE_PMF` is not set then an alternative PSCI stat collection backend must be provided. If both are set, then default weak definitions of these functions are provided, using PMF to calculate the residency. NOTE: Previously, platforms did not have to explicitly set `ENABLE_PMF` since this was automatically done by the top-level Makefile. Change-Id: I17b47804dea68c77bc284df15ee1ccd66bc4b79b Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-02-03Makefile: use git describe for BUILD_STRINGMasahiro Yamada
Currently, the BUILD_STRING is just 7-digits git hash. It is true we can identify which version is running, but we can not get a quick idea about how new or old it is. The command "git describe" provides us a bit more useful information in the format of: (tag-name)-(number of commits on top the tag)-g(7 digits hash) I added some options: --always Make "git describe" work without any tag in case the upstream ATF is cloned, but all the tags are locally dropped. --tags Use any tag instead of only annotated tags. In ATF, only some tags are annotated, actually the last annotated tag is "v0.2", whereas we are on "v1.3" tag now. This option is needed to get something like v1.3-233-gbcc2bf0 instead of v0.2-1713-gbcc2bf0. --dirty The mark "-dirty" is appended if the source tree is locally modified. With this commit, the welcome string NOTICE: BL1: v1.3(debug):bcc2bf0 will become like follows: NOTICE: BL1: v1.3(debug):v1.3-233-gbcc2bf0-dirty While we are here, let's add "2> /dev/null" as well to silently ignore any error message from git. We should not assume that users always work in a git repository; the ATF might be released in a tarball form instead of a git repository. In such a case, the git command will fail, then the ugly message "fatal: Not a git ..." will be displayed during the build: $ make CROSS_COMPILE=aarch64-linux-gnu- fatal: Not a git repository (or any of the parent directories): .git Building fvp CC drivers/io/io_semihosting.c CC lib/semihosting/semihosting.c ... Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-31Merge pull request #821 from jeenu-arm/errata-printingdanh-arm
Errata printing infrastructure