Age | Commit message (Expand) | Author |
---|---|---|
2017-09-01 | cpu log buffer size depends on cache line size | Etienne Carriere |
2017-06-21 | Fully initialise essential control registers | David Cunado |
2017-05-03 | Use SPDX license identifiers | dp-arm |
2017-02-06 | Replace some memset call by zeromem | Douglas Raillard |
2016-12-12 | AArch32: Fix the stack alignment issue | Soby Mathew |
2016-12-01 | Reset EL2 and EL3 configurable controls | David Cunado |
2016-11-09 | Reset debug registers MDCR-EL3/SDCR and MDCR_EL2/HDCR | David Cunado |
2016-10-14 | Unify SCTLR initialization for AArch32 normal world | Soby Mathew |
2016-08-31 | AArch32: Fix SCTLR context initialization | Soby Mathew |
2016-08-10 | AArch32: Add support in TF libraries | Soby Mathew |