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Test if a partition reboot has taken place with the MU
interrupt bit. Check before returning the entrypoint
Signed-off-by: Teo Hall <teo.hall@nxp.com>
(cherry picked from commit 627396daa5d9b62e8a0fb118844d1507b94e23f5)
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Configure OP-TEE Share memory to be accessible by OS.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
(cherry picked from commit b2d0c8530c75bb77450372114229cadd8555780b)
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Fix size of BL32 (currently is 32MB).
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
(cherry picked from commit 5087a9cda77b3c6a5566e4a9520ab476bfe9154a)
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Reuse Trusty support for OP-TEE
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
(cherry picked from commit a558c8fb87171f4ebcc44bb0b8aa699c989a2a7d)
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JR0 and JR1 of CAAM are owned by SECO, only kick the power
of JR2 and JR3 here and assign the resources to be accessed
by secure world.
Signed-off-by: Ji Luo <ji.luo@nxp.com>
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Tee(Trusty Os) will be stored in fit for Android and Android Auto
so we don't need to copy it anymore, this will save some boot time.
Signed-off-by: Luo Ji <ji.luo@nxp.com>
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Add support for enabling output debug message to SC
console, SC_CONSOLE is used to enable/disable it.
Example log output on SC console as below:
*** Debug Monitor ***
>$ NOTICE: smc_fid is c2000003
imx_pwr_domain_on cluster_id 0, cpu_id 1
cluster:0 core:1 is on
imx_pwr_domain_on cluster_id 0, cpu_id 2
cluster:0 core:2 is on
imx_pwr_domain_on cluster_id 0, cpu_id 3
cluster:0 core:3 is on
imx_pwr_domain_on cluster_id 1, cpu_id 0
cluster:1 core:0 is on
imx_pwr_domain_on cluster_id 1, cpu_id 1
cluster:1 core:1 is on
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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The Trusty OS binary will be installed into
container.img and loaded into 0x84000000.
Due Trusty OS addresss is in 0xfe000000 which
ROM cannot reach, so use ATF to copy it into
the target address.
Mapped the BL32 code into MMU due the Trusty
SPD need to check the code status and decide
the CPU executing mode.
To reserve and protect the memory for secure
world, modify the partition code to keep
BL32 spaces in secure_part.
Signed-off-by: Haoran.Wang <elven.wang@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
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clean up the license identifier with short SPDX short identifier.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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Use MU0 to comply with boot image usage of MU,
Also power on and pass MU1 for OS/Hypervisor.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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In order to save power when AP side is suspend,
the DBLOG need to be put into low power mode.
GIC need to be power off to save power. before GIC
power off, we need to save the GIC setting, then
after resume, we need to restore the gic setting.
irqsteer need to be used to wakeup the AP side
when wakeup interrupt is pending for AP side.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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The irqstr for scu2 is used for AP wakeup if gic is power off,
so this resource need to be added to the sec rsrc.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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In worse case, MAX_XLAT_TABLES needs to be equal to
MAX_MMAP_REGIONS, enlarge MAX_XLAT_TABLES to make debug
version ATF can boot up, otherwise, it may fail at below:
ASSERT: lib/xlat_tables/xlat_tables_common.c <362>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Add i.MX8QM board reboot support.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Change to search the ATF owned memory regions and assign them to non-secure
OS partition. Not allocate new memory region for each one.
Signed-off-by: Ye Li <ye.li@nxp.com>
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As we already have control for debug console in platform_def.h,
so no need to un-initialize console in plat runtime setup, just
overwrite the common implementation with blank function.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Not only the resources, but also the memory regions need to assign to
non-secure partition. Otherwise, when the boot partition is secured,
the OS non-secure partition can't access any memory.
This patch currently assign all memory to NS partition, since it is not
isolated, the current secure partition also can access them. In future,
may need to change the regions for reserving some memory in secure
partition for ATF and BL32.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Disable ATF console output for iMX8QM
Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
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Need to add support for booting up A72 cluster only,
so on need to check the cluster ID for primary CPU,
that means if CPU ID is 0, then it can be as primary
CPU.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
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add more resources to secure partition for
protection. Also add in functionality to allow
for register access of some secure-owned
peripherals.
These peripherals will still be protected from
power or clk changes.
Signed-off-by: Teo Hall <teo.hall@nxp.com>
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add rm svc api and set aside separate MU for
secure api calls into SCU
Signed-off-by: Teo Hall <teo.hall@nxp.com>
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UART baudrate is 115200 on i.MX8QM ARM2 board.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Add i.MX8QM platform support.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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