From 25278eaba7b93701e046a8215f84843674d4ca02 Mon Sep 17 00:00:00 2001 From: Louis Mayencourt Date: Wed, 27 Feb 2019 14:24:16 +0000 Subject: Cortex-A73: Implement workaround for errata 852427 In AArch32, execution of 2 instructions with opposite condition code might lead to either a data corruption or a CPU deadlock. Set the bit 12 of the Diagnostic Register to prevent this. Change-Id: I22b4f25fe933e2942fd785e411e7c0aa39d5c1f4 Signed-off-by: Louis Mayencourt --- docs/cpu-specific-build-macros.rst | 3 +++ 1 file changed, 3 insertions(+) (limited to 'docs/cpu-specific-build-macros.rst') diff --git a/docs/cpu-specific-build-macros.rst b/docs/cpu-specific-build-macros.rst index 1f23b5bf..116b4ba3 100644 --- a/docs/cpu-specific-build-macros.rst +++ b/docs/cpu-specific-build-macros.rst @@ -134,6 +134,9 @@ For Cortex-A72, the following errata build flags are defined : For Cortex-A73, the following errata build flags are defined : +- ``ERRATA_A73_852427``: This applies errata 852427 workaround to Cortex-A73 + CPU. This needs to be enabled only for revision r0p0 of the CPU. + - ``ERRATA_A73_855423``: This applies errata 855423 workaround to Cortex-A73 CPU. This needs to be enabled only for revision <= r0p1 of the CPU. -- cgit v1.2.3