From 58032586f88980c03969e47bcc9a84b5abc788e2 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sat, 12 Aug 2017 04:07:39 -0500 Subject: allwinner: Introduce basic platform support This platform supports Allwinner's SoCs with ARMv8 cores. So far they all sport a single cluster of Cortex-A53 cores. "sunxi" is the original code name used for this platform, and since it appears in the Linux kernel and in U-Boot as well, we use it here as a short file name prefix and for identifiers. This port includes BL31 support only. U-Boot's SPL takes the role of the primary loader, also doing the DRAM initialization. It then loads the rest of the firmware, namely ATF and U-Boot (BL33), then hands execution over to ATF. This commit includes the basic platform code shared across all SoCs. There is no platform.mk yet. [Andre: moved files into proper directories, supported RESET_TO_BL31, various clean ups and simplifications ] Signed-off-by: Samuel Holland Signed-off-by: Andre Przywara --- plat/allwinner/common/sunxi_common.c | 56 ++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 plat/allwinner/common/sunxi_common.c (limited to 'plat/allwinner/common/sunxi_common.c') diff --git a/plat/allwinner/common/sunxi_common.c b/plat/allwinner/common/sunxi_common.c new file mode 100644 index 00000000..e36c8b07 --- /dev/null +++ b/plat/allwinner/common/sunxi_common.c @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include +#include +#include +#include + +static mmap_region_t sunxi_mmap[PLATFORM_MMAP_REGIONS + 1] = { + MAP_REGION_FLAT(SUNXI_ROM_BASE, SUNXI_ROM_SIZE, + MT_MEMORY | MT_RO | MT_SECURE), + MAP_REGION_FLAT(SUNXI_SRAM_BASE, SUNXI_SRAM_SIZE, + MT_MEMORY | MT_RW | MT_SECURE), + MAP_REGION_FLAT(SUNXI_DEV_BASE, SUNXI_DEV_SIZE, + MT_DEVICE | MT_RW | MT_SECURE), + MAP_REGION_FLAT(SUNXI_DRAM_BASE, SUNXI_DRAM_SIZE, + MT_MEMORY | MT_RW | MT_NS), + {}, +}; + +unsigned int plat_get_syscnt_freq2(void) +{ + return SUNXI_OSC24M_CLK_IN_HZ; +} + +uintptr_t plat_get_ns_image_entrypoint(void) +{ +#ifdef PRELOADED_BL33_BASE + return PRELOADED_BL33_BASE; +#else + return PLAT_SUNXI_NS_IMAGE_OFFSET; +#endif +} + +void sunxi_configure_mmu_el3(int flags) +{ + mmap_add_region(BL31_BASE, BL31_BASE, + BL31_LIMIT - BL31_BASE, + MT_MEMORY | MT_RW | MT_SECURE); + mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, + BL_CODE_END - BL_CODE_BASE, + MT_CODE | MT_SECURE); + mmap_add_region(BL_RO_DATA_BASE, BL_RO_DATA_BASE, + BL_RO_DATA_END - BL_RO_DATA_BASE, + MT_RO_DATA | MT_SECURE); + mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, + BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE, + MT_DEVICE | MT_RW | MT_SECURE); + mmap_add(sunxi_mmap); + init_xlat_tables(); + + enable_mmu_el3(0); +} -- cgit v1.2.3