From 57b4f1dd8006f7c3cbbcd154cc006f5a3a9062d6 Mon Sep 17 00:00:00 2001 From: Teo Hall Date: Wed, 3 May 2017 17:46:41 -0500 Subject: update secure partition and add NS access add more resources to secure partition for protection. Also add in functionality to allow for register access of some secure-owned peripherals. These peripherals will still be protected from power or clk changes. Signed-off-by: Teo Hall --- plat/imx/imx8qm/include/sec_rsrc.h | 27 +++++++++++++++++++-------- 1 file changed, 19 insertions(+), 8 deletions(-) (limited to 'plat/imx/imx8qm/include') diff --git a/plat/imx/imx8qm/include/sec_rsrc.h b/plat/imx/imx8qm/include/sec_rsrc.h index df3ccfdd..b05f0aa0 100644 --- a/plat/imx/imx8qm/include/sec_rsrc.h +++ b/plat/imx/imx8qm/include/sec_rsrc.h @@ -1,14 +1,25 @@ /* Copyright 2017 NXP */ /* Include file detailing the resource partitioning for ATF */ - - - - +/* resources that are going to stay in secure partition */ sc_rsrc_t secure_rsrcs[] = { - SC_R_MU_1A + SC_R_MU_1A, + SC_R_A53, + SC_R_A53_0, + SC_R_A53_1, + SC_R_A53_2, + SC_R_A53_3, + SC_R_A72, + SC_R_A72_0, + SC_R_A72_1, + SC_R_GIC, + SC_R_GIC_SMMU, + SC_R_CCI }; - - - +/* resources that have register access for non-secure domain */ +sc_rsrc_t ns_access_allowed[] = { + SC_R_GIC, + SC_R_GIC_SMMU, + SC_R_CCI +}; -- cgit v1.2.3