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authorEmanuele Ghidoli <emanuele.ghidoli@toradex.com>2025-01-15 23:27:46 +0100
committerEmanuele Ghidoli <emanuele.ghidoli@toradex.com>2025-01-16 19:06:44 +0100
commit6c8724cd53b19508132acadd8c0e099e5f4039f9 (patch)
tree865f9b7a57ca61c5048df9caccd4393ab559b602
parent642e642f65b5ec35df0e92d6c1a594656226ba6a (diff)
boards: tdx-smarc-imx95: remove pcal6408a gpio expander
The PCAL6408A component is present on the evk but not on the Toradex Smarc iMX95. Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
-rwxr-xr-xboards/tdx-smarc-imx95/board.c3
-rwxr-xr-xboards/tdx-smarc-imx95/pin_mux.c4
-rwxr-xr-xboards/tdx-smarc-imx95/sm/Makefile3
-rwxr-xr-xboards/tdx-smarc-imx95/sm/brd_sm_control.c154
-rwxr-xr-xboards/tdx-smarc-imx95/sm/brd_sm_control.h35
-rwxr-xr-xboards/tdx-smarc-imx95/sm/brd_sm_handlers.c217
-rwxr-xr-xboards/tdx-smarc-imx95/sm/brd_sm_handlers.h34
-rwxr-xr-xconfigs/tdx-smarc-imx95.cfg6
-rwxr-xr-xconfigs/tdx-smarc-imx95/config_scmi.h6
9 files changed, 56 insertions, 406 deletions
diff --git a/boards/tdx-smarc-imx95/board.c b/boards/tdx-smarc-imx95/board.c
index c07dc35..55bd498 100755
--- a/boards/tdx-smarc-imx95/board.c
+++ b/boards/tdx-smarc-imx95/board.c
@@ -337,9 +337,6 @@ void BOARD_InitHandlers(void)
/* Enable FCCU handler */
NVIC_SetPriority(FCCU_INT0_IRQn, IRQ_PRIO_NOPREEMPT_CRITICAL);
NVIC_EnableIRQ(FCCU_INT0_IRQn);
-
- /* Enable GPIO1 handler */
- NVIC_EnableIRQ(GPIO1_0_IRQn);
}
/*--------------------------------------------------------------------------*/
diff --git a/boards/tdx-smarc-imx95/pin_mux.c b/boards/tdx-smarc-imx95/pin_mux.c
index b40d897..797150c 100755
--- a/boards/tdx-smarc-imx95/pin_mux.c
+++ b/boards/tdx-smarc-imx95/pin_mux.c
@@ -50,9 +50,5 @@ void BOARD_InitPins(void)
IOMUXC_SetPinConfig(IOMUXC_PAD_I2C2_SDA__LPI2C2_SDA, IOMUXC_PAD_DSE(0xFU)
| IOMUXC_PAD_FSEL1(0x3U) | IOMUXC_PAD_PU(0x1U) | IOMUXC_PAD_OD(0x1U));
#endif
-
- /* Configure GPIO1-10 (INT from the PCAL6408A */
- IOMUXC_SetPinMux(IOMUXC_PAD_PDM_BIT_STREAM1__GPIO1_IO_BIT10, 0U);
- IOMUXC_SetPinConfig(IOMUXC_PAD_PDM_BIT_STREAM1__GPIO1_IO_BIT10, 0U);
}
diff --git a/boards/tdx-smarc-imx95/sm/Makefile b/boards/tdx-smarc-imx95/sm/Makefile
index 75ff64e..91d901c 100755
--- a/boards/tdx-smarc-imx95/sm/Makefile
+++ b/boards/tdx-smarc-imx95/sm/Makefile
@@ -40,7 +40,6 @@ INCLUDE += \
-I$(BOARDS_DIR) \
-I$(BOARD_DIR) \
-I$(BOARD_DIR)/sm \
- -I$(COMPONENTS_DIR)/pcal6408a \
-I$(COMPONENTS_DIR)/pf09 \
-I$(COMPONENTS_DIR)/pf53
@@ -49,7 +48,6 @@ VPATH += \
$(BOARDS_DIR) \
$(BOARD_DIR) \
$(BOARD_DIR)/sm \
- $(COMPONENTS_DIR)/pcal6408a \
$(COMPONENTS_DIR)/pf09 \
$(COMPONENTS_DIR)/pf53
@@ -60,7 +58,6 @@ OBJS += \
$(OUT)/brd_sm_control.o \
$(OUT)/brd_sm_sensor.o \
$(OUT)/brd_sm_voltage.o \
- $(OUT)/fsl_pcal6408a.o \
$(OUT)/fsl_pf09.o \
$(OUT)/fsl_pf53.o
diff --git a/boards/tdx-smarc-imx95/sm/brd_sm_control.c b/boards/tdx-smarc-imx95/sm/brd_sm_control.c
index e244403..dabb349 100755
--- a/boards/tdx-smarc-imx95/sm/brd_sm_control.c
+++ b/boards/tdx-smarc-imx95/sm/brd_sm_control.c
@@ -44,13 +44,6 @@
/* Local defines */
-/* PCAL6408A input signals */
-#define PCAL6408A_INPUT_SD3_WAKE 0U
-#define PCAL6408A_INPUT_PCIE1_WAKE 4U
-#define PCAL6408A_INPUT_BT_WAKE 5U
-#define PCAL6408A_INPUT_PCIE2_WAKE 6U
-#define PCAL6408A_INPUT_BUTTON 7U
-
/* Local types */
/* Local variables */
@@ -95,53 +88,10 @@ int32_t BRD_SM_ControlSet(uint32_t ctrlId, uint32_t numVal,
/*--------------------------------------------------------------------------*/
int32_t BRD_SM_ControlGet(uint32_t ctrlId, uint32_t *numRtn, uint32_t *rtn)
{
- int32_t status = SM_ERR_SUCCESS;
-
- /* Check to see if ctrlId is within bounds*/
- if (ctrlId < SM_NUM_CTRL)
- {
- /* Check if device or board */
- if (ctrlId < DEV_SM_NUM_CTRL)
- {
- status = DEV_SM_ControlGet(ctrlId, numRtn, rtn);
- }
- else if (ctrlId == BRD_SM_CTRL_TEST)
- {
- *numRtn = 0U;
- status = SM_ERR_NOT_SUPPORTED;
- }
- else
- {
- uint8_t data;
-
- /* Read expander data input */
- if (PCAL6408A_InputGet(&g_pcal6408aDev, &data))
- {
- uint32_t shift = ctrlId - DEV_SM_NUM_CTRL;
-
- /* Adjust bit position */
- if (shift > 0U)
- {
- shift += 3U;
- }
-
- *numRtn = 1U;
- rtn[0] = (((uint32_t) data) >> shift) & 0x1UL;
- }
- else
- {
- status = SM_ERR_HARDWARE_ERROR;
- }
- }
- }
- else
- {
- *numRtn = 0U;
- status = SM_ERR_NOT_FOUND;
- }
+ if (ctrlId < DEV_SM_NUM_CTRL)
+ return DEV_SM_ControlGet(ctrlId, numRtn, rtn);
- /* Return status */
- return status;
+ return SM_ERR_NOT_FOUND;
}
/*--------------------------------------------------------------------------*/
@@ -203,101 +153,3 @@ int32_t BRD_SM_ControlExtGet(uint32_t ctrlId, uint32_t addr,
/* Return status */
return status;
}
-
-/*--------------------------------------------------------------------------*/
-/* Configure notification flags */
-/*--------------------------------------------------------------------------*/
-int32_t BRD_SM_ControlFlagsSet(uint32_t ctrlId, uint32_t flags)
-{
- int32_t status = SM_ERR_SUCCESS;
-
- /* Check if device or board */
- if (ctrlId < DEV_SM_NUM_CTRL)
- {
- status = DEV_SM_ControlFlagsSet(ctrlId, flags);
- }
- else
- {
- uint8_t mask;
- uint32_t val;
- uint32_t enb = (flags != 0U) ? 0U : 1U;
-
- switch (ctrlId)
- {
- case BRD_SM_CTRL_SD3_WAKE:
- mask = BIT8(PCAL6408A_INPUT_SD3_WAKE);
- val = (enb & 0x1U) << PCAL6408A_INPUT_SD3_WAKE;
- break;
- case BRD_SM_CTRL_PCIE1_WAKE:
- mask = BIT8(PCAL6408A_INPUT_PCIE1_WAKE);
- val = (enb & 0x1U) << PCAL6408A_INPUT_PCIE1_WAKE;
- break;
- case BRD_SM_CTRL_BT_WAKE:
- mask = BIT8(PCAL6408A_INPUT_BT_WAKE);
- val = (enb & 0x1U) << PCAL6408A_INPUT_BT_WAKE;
- break;
- case BRD_SM_CTRL_PCIE2_WAKE:
- mask = BIT8(PCAL6408A_INPUT_PCIE2_WAKE);
- val = (enb & 0x1U) << PCAL6408A_INPUT_PCIE2_WAKE;
- break;
- case BRD_SM_CTRL_BUTTON:
- mask = BIT8(PCAL6408A_INPUT_BUTTON);
- val = (enb & 0x1U) << PCAL6408A_INPUT_BUTTON;
- break;
- default:
- status = SM_ERR_NOT_FOUND;
- break;
- }
-
- if (status == SM_ERR_SUCCESS)
- {
- status = BRD_SM_BusExpMaskSet((uint8_t) val, mask);
- }
- }
-
- return status;
-}
-
-/*--------------------------------------------------------------------------*/
-/* Control handler */
-/*--------------------------------------------------------------------------*/
-void BRD_SM_ControlHandler(uint8_t status, uint8_t val)
-{
- uint32_t data = (uint32_t) val;
-
- /* Handle SD3 wake */
- if ((status & BIT8(PCAL6408A_INPUT_SD3_WAKE)) != 0U)
- {
- LMM_MiscControlEvent(BRD_SM_CTRL_SD3_WAKE,
- ((data >> PCAL6408A_INPUT_SD3_WAKE) & 0x1U) + 1U);
- }
-
- /* Handle PCIe1 wake */
- if ((status & BIT8(PCAL6408A_INPUT_PCIE1_WAKE)) != 0U)
- {
- LMM_MiscControlEvent(BRD_SM_CTRL_PCIE1_WAKE,
- ((data >> PCAL6408A_INPUT_PCIE1_WAKE) & 0x1U) + 1U);
- }
-
- /* Handle BT wake */
- if ((status & BIT8(PCAL6408A_INPUT_BT_WAKE)) != 0U)
- {
- LMM_MiscControlEvent(BRD_SM_CTRL_BT_WAKE,
- ((data >> PCAL6408A_INPUT_BT_WAKE) & 0x1U) + 1U);
- }
-
- /* Handle PCIe2 wake */
- if ((status & BIT8(PCAL6408A_INPUT_PCIE2_WAKE)) != 0U)
- {
- LMM_MiscControlEvent(BRD_SM_CTRL_PCIE2_WAKE,
- ((data >> PCAL6408A_INPUT_PCIE2_WAKE) & 0x1U) + 1U);
- }
-
- /* Handle button */
- if ((status & BIT8(PCAL6408A_INPUT_BUTTON)) != 0U)
- {
- LMM_MiscControlEvent(BRD_SM_CTRL_BUTTON,
- ((data >> PCAL6408A_INPUT_BUTTON) & 0x1U) + 1U);
- }
-}
-
diff --git a/boards/tdx-smarc-imx95/sm/brd_sm_control.h b/boards/tdx-smarc-imx95/sm/brd_sm_control.h
index 9d2679d..075b7c2 100755
--- a/boards/tdx-smarc-imx95/sm/brd_sm_control.h
+++ b/boards/tdx-smarc-imx95/sm/brd_sm_control.h
@@ -62,11 +62,11 @@
#define SM_CONTROLGET BRD_SM_ControlGet /*!< Control get */
#define SM_CONTROLEXTSET BRD_SM_ControlExtSet /*!< Extended control set */
#define SM_CONTROLEXTGET BRD_SM_ControlExtGet /*!< Extended control get */
-#define SM_CONTROLFLAGSSET BRD_SM_ControlFlagsSet /*!< Control flags */
+#define SM_CONTROLFLAGSSET DEV_SM_ControlFlagsSet /*!< Control flags */
/** @} */
/*! Number of board controls */
-#define BRD_SM_NUM_CTRL 6UL
+#define BRD_SM_NUM_CTRL 1UL
/*! Total number of controls */
#define SM_NUM_CTRL (DEV_SM_NUM_CTRL + BRD_SM_NUM_CTRL)
@@ -75,12 +75,7 @@
* @name BRD_SM control domain indexes
*/
/** @{ */
-#define BRD_SM_CTRL_SD3_WAKE (DEV_SM_NUM_CTRL + 0U) /*!< PCAL6408A-0 */
-#define BRD_SM_CTRL_PCIE1_WAKE (DEV_SM_NUM_CTRL + 1U) /*!< PCAL6408A-4 */
-#define BRD_SM_CTRL_BT_WAKE (DEV_SM_NUM_CTRL + 2U) /*!< PCAL6408A-5 */
-#define BRD_SM_CTRL_PCIE2_WAKE (DEV_SM_NUM_CTRL + 3U) /*!< PCAL6408A-6 */
-#define BRD_SM_CTRL_BUTTON (DEV_SM_NUM_CTRL + 4U) /*!< PCAL6408A-7 */
-#define BRD_SM_CTRL_TEST (DEV_SM_NUM_CTRL + 5U) /*!< Test */
+#define BRD_SM_CTRL_TEST (DEV_SM_NUM_CTRL + 0U) /*!< Test */
/** @} */
/* Types */
@@ -169,30 +164,6 @@ int32_t BRD_SM_ControlExtSet(uint32_t ctrlId, uint32_t addr,
int32_t BRD_SM_ControlExtGet(uint32_t ctrlId, uint32_t addr,
uint32_t numRtn, uint32_t *rtn);
-/*!
- * Configure notification flags for a control.
- *
- * @param[in] ctrlId Index of control to take action
- * @param[in] flags Action to take
- *
- * This function allows a caller to configure the notification flags.
- * These often enable/disable hardware interrupts.
- *
- * @return Returns the status (::SM_ERR_SUCCESS = success).
- *
- * Return errors (see @ref STATUS "SM error codes"):
- * - ::SM_ERR_NOT_FOUND: if ctrlId is not valid.
- */
-int32_t BRD_SM_ControlFlagsSet(uint32_t ctrlId, uint32_t flags);
-
-/*!
- * Control handler.
- *
- * @param[in] status Interrupt status
- * @param[in] val Signal state
- */
-void BRD_SM_ControlHandler(uint8_t status, uint8_t val);
-
/** @} */
#endif /* BRD_SM_CONTROL_H */
diff --git a/boards/tdx-smarc-imx95/sm/brd_sm_handlers.c b/boards/tdx-smarc-imx95/sm/brd_sm_handlers.c
index 213a186..0840103 100755
--- a/boards/tdx-smarc-imx95/sm/brd_sm_handlers.c
+++ b/boards/tdx-smarc-imx95/sm/brd_sm_handlers.c
@@ -48,36 +48,19 @@
/* I2C device addresses */
#define BOARD_PF09_DEV_ADDR 0x08U
-#define BOARD_PCAL6408A_DEV_ADDR 0x20U
#define BOARD_PF5301_DEV_ADDR 0x2AU
#define BOARD_PF5302_DEV_ADDR 0x29U
-#define PCAL6408A_INPUT_PF53_ARM_PG 1U
-#define PCAL6408A_INPUT_PF53_SOC_PG 2U
-#define PCAL6408A_INPUT_PF09_INT 3U
-
/* Local types */
/* Local variables */
/* Global variables */
-PCAL6408A_Type g_pcal6408aDev;
PF09_Type g_pf09Dev;
PF53_Type g_pf5301Dev;
PF53_Type g_pf5302Dev;
-irq_prio_info_t g_brdIrqPrioInfo[BOARD_NUM_IRQ_PRIO_IDX] =
-{
- [BOARD_IRQ_PRIO_IDX_GPIO1_0] =
- {
- .irqId = GPIO1_0_IRQn,
- .irqCntr = 0U,
- .basePrio = 0U,
- .dynPrioEn = false
- }
-};
-
uint32_t g_pmicFaultFlags = 0U;
/* Local functions */
@@ -91,113 +74,90 @@ int32_t BRD_SM_SerialDevicesInit(void)
{
int32_t status = SM_ERR_SUCCESS;
LPI2C_Type *const s_i2cBases[] = LPI2C_BASE_PTRS;
- pcal6408a_config_t pcal6408Config;
- /* Fill in PCAL6408A dev */
- g_pcal6408aDev.i2cBase = s_i2cBases[BOARD_I2C_INSTANCE];
- g_pcal6408aDev.devAddr = BOARD_PCAL6408A_DEV_ADDR;
+ /* Fill in PF09 PMIC handle */
+ g_pf09Dev.i2cBase = s_i2cBases[BOARD_I2C_INSTANCE];
+ g_pf09Dev.devAddr = BOARD_PF09_DEV_ADDR;
+ g_pf09Dev.crcEn = true;
- /* Init the bus expander */
- PCAL6408A_GetDefaultConfig(&pcal6408Config);
- pcal6408Config.inputLatch = 0xFFU;
- if (!PCAL6408A_Init(&g_pcal6408aDev, &pcal6408Config))
+ /* Inialize PF09 PMIC */
+ if (!PF09_Init(&g_pf09Dev))
{
status = SM_ERR_HARDWARE_ERROR;
}
- else
+
+ /* Disable voltage monitor 1 */
+ if (status == SM_ERR_SUCCESS)
{
- if (!PCAL6408A_IntMaskSet(&g_pcal6408aDev, PCAL6408A_INITIAL_MASK))
+ if (!PF09_MonitorEnable(&g_pf09Dev, PF09_VMON1, false))
{
status = SM_ERR_HARDWARE_ERROR;
}
}
+ /* Disable voltage monitor 2 */
if (status == SM_ERR_SUCCESS)
{
- /* Fill in PF09 PMIC handle */
- g_pf09Dev.i2cBase = s_i2cBases[BOARD_I2C_INSTANCE];
- g_pf09Dev.devAddr = BOARD_PF09_DEV_ADDR;
- g_pf09Dev.crcEn = true;
-
- /* Inialize PF09 PMIC */
- if (!PF09_Init(&g_pf09Dev))
+ if (!PF09_MonitorEnable(&g_pf09Dev, PF09_VMON2, false))
{
status = SM_ERR_HARDWARE_ERROR;
}
+ }
- /* Disable voltage monitor 1 */
- if (status == SM_ERR_SUCCESS)
- {
- if (!PF09_MonitorEnable(&g_pf09Dev, PF09_VMON1, false))
- {
- status = SM_ERR_HARDWARE_ERROR;
- }
- }
-
- /* Disable voltage monitor 2 */
- if (status == SM_ERR_SUCCESS)
+ /* Disable the PWRUP interrupt */
+ if (status == SM_ERR_SUCCESS)
+ {
+ const uint8_t mask[PF09_MASK_LEN] =
{
- if (!PF09_MonitorEnable(&g_pf09Dev, PF09_VMON2, false))
- {
- status = SM_ERR_HARDWARE_ERROR;
- }
- }
+ [PF09_MASK_IDX_STATUS1] = 0x08U
+ };
- /* Disable the PWRUP interrupt */
- if (status == SM_ERR_SUCCESS)
+ if (!PF09_IntEnable(&g_pf09Dev, mask, PF09_MASK_LEN, false))
{
- const uint8_t mask[PF09_MASK_LEN] =
- {
- [PF09_MASK_IDX_STATUS1] = 0x08U
- };
-
- if (!PF09_IntEnable(&g_pf09Dev, mask, PF09_MASK_LEN, false))
- {
- status = SM_ERR_HARDWARE_ERROR;
- }
+ status = SM_ERR_HARDWARE_ERROR;
}
+ }
- /* Change the LDO3 sequence */
- if (status == SM_ERR_SUCCESS)
+ /* Change the LDO3 sequence */
+ if (status == SM_ERR_SUCCESS)
+ {
+ if (!PF09_PmicWrite(&g_pf09Dev, 0x4AU, 0x1EU, 0xFFU))
{
- if (!PF09_PmicWrite(&g_pf09Dev, 0x4AU, 0x1EU, 0xFFU))
- {
- status = SM_ERR_HARDWARE_ERROR;
- }
+ status = SM_ERR_HARDWARE_ERROR;
}
+ }
- /* Set the LDO3 OV bypass */
- if (status == SM_ERR_SUCCESS)
+ /* Set the LDO3 OV bypass */
+ if (status == SM_ERR_SUCCESS)
+ {
+ if (!PF09_PmicWrite(&g_pf09Dev, 0x7FU, 0xFCU, 0xFFU))
{
- if (!PF09_PmicWrite(&g_pf09Dev, 0x7FU, 0xFCU, 0xFFU))
- {
- status = SM_ERR_HARDWARE_ERROR;
- }
+ status = SM_ERR_HARDWARE_ERROR;
}
+ }
- /* Set the OV debounce to 50us due to errata ER011/12 */
- if (status == SM_ERR_SUCCESS)
+ /* Set the OV debounce to 50us due to errata ER011/12 */
+ if (status == SM_ERR_SUCCESS)
+ {
+ if (!PF09_PmicWrite(&g_pf09Dev, 0x37U, 0x94U, 0xFFU))
{
- if (!PF09_PmicWrite(&g_pf09Dev, 0x37U, 0x94U, 0xFFU))
- {
- status = SM_ERR_HARDWARE_ERROR;
- }
+ status = SM_ERR_HARDWARE_ERROR;
}
+ }
- /* Save and clear any fault flags */
- if (status == SM_ERR_SUCCESS)
+ /* Save and clear any fault flags */
+ if (status == SM_ERR_SUCCESS)
+ {
+ if (!PF09_FaultFlags(&g_pf09Dev, &g_pmicFaultFlags, true))
{
- if (!PF09_FaultFlags(&g_pf09Dev, &g_pmicFaultFlags, true))
- {
- status = SM_ERR_HARDWARE_ERROR;
- }
+ status = SM_ERR_HARDWARE_ERROR;
}
+ }
- /* Handle any already pending PF09 interrupts */
- if (status == SM_ERR_SUCCESS)
- {
- BRD_SM_Pf09Handler();
- }
+ /* Handle any already pending PF09 interrupts */
+ if (status == SM_ERR_SUCCESS)
+ {
+ BRD_SM_Pf09Handler();
}
if (status == SM_ERR_SUCCESS)
@@ -227,87 +187,10 @@ int32_t BRD_SM_SerialDevicesInit(void)
}
}
- if (status == SM_ERR_SUCCESS)
- {
- rgpio_pin_config_t gpioConfig =
- {
- kRGPIO_DigitalInput,
- 0U
- };
-
- /* Init GPIO1-10 */
- RGPIO_PinInit(GPIO1, 10U, &gpioConfig);
- RGPIO_SetPinInterruptConfig(GPIO1, 10U, kRGPIO_InterruptOutput0,
- kRGPIO_InterruptLogicZero);
- }
-
- /* Return status */
- return status;
-}
-
-/*--------------------------------------------------------------------------*/
-/* Set bus expander interrupt mask */
-/*--------------------------------------------------------------------------*/
-int32_t BRD_SM_BusExpMaskSet(uint8_t val, uint8_t mask)
-{
- int32_t status = SM_ERR_SUCCESS;
- static uint8_t cachedMask = PCAL6408A_INITIAL_MASK;
- uint8_t newMask = (cachedMask & ~mask) | val;
-
- /* Mask changed? */
- if (cachedMask != newMask)
- {
- if (PCAL6408A_IntMaskSet(&g_pcal6408aDev, newMask))
- {
- cachedMask = newMask;
- }
- else
- {
- status = SM_ERR_HARDWARE_ERROR;
- }
- }
-
/* Return status */
return status;
}
-/*--------------------------------------------------------------------------*/
-/* GPIO1 handler */
-/*--------------------------------------------------------------------------*/
-void GPIO1_0_IRQHandler(void)
-{
- uint32_t flags;
- uint8_t status, val;
-
- /* Get GPIO status */
- flags = RGPIO_GetPinsInterruptFlags(GPIO1, kRGPIO_InterruptOutput0);
-
- /* Get PCAL6408A status */
- (void) PCAL6408A_IntStatusGet(&g_pcal6408aDev, &status);
-
- /* Get value and Clear PCAL6408A interrupts */
- (void) PCAL6408A_InputGet(&g_pcal6408aDev, &val);
-
- /* Clear GPIO interrupts */
- RGPIO_ClearPinsInterruptFlags(GPIO1, kRGPIO_InterruptOutput0, flags);
-
- /* Handle PF09 interrupt */
- if ((status & BIT8(PCAL6408A_INPUT_PF09_INT)) != 0U)
- {
- /* Asserts low */
- if ((val & BIT8(PCAL6408A_INPUT_PF09_INT)) == 0U)
- {
- BRD_SM_Pf09Handler();
- }
- }
-
- /* Handle controls interrupts */
- BRD_SM_ControlHandler(status, val);
-
- /* Adjust dynamic IRQ priority */
- (void) DEV_SM_IrqPrioUpdate();
-}
-
/*==========================================================================*/
/*--------------------------------------------------------------------------*/
diff --git a/boards/tdx-smarc-imx95/sm/brd_sm_handlers.h b/boards/tdx-smarc-imx95/sm/brd_sm_handlers.h
index d4137a6..64280f0 100755
--- a/boards/tdx-smarc-imx95/sm/brd_sm_handlers.h
+++ b/boards/tdx-smarc-imx95/sm/brd_sm_handlers.h
@@ -52,28 +52,15 @@
#include "sm.h"
#include "dev_sm.h"
-#include "fsl_pcal6408a.h"
#include "fsl_pf09.h"
#include "fsl_pf53.h"
/* Defines */
-/*! Initial PCAL6408A interrupt mask */
-#define PCAL6408A_INITIAL_MASK 0xF7U
-
-/*! Number of board IRQs participating dynamic prioritization */
-#define BOARD_NUM_IRQ_PRIO_IDX 1U
-
-/*! Dynamic IRQ priority table index for GPIO1 */
-#define BOARD_IRQ_PRIO_IDX_GPIO1_0 0U
-
/* Types */
/* External variables */
-/*! Handle to access PCAL6408A */
-extern PCAL6408A_Type g_pcal6408aDev;
-
/*! Handle to access PF09 */
extern PF09_Type g_pf09Dev;
@@ -83,9 +70,6 @@ extern PF53_Type g_pf5301Dev;
/*! Handle to access PF5302 */
extern PF53_Type g_pf5302Dev;
-/*! Array of dynamic priority info for board IRQs */
-extern irq_prio_info_t g_brdIrqPrioInfo[BOARD_NUM_IRQ_PRIO_IDX];
-
/*! Fault flags from the PMICs */
extern uint32_t g_pmicFaultFlags;
@@ -98,24 +82,6 @@ extern uint32_t g_pmicFaultFlags;
*/
int32_t BRD_SM_SerialDevicesInit(void);
-/*!
- * Enable/disable bus expander interrupts.
- *
- * @param[in] val Value to write
- * @param[in] mask Mask of bits to modify
- *
- * This function allows a caller to configure the bus expander.
- * interrupts.
- *
- * @return Returns the status (::SM_ERR_SUCCESS = success).
- */
-int32_t BRD_SM_BusExpMaskSet(uint8_t val, uint8_t mask);
-
-/*!
- * GPIO 1 interrupt 0 handler.
- */
-void GPIO1_0_IRQHandler(void);
-
/** @} */
#endif /* BRD_SM_HANDLERS_H */
diff --git a/configs/tdx-smarc-imx95.cfg b/configs/tdx-smarc-imx95.cfg
index b5e7875..12e3258 100755
--- a/configs/tdx-smarc-imx95.cfg
+++ b/configs/tdx-smarc-imx95.cfg
@@ -339,7 +339,6 @@ CHANNEL db=2, xport=smt, check=crc32, rpc=scmi, \
# API
-BRD_SM_CTRL_BUTTON NOTIFY
BRD_SM_CTRL_TEST ALL
BRD_SM_SENSOR_TEMP_PF09 SET
BRD_SM_SENSOR_TEMP_PF5301 SET
@@ -529,11 +528,6 @@ CHANNEL db=1, xport=smt, rpc=scmi, type=p2a_notify
AUDIO_PLL1 ALL
AUDIO_PLL2 ALL
-BRD_SM_CTRL_BT_WAKE NOTIFY
-BRD_SM_CTRL_BUTTON NOTIFY
-BRD_SM_CTRL_PCIE1_WAKE NOTIFY
-BRD_SM_CTRL_PCIE2_WAKE NOTIFY
-BRD_SM_CTRL_SD3_WAKE NOTIFY
BRD_SM_SENSOR_TEMP_PF09 ALL
BRD_SM_SENSOR_TEMP_PF5301 SET
BRD_SM_SENSOR_TEMP_PF5302 SET
diff --git a/configs/tdx-smarc-imx95/config_scmi.h b/configs/tdx-smarc-imx95/config_scmi.h
index 4c1d679..1cc8730 100755
--- a/configs/tdx-smarc-imx95/config_scmi.h
+++ b/configs/tdx-smarc-imx95/config_scmi.h
@@ -74,7 +74,6 @@
.clkPerms[DEV_SM_CLK_M7] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_TSTMR2] = SM_SCMI_PERM_ALL, \
.cpuPerms[DEV_SM_CPU_M7P] = SM_SCMI_PERM_ALL, \
- .ctrlPerms[BRD_SM_CTRL_BUTTON] = SM_SCMI_PERM_NOTIFY, \
.ctrlPerms[BRD_SM_CTRL_TEST] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_CAN1_RX] = SM_SCMI_PERM_ALL, \
.daisyPerms[DEV_SM_DAISY_LPTMR2_0] = SM_SCMI_PERM_ALL, \
@@ -323,11 +322,6 @@
.clkPerms[DEV_SM_CLK_VIDEOPLL1_VCO] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_VPUDSP] = SM_SCMI_PERM_ALL, \
.clkPerms[DEV_SM_CLK_XSPISLVROOT] = SM_SCMI_PERM_ALL, \
- .ctrlPerms[BRD_SM_CTRL_BT_WAKE] = SM_SCMI_PERM_NOTIFY, \
- .ctrlPerms[BRD_SM_CTRL_BUTTON] = SM_SCMI_PERM_NOTIFY, \
- .ctrlPerms[BRD_SM_CTRL_PCIE1_WAKE] = SM_SCMI_PERM_NOTIFY, \
- .ctrlPerms[BRD_SM_CTRL_PCIE2_WAKE] = SM_SCMI_PERM_NOTIFY, \
- .ctrlPerms[BRD_SM_CTRL_SD3_WAKE] = SM_SCMI_PERM_NOTIFY, \
.ctrlPerms[DEV_SM_CTRL_ADC_TEST] = SM_SCMI_PERM_ALL, \
.ctrlPerms[DEV_SM_CTRL_MQS1_SETTINGS] = SM_SCMI_PERM_ALL, \
.ctrlPerms[DEV_SM_CTRL_PDM_CLK_SEL] = SM_SCMI_PERM_ALL, \