linux-toradex.git, branch 3.0-vybrid-ts2.10 Linux kernel for Apalis and Colibri modules Fix typo in DSPI2 and DSPI3 base address 2013-11-21T20:55:52+00:00 Anthony Felice tony.felice@timesys.com 2013-11-21T20:53:46+00:00 211c76becc528becec01e1efb23db84b2ebdf5ea 






Add missing Global Timer source file.
2013-11-14T17:39:23+00:00

Anthony Felice
tony.felice@timesys.com

2013-11-14T17:39:23+00:00

8757261c46fe1109c0580ecfa70049b877acf733












Add defconfig for Vybrid Tower
2013-11-07T18:21:06+00:00

Anthony Felice
tony.felice@timesys.com

2013-11-07T18:21:06+00:00

e37c54a279afb6996af44fa05a228d2aa9356039

This is the same defconfig that Timesys Factory uses.





This is the same defconfig that Timesys Factory uses.







Fix FAST_READ for QSPI nor flash support.
2013-11-07T16:57:41+00:00

Anthony Felice
tony.felice@timesys.com

2013-11-07T16:57:41+00:00

bbe3c57f4489c859ccad49a82567aa44d4637087

This patch was submitted by Roshni Shah <roshni.shah@timesys.com>
for ticket #52067





This patch was submitted by Roshni Shah <roshni.shah@timesys.com>
for ticket #52067







Add Global Timer support to fix High Resolution Timer functionality.
2013-11-07T16:55:15+00:00

Anthony Felice
tony.felice@timesys.com

2013-11-07T16:55:15+00:00

8dbbf996897e1d5878f3f5fd5fff5adedb04f3b8

This patch was submitted by Yoshihisa Ozawa <ozawa@lineo.co.jp> in
ticket #52306.





This patch was submitted by Yoshihisa Ozawa <ozawa@lineo.co.jp> in
ticket #52306.







Fix typo in MVF_USBPHY1_BASE_ADDR that caused a segmentation fault
2013-10-04T21:00:01+00:00

Anthony Felice
tony.felice@timesys.com

2013-10-04T21:00:01+00:00

498b5774630e0c8ac7dadd72fce5ceb555f741b8

to occur when using USB1.





to occur when using USB1.







Add mvf_sema4.h to header install list and allow to be included
2013-10-04T20:58:49+00:00

Anthony Felice
tony.felice@timesys.com

2013-10-04T20:58:49+00:00

20d898ca48df4b87609c3903fb37505f0bb54537

outside of the kernel.





outside of the kernel.







Prevent L2 cache initialisation if CONFIG_CACHE_L2X0 is enabled and
2013-10-04T20:55:24+00:00

Anthony Felice
tony.felice@timesys.com

2013-09-23T14:50:45+00:00

57a25827428efb7e8cc2eb6e59c529b5093a98e5

L2 cache is not present.

Author: Roshni Shah <roshni.shah@timesys.com>





L2 cache is not present.

Author: Roshni Shah <roshni.shah@timesys.com>







add a test call to determine state of
2013-07-31T16:11:03+00:00

Ed Nash
enash54@gmail.com

2013-07-31T16:11:03+00:00

ae3bc0f60b587eb3a5b26d67165c7d923bb23776

semaphore without requesting it





semaphore without requesting it







add support for spin locks
2013-07-30T01:01:35+00:00

Ed Nash
enash54@gmail.com

2013-07-30T01:01:35+00:00

614660a165ac827ea272c6fa0c59986881309f90