linux-toradex.git, branch tegra-10.11.14 Linux kernel for Apalis and Colibri modules video: tegra: nvmap: fix GART pin lockups 2011-08-19T23:43:42+00:00 Kirill Artamonov kartamonov@nvidia.com 2011-06-26T18:37:18+00:00 48d10f659a21fd6d0dff5e073663f9689b549db4 Fix GART lockups caused by fragmentation by evicting mapped areas from iovm space after unsuccessful array pinning attempt. Fix double unpin error happening during interrupted submit. Fix possible sleep in atomic context in iovmm code (semaphore inside spinlock) by replacing spinlock with mutex. Fix race between handle_unpin and pin_handle. bug 838579 bug 838073 bug 818058 bug 844307 Conflicts: drivers/video/tegra/nvmap/nvmap_mru.c Reviewed-on: http://git-master/r/38430 (cherry picked from commit 4a4cae3323d3287e77fdc504e38656974ef24848) Change-Id: I385913569ef455a1ceb5083829959de24f5309a7 Reviewed-on: http://git-master/r/47832 Reviewed-by: Andre Sihera <asihera@nvidia.com> Tested-by: Andre Sihera <asihera@nvidia.com> Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
Fix GART lockups caused by fragmentation by evicting
mapped areas from iovm space after unsuccessful array
pinning attempt.

Fix double unpin error happening during interrupted
submit.

Fix possible sleep in atomic context in iovmm code
(semaphore inside spinlock) by replacing spinlock
with mutex.

Fix race between handle_unpin and pin_handle.

bug 838579
bug 838073
bug 818058
bug 844307

Conflicts:
	drivers/video/tegra/nvmap/nvmap_mru.c

Reviewed-on: http://git-master/r/38430
(cherry picked from commit 4a4cae3323d3287e77fdc504e38656974ef24848)

Change-Id: I385913569ef455a1ceb5083829959de24f5309a7
Reviewed-on: http://git-master/r/47832
Reviewed-by: Andre Sihera <asihera@nvidia.com>
Tested-by: Andre Sihera <asihera@nvidia.com>
Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
video: tegra: nvmap: single page allocation policy corrected 2011-08-19T23:42:47+00:00 Kirill Artamonov kartamonov@nvidia.com 2011-06-26T18:22:37+00:00 9d650429b634914e0705c37d84a9cfa44375391a When user doesn't use default heap policy and selects GART or carveout allocation, automatic single-page-to-sysmem rule doesn't work. Because of broken rule many single page allocations take extra space in carveout and create unnecessary page mappings in GART and SMMU. The fix adds sysmem bit to heap mask when allocation is single page and GART or carveout is present in heap mask. bug 730124 bug 731923 The change also does sanity check of available system memory before adding sysmem bit for carveout allocations. bug 777839 Reviewed-on: http://git-master/r/31383 (cherry picked from commit 502c2becc54b49d26371f9b167f0c6f82a1bc37f) Bug 844307 Conflicts: drivers/video/tegra/nvmap/nvmap_handle.c Reviewed-on: http://git-master/r/38429 (cherry picked from commit ddfc93d27830a28a1c9786fd5bce6dc35727e9ff) Change-Id: I9b8f84a5a7daf192d1d412926f91e5de71938818 Reviewed-on: http://git-master/r/47829 Reviewed-by: Andre Sihera <asihera@nvidia.com> Tested-by: Andre Sihera <asihera@nvidia.com> Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
When user doesn't use default heap policy and selects
GART or carveout allocation, automatic single-page-to-sysmem
rule doesn't work. Because of broken rule many single page
allocations take extra space in carveout and create
unnecessary page mappings in GART and SMMU.

The fix adds sysmem bit to heap mask when allocation is
single page and GART or carveout is present in heap mask.

bug 730124
bug 731923

The change also does sanity check of available system memory
before adding sysmem bit for carveout allocations.

bug 777839

Reviewed-on: http://git-master/r/31383
(cherry picked from commit 502c2becc54b49d26371f9b167f0c6f82a1bc37f)

Bug 844307

Conflicts:
	drivers/video/tegra/nvmap/nvmap_handle.c

Reviewed-on: http://git-master/r/38429
(cherry picked from commit ddfc93d27830a28a1c9786fd5bce6dc35727e9ff)

Change-Id: I9b8f84a5a7daf192d1d412926f91e5de71938818
Reviewed-on: http://git-master/r/47829
Reviewed-by: Andre Sihera <asihera@nvidia.com>
Tested-by: Andre Sihera <asihera@nvidia.com>
Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
tegra: power: restore cpufreq governor target 2011-08-19T00:52:47+00:00 Alexandre Courbot acourbot@nvidia.com 2011-07-19T07:50:27+00:00 a4be690ae1ef80d7084d263a63efe8c1654e0971 Restore the target cpu frequency on exit from suspend. Also save target frequency if set when the device is suspended. Bug 841559 Change-Id: I98f394ef0292147c61898b5e216d859e3a26a0b5 Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-on: http://git-master/r/47772 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> 
Restore the target cpu frequency on exit from suspend. Also save target
frequency if set when the device is suspended.

Bug 841559

Change-Id: I98f394ef0292147c61898b5e216d859e3a26a0b5
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-on: http://git-master/r/47772
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
i2c: tegra: Remove warnings 2011-08-18T20:33:59+00:00 Alok Chauhan alokc@nvidia.com 2011-08-18T06:01:03+00:00 f01d95e909020cd09bc5f5c4d07065dca5d7454b Updated the tegra_i2c_platform_data to remove warnings. bug 854305 Change-Id: Ie8e5b1737826cd877352d911ff5b87233fcff0dc Reviewed-on: http://git-master/r/47733 Reviewed-by: Alok Chauhan <alokc@nvidia.com> Tested-by: Alok Chauhan <alokc@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
Updated the tegra_i2c_platform_data to remove warnings.

bug 854305

Change-Id: Ie8e5b1737826cd877352d911ff5b87233fcff0dc
Reviewed-on: http://git-master/r/47733
Reviewed-by: Alok Chauhan <alokc@nvidia.com>
Tested-by: Alok Chauhan <alokc@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
ARM: tegra: clock: tegra2_pll_clk_set_rate() process p field is greater then 2. 2011-08-17T22:58:13+00:00 Bo Kim bok@nvidia.com 2011-08-17T06:52:12+00:00 e1fefd8a7fb9751ddfad95e469666f3c876123a8 This change makes tegra2_pll_clk_set_rate() will process for p field is greater then 2. It helps to increase VCO. Bug 852217 Bug 842032 Change-Id: I9ad1483521126a52318bd5b641cfe34e0b66ebff Reviewed-on: http://git-master/r/47492 Reviewed-by: Bo Kim <bok@nvidia.com> Tested-by: Bo Kim <bok@nvidia.com> Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-by: Gabby Lee <galee@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
This change makes tegra2_pll_clk_set_rate() will process for p field is greater
then 2. It helps to increase VCO.

Bug 852217
Bug 842032

Change-Id: I9ad1483521126a52318bd5b641cfe34e0b66ebff
Reviewed-on: http://git-master/r/47492
Reviewed-by: Bo Kim <bok@nvidia.com>
Tested-by: Bo Kim <bok@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Gabby Lee <galee@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
ARM: Tegra: removed '\n' before counting fuse len 2011-08-17T22:57:43+00:00 Chao Jiang chaoj@nvidia.com 2011-08-04T02:31:18+00:00 f537c37a7daa92e2a6da13e82513f114b0e9a2f7 Removed '\n' character in the input buffer to get a correct length of data. fixed Bug856327 Change-Id: I1a15eafa8ba3e0cc1da7872c41abc5963685cdb1 Reviewed-on: http://git-master/r/46595 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Chao Jiang <chaoj@nvidia.com> 
Removed '\n' character in the input buffer to get a correct length of
data.

fixed Bug856327

Change-Id: I1a15eafa8ba3e0cc1da7872c41abc5963685cdb1
Reviewed-on: http://git-master/r/46595
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Chao Jiang <chaoj@nvidia.com>
spi: tegra: Spi controller configured during device setup 2011-08-16T23:25:14+00:00 Laxman Dewangan ldewangan@nvidia.com 2011-04-13T08:34:12+00:00 9b66ffc8ab01b56753dac6c978c89ba2dbb8e09e When spi device calls the setup, the interface to that device should be configured immediately. For this, it is required to configure controller in setup call. Reviewed-on: http://git-master/r/27607 (cherry picked from commit b4b9ec736286c23b699f94eac52094bb1b92774c) Change-Id: I7d71eb211429a2cf989b30a42e86464d17856df3 Reviewed-on: http://git-master/r/47151 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com> 
When spi device calls the setup, the interface to that device
should be configured immediately. For this, it is required
to configure controller in setup call.

Reviewed-on: http://git-master/r/27607
(cherry picked from commit b4b9ec736286c23b699f94eac52094bb1b92774c)

Change-Id: I7d71eb211429a2cf989b30a42e86464d17856df3
Reviewed-on: http://git-master/r/47151
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
spi: tegra: Supporting HW based CS control 2011-08-16T23:21:20+00:00 Laxman Dewangan ldewangan@nvidia.com 2011-03-23T11:18:09+00:00 9f4a4ab7234dcf130d897faa12e9d965edaa3c50 Supporting the hw based CS to communicate to spi device. This provides the constraints in hold and setup time of CS before clock start and clock ends. The hw based CS can be selected if spi client provide the option through the device controler data and only one transfer per message is requested. Reviewed-on: http://git-master/r/23988 Change-Id: Iba6d1efd8c5406f1b44ddd44b6f739ac529a94df Reviewed-on: http://git-master/r/47150 Tested-by: Cho-Che Cheng <jacheng@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
Supporting the hw based CS to communicate to spi device. This
provides the constraints in hold and setup time of CS before
clock start and clock ends.

The hw based CS can be selected if spi client provide the option
through the device controler data and only one transfer per
message is requested.

Reviewed-on: http://git-master/r/23988

Change-Id: Iba6d1efd8c5406f1b44ddd44b6f739ac529a94df
Reviewed-on: http://git-master/r/47150
Tested-by: Cho-Che Cheng <jacheng@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
arm: tegra: Added I2C arbitration lost recovery mechanism 2011-08-16T23:21:17+00:00 Alok Chauhan alokc@nvidia.com 2011-08-16T09:05:42+00:00 b942099aeca50f883472926dd01f9f8d486c5149 Added the code for arbitration lost recovery mechanism for i2c driver and Initialize gpio number for i2c clock and data as part of platform data. bug 854305 This is cherry pick of change http://git-master/r/#change,43200 in main but hand-merged. Change-Id: I2bf46cf54c04b94174435f3fb9c965b74156dd02 Reviewed-on: http://git-master/r/46288 Reviewed-by: Alok Chauhan <alokc@nvidia.com> Tested-by: Alok Chauhan <alokc@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
Added the code for arbitration lost recovery mechanism for i2c
driver and Initialize gpio number for i2c clock and data as
part of platform data.

bug 854305

This is cherry pick of change http://git-master/r/#change,43200
in main but hand-merged.

Change-Id: I2bf46cf54c04b94174435f3fb9c965b74156dd02
Reviewed-on: http://git-master/r/46288
Reviewed-by: Alok Chauhan <alokc@nvidia.com>
Tested-by: Alok Chauhan <alokc@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
arm: tegra: Updated i2c platform data 2011-08-16T23:21:15+00:00 Alok Chauhan alokc@nvidia.com 2011-08-16T09:09:42+00:00 58ee0aef0b9abb136c13ecb38fd82d3d49e55ff9 Updated i2c platform data to add i2c arb lost recovery funtion and corresponding gpio numbers to i2c pins bug 854305 This is cherry pick of change http://git-master/r/#change,43200 in main but hand-merged. Change-Id: I4098a512625c16598b8596d0e46d285ca9b92d2b Reviewed-on: http://git-master/r/47290 Reviewed-by: Alok Chauhan <alokc@nvidia.com> Tested-by: Alok Chauhan <alokc@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
Updated i2c platform data to add i2c arb lost recovery funtion
and corresponding gpio numbers to i2c pins

bug 854305

This is cherry pick of change http://git-master/r/#change,43200
in main but hand-merged.

Change-Id: I4098a512625c16598b8596d0e46d285ca9b92d2b
Reviewed-on: http://git-master/r/47290
Reviewed-by: Alok Chauhan <alokc@nvidia.com>
Tested-by: Alok Chauhan <alokc@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>