linux-toradex.git, branch tegra-10.9.1 Linux kernel for Apalis and Colibri modules tegra-whistler-accelerometer: reverse x direction 2010-09-20T05:18:42+00:00 Bharat Nihalani bnihalani@nvidia.com 2010-09-17T07:54:41+00:00 6d57f00bb8276e0392dfa199017fc70fcea7d60b X direction needs to be reversed to correct orientation in portrait mode for Whistler. Bug 678250 Reviewed-on: http://git-master/r/6661 Tested-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> (cherry picked from commit 2406bc176b9bb86bd7b6c9e707c4e44b97d997d6) Change-Id: I35eff83ba9cb39d49062f2fb9e01d968543b7bde Reviewed-on: http://git-master/r/6767 
X direction needs to be reversed to correct orientation in portrait
mode for Whistler.

Bug 678250

Reviewed-on: http://git-master/r/6661
Tested-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
(cherry picked from commit 2406bc176b9bb86bd7b6c9e707c4e44b97d997d6)
Change-Id: I35eff83ba9cb39d49062f2fb9e01d968543b7bde
Reviewed-on: http://git-master/r/6767
nvrm: single pages allocation policy corrected 2010-09-20T04:51:01+00:00 Kirill Artamonov kartamonov@nvidia.com 2010-09-10T05:17:25+00:00 49513423ede836d93628a11a85b7d78dd1b827eb When user doesn't use default heap policy and selects GART or carveout allocation, automatic single-page-to-sysmem rule doesn't work. Because of broken rule many single page allocations go to GART and carveout. The fix adds sysmem bit to heap mask when allocation is single page and GART or carveout is present in heap mask. bug 730124 bug 731923 (cherry picked from commit 3ca9989c922420a57215d297189738a0464c4073) Change-Id: I2ea8018ae5ed9d31e90659479d0e44052ebf9431 Reviewed-on: http://git-master/r/6701 Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com> Tested-by: Kirill Artamonov <kartamonov@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
When user doesn't use default heap policy and selects
GART or carveout allocation, automatic single-page-to-sysmem
rule doesn't work. Because of broken rule many single page
allocations go to GART and carveout.

The fix adds sysmem bit to heap mask when allocation is
single page and GART or carveout is present in heap mask.

bug 730124
bug 731923

(cherry picked from commit 3ca9989c922420a57215d297189738a0464c4073)

Change-Id: I2ea8018ae5ed9d31e90659479d0e44052ebf9431
Reviewed-on: http://git-master/r/6701
Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com>
Tested-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
[ARM/tegra] RM: Clean-up SPI hints/APB low corner. 2010-09-18T03:33:18+00:00 Alex Frid afrid@nvidia.com 2010-08-24T20:36:07+00:00 98242b67666a43a1e42a634def39545bec6406ed - Completely removed busy hints for the SPI channel connected to PMU (busy hints were allowed for for CS, other than PMU, which may create dead-lock if channel access is serialized). - Increased APB low corner to 36MHz for reliable SPI communications at default low frequencies. Bug 721076 (cherry picked from commit 50ccc3cb8f0956370f1841e83133f47c88615889) Change-Id: I0a119610608bc5db4d7daea68bd9d4285d3715e8 Reviewed-on: http://git-master.nvidia.com/r/6744 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> 
- Completely removed busy hints for the SPI channel connected to PMU
(busy hints were allowed for for CS, other than PMU, which may create
dead-lock if channel access is serialized).
- Increased APB low corner to 36MHz for reliable SPI communications
at default low frequencies.

Bug 721076

(cherry picked from commit 50ccc3cb8f0956370f1841e83133f47c88615889)

Change-Id: I0a119610608bc5db4d7daea68bd9d4285d3715e8
Reviewed-on: http://git-master.nvidia.com/r/6744
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
watchdog: add tegra_wdt driver 2010-09-17T20:24:00+00:00 Gary King gking@nvidia.com 2010-08-26T17:59:50+00:00 7d29357618335175528c5907cdb86f8577a2c49d add a driver for the hardware watchdog timer embedded in NVIDIA Tegra SoCs Change-Id: I40730213119b4f325e3de008a5efb28f5d578b1c Signed-off-by: Gary King <gking@nvidia.com> Reviewed-on: http://git-master/r/6305 Reviewed-on: http://git-master/r/6705 
add a driver for the hardware watchdog timer embedded in NVIDIA
Tegra SoCs

Change-Id: I40730213119b4f325e3de008a5efb28f5d578b1c
Signed-off-by: Gary King <gking@nvidia.com>
Reviewed-on: http://git-master/r/6305
Reviewed-on: http://git-master/r/6705
video: tegra: nvmap: perform cache maintenance for rw_handle 2010-09-17T10:39:43+00:00 Markus Holtmanns mholtmanns@nvidia.com 2010-09-14T15:40:24+00:00 6072f3949495b88a17e6a73c5bbc06013b6ace4d bug 715382 Integrate from tegra-2010-07 Change-Id: I790bd0e6ff5ddd9513ae7a5ddfce491dcd1e32b3 Reviewed-on: http://git-master/r/6673 Reviewed-by: Markus Holtmanns <mholtmanns@nvidia.com> Reviewed-by: Antti Hatala <ahatala@nvidia.com> Tested-by: Antti Hatala <ahatala@nvidia.com> 
bug 715382

Integrate from tegra-2010-07

Change-Id: I790bd0e6ff5ddd9513ae7a5ddfce491dcd1e32b3
Reviewed-on: http://git-master/r/6673
Reviewed-by: Markus Holtmanns <mholtmanns@nvidia.com>
Reviewed-by: Antti Hatala <ahatala@nvidia.com>
Tested-by: Antti Hatala <ahatala@nvidia.com>
[arm/tegra] serial: Fixing Tx to work in case of out of dma. 2010-09-17T06:21:17+00:00 Laxman Dewangan ldewangan@nvidia.com 2010-09-06T17:49:10+00:00 22e87c5d5a1a35f1afb5a3a68f537f46716afacf When system runs out of dma and uart driver tries to allocate dma, the dma allocation fails. In such case, the uart communication should work with interrupt based -non dma mode. bug 730003 (cherry picked from commit 4a9d5633474c806799ccc6d167f3d624c92d560c) (cherry picked from commit 2000a076103c559446d11ad49debc4e0f2952e8a) Change-Id: I96c2a3f79fd9044e3b54771b60cad7dcb12f517b Reviewed-on: http://git-master/r/6599 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Harry Hong <hhong@nvidia.com> Tested-by: Harry Hong <hhong@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
When system runs out of dma and uart driver tries to allocate
dma, the dma allocation fails. In such case, the uart
communication should work with interrupt based -non dma mode.

bug 730003

(cherry picked from commit 4a9d5633474c806799ccc6d167f3d624c92d560c)
(cherry picked from commit 2000a076103c559446d11ad49debc4e0f2952e8a)

Change-Id: I96c2a3f79fd9044e3b54771b60cad7dcb12f517b
Reviewed-on: http://git-master/r/6599
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Harry Hong <hhong@nvidia.com>
Tested-by: Harry Hong <hhong@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
[ARM/tegra] RM: Wake Source Information 2010-09-17T03:52:50+00:00 Victor(Weiguo) Pan wpan@nvidia.com 2010-08-25T18:24:33+00:00 42775c2b0e8d044aa63114b9a253c6619a958f0a Print out wake status when resuming back from LP0. Bug 725727 Change-Id: Iede6aa7314e4912ff7ccadccbab90f097deab893 Reviewed-on: http://git-master.nvidia.com/r/6549 Tested-by: Victor (Weiguo) Pan <wpan@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> 
Print out wake status when resuming back from LP0.

Bug 725727

Change-Id: Iede6aa7314e4912ff7ccadccbab90f097deab893
Reviewed-on: http://git-master.nvidia.com/r/6549
Tested-by: Victor (Weiguo) Pan <wpan@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
[ARM/tegra] validate return code from sem_handle_insert calls 2010-09-17T03:52:00+00:00 Andy Carman acarman@nvidia.com 2010-09-01T00:19:35+00:00 c5d641416b8fd392e10750433b01c7e44966ca02 Bug 720137 (cherry picked from commit 3a86bacc8a8cf8c593028a7594867df00a45a189) Change-Id: I9a35a9a41c2d27e36ff651650633cf6c59cc2e57 Reviewed-on: http://git-master.nvidia.com/r/6456 Reviewed-by: Andy Carman <acarman@nvidia.com> Tested-by: Andy Carman <acarman@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> 
             Bug 720137

 (cherry picked from commit 3a86bacc8a8cf8c593028a7594867df00a45a189)

Change-Id: I9a35a9a41c2d27e36ff651650633cf6c59cc2e57
Reviewed-on: http://git-master.nvidia.com/r/6456
Reviewed-by: Andy Carman <acarman@nvidia.com>
Tested-by: Andy Carman <acarman@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
tegra video: remove cancelled actions from the list at power down 2010-09-16T22:19:25+00:00 Andy Carman acarman@nvidia.com 2010-09-08T05:17:01+00:00 49ea5f107b36abc24cf3859c34b2cf48899ac1b6 [bug] 729378 Change-Id: I34d276d2552491c933983309df0fe31f7bf3ba7e Reviewed-on: http://git-master/r/6443 Reviewed-by: Andy Carman <acarman@nvidia.com> Tested-by: Andy Carman <acarman@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> 
             [bug] 729378

Change-Id: I34d276d2552491c933983309df0fe31f7bf3ba7e
Reviewed-on: http://git-master/r/6443
Reviewed-by: Andy Carman <acarman@nvidia.com>
Tested-by: Andy Carman <acarman@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
[arm/tegra] IPv6, UID_STAT configs support 2010-09-16T12:54:58+00:00 Rahul Bansal rbansal@nvidia.com 2010-09-16T11:26:55+00:00 d8e710f691dc0986e385b2cf6d8110f2f0766569 To support IPv6 and Network Traffic Stats related CTS tests. Bug: 690020, 690023, 687255 Change-Id: I5b14c908ba544196da6000d598a11fd1b33780ef Reviewed-on: http://git-master/r/6597 Reviewed-by: Rahul Bansal <rbansal@nvidia.com> Tested-by: Rahul Bansal <rbansal@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
To support IPv6 and Network Traffic Stats
related CTS tests.

Bug: 690020, 690023, 687255
Change-Id: I5b14c908ba544196da6000d598a11fd1b33780ef
Reviewed-on: http://git-master/r/6597
Reviewed-by: Rahul Bansal <rbansal@nvidia.com>
Tested-by: Rahul Bansal <rbansal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>