linux-toradex.git, branch tegra-12r4 Linux kernel for Apalis and Colibri modules misc: nct1008: extended mode first reading fix 2011-07-19T22:18:57+00:00 Bitan Biswas bbiswas@nvidia.com 2011-07-18T06:12:59+00:00 7a78dfcc641a20be6629a7b9bbcd559957cab68a nct1008 first temperature reading in extended mode is incorrect. A valid temperature is available in next measurement cycle after changing temperature range. - using table with delay expected for supported conversion rate of nct1008. bug 852754 Change-Id: I1e2911e283aba27a8d807b6346948202061b73f0 Reviewed-on: http://git-master/r/41938 Reviewed-by: Karan Jhavar <kjhavar@nvidia.com> Tested-by: Karan Jhavar <kjhavar@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> 
nct1008 first temperature reading in extended mode is incorrect.
A valid temperature is available in next measurement cycle after
changing temperature range.
- using table with delay expected for supported conversion
  rate of nct1008.

bug 852754

Change-Id: I1e2911e283aba27a8d807b6346948202061b73f0
Reviewed-on: http://git-master/r/41938
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Tested-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
arm: tegra: cardhu: Set AVDD_PLL and AVDD_PLL_SATA to proper voltage 2011-07-19T00:42:44+00:00 Laxman Dewangan ldewangan@nvidia.com 2011-07-15T09:06:16+00:00 bbbb88d21d166eeb4de4d83af073f08bdcbe1257 Setting the rail voltage of the AVDD_PLLs to 1.2V and rail voltage of PLL_SATA to 1.05V. Change-Id: Ibf5bb1d11b7b15cabb68f90da7e24dd999915c55 Reviewed-on: http://git-master/r/41179 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> 
Setting the rail voltage of the AVDD_PLLs to 1.2V and rail voltage
of PLL_SATA to 1.05V.

Change-Id: Ibf5bb1d11b7b15cabb68f90da7e24dd999915c55
Reviewed-on: http://git-master/r/41179
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
arm: tegra: Remove redundant spi slave driver 2011-07-19T00:42:35+00:00 Laxman Dewangan ldewangan@nvidia.com 2011-07-15T06:44:05+00:00 3f524b73df7fe3860ae532692b55e40274ddc043 Removing the old/redundant spi slave driver as the new driver is already available at driver/spi. The new driver have proper synchronization between dma and interrupt handling for checking the spi transfer status. Change-Id: I570b6286754dd8384f81dba14b91bb573bba53dc Reviewed-on: http://git-master/r/41160 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> 
Removing the old/redundant spi slave driver as the new driver is
already available at driver/spi.
The new driver have proper synchronization between dma and
interrupt handling for checking the spi transfer status.

Change-Id: I570b6286754dd8384f81dba14b91bb573bba53dc
Reviewed-on: http://git-master/r/41160
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
tegra: video: dc: prevent division by zero 2011-07-19T00:42:26+00:00 Jon Mayo jmayo@nvidia.com 2011-07-15T00:33:02+00:00 71de3279bd16b9fd0dea219be6135ad6d360afc4 Do not pass 0 to PICOS2KHZ() macro, as it causes Division by zero in kernel. Bug 850852 Change-Id: Ice913aaf756719aaf49bf6fab54b5f1618fb07d5 Reviewed-on: http://git-master/r/41116 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> 
Do not pass 0 to PICOS2KHZ() macro, as it causes Division by zero in kernel.

Bug 850852

Change-Id: Ice913aaf756719aaf49bf6fab54b5f1618fb07d5
Reviewed-on: http://git-master/r/41116
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
ARM: defconfig: enable USB_NET_AX8817X by default 2011-07-19T00:42:17+00:00 Vandana Salve vsalve@nvidia.com 2011-06-08T12:33:03+00:00 57e8c3d1e56e833c915021aa03c6494d4e3ed90d This option adds support for ASIX AX88xxx Based USB 2.0 Ethernet Adapters and it works with TrendNet TU2-ET100 devices. Bug 834417 Reviewed-on: http://git-master/r/35699 (cherry picked from commit b3d39ffd9548143a08d0ada8aa0725631bcb1da1) Change-Id: Id932009eaf4cb465c58c8125d71ca3d736b2f017 Reviewed-on: http://git-master/r/40964 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> 
This option adds support for ASIX AX88xxx Based USB 2.0
Ethernet Adapters and it works with TrendNet TU2-ET100 devices.

Bug 834417

Reviewed-on: http://git-master/r/35699
(cherry picked from commit b3d39ffd9548143a08d0ada8aa0725631bcb1da1)

Change-Id: Id932009eaf4cb465c58c8125d71ca3d736b2f017
Reviewed-on: http://git-master/r/40964
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
arm: tegra: PM269: GMI_CS2 to input for low power on VDDIO_GMI 2011-07-19T00:31:55+00:00 Laxman Dewangan ldewangan@nvidia.com 2011-07-18T10:24:11+00:00 8003bc4bcdb20726af2b61dc28d4df0043bd419d Making GMI_CS2 to gpio input to have low power in rail VDDIO_GMI. bug 833087 Change-Id: I9eb9728d945dc29285cbd459e08dcf94f2f43f68 Reviewed-on: http://git-master/r/41535 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com> Tested-by: Raymond Poudrier <rapoudrier@nvidia.com> 
Making GMI_CS2 to gpio input to have low power in rail VDDIO_GMI.

bug 833087

Change-Id: I9eb9728d945dc29285cbd459e08dcf94f2f43f68
Reviewed-on: http://git-master/r/41535
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
arm: tegra: Console suspend for all boards 2011-07-19T00:31:47+00:00 Laxman Dewangan ldewangan@nvidia.com 2011-07-18T06:17:13+00:00 0eb9b4c59731b915b2be6c83e67ddeea54e3c8b4 Added the board level suspend/resume and call the console suspend from board level suspend/resume. bug 820536 Change-Id: I246265241246dc0682870571c927bd23023e5aca Reviewed-on: http://git-master/r/41448 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> 
Added the board level suspend/resume and call the console
suspend from board level suspend/resume.

bug 820536

Change-Id: I246265241246dc0682870571c927bd23023e5aca
Reviewed-on: http://git-master/r/41448
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
video: tegra: dsi: Power optimization for dc one-shot mode 2011-07-19T00:30:38+00:00 Animesh Kishore ankishore@nvidia.com 2011-07-14T11:44:18+00:00 636520e513cc2a48df9c6c8f1233c43e955080a1 Disable TE signal from panel when display off for power saving. Bug 851754 Change-Id: If00f9bde9c358c7b49050a32f68d04881e6641da Reviewed-on: http://git-master/r/41031 Reviewed-by: Animesh Kishore <ankishore@nvidia.com> Tested-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> 
Disable TE signal from panel when display off for power saving.

Bug 851754

Change-Id: If00f9bde9c358c7b49050a32f68d04881e6641da
Reviewed-on: http://git-master/r/41031
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Tested-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
arm: tegra: cardhu: Add board level suspend/resume 2011-07-15T23:50:44+00:00 Laxman Dewangan ldewangan@nvidia.com 2011-07-15T05:40:57+00:00 0285ea73b85f3f1f662c307c13f208c5eab64178 Adding board level suspend/resume for cardhu. Disabling the clock for console uart port if console_suspend is enabled. bug 820536 Change-Id: Iecb78708ff7784dd131ffa83692b2419dba44e88 Reviewed-on: http://git-master/r/41147 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> 
Adding board level suspend/resume for cardhu.
Disabling the clock for console uart port if console_suspend
is enabled.

bug 820536

Change-Id: Iecb78708ff7784dd131ffa83692b2419dba44e88
Reviewed-on: http://git-master/r/41147
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
video: tegra: dc: Fix wrong handling of dc enable. 2011-07-15T23:50:34+00:00 Gaurav Sarode gsarode@nvidia.com 2011-07-15T10:21:57+00:00 cddc2f824cbce533c1d8229e1cc29a212370f2cc DC reset disables dc for sometime. If IOCTL_FLIP occurs during that time then wrong status will be reported. Add dc mutex around dc->enable to prevent wrong value read. Fix bug 852345 Change-Id: I27674abc45fca6bed061f7d34e1454235458fc1c Reviewed-on: http://git-master/r/41201 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> 
DC reset disables dc for sometime. If IOCTL_FLIP
occurs during that time then wrong status will be reported.

Add dc mutex around dc->enable to prevent wrong value read.

Fix bug 852345

Change-Id: I27674abc45fca6bed061f7d34e1454235458fc1c
Reviewed-on: http://git-master/r/41201
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>