linux-toradex.git, branch tegra-12r8-early Linux kernel for Apalis and Colibri modules video: tegra: Phase in DIDIM 2011-09-07T18:24:11+00:00 Matt Wagner mwagner@nvidia.com 2011-09-01T22:09:40+00:00 e66968c944f2b99eba5a8ea40306c81bc148923e Settings in DIDIM driver are now phased in over a defined number of steps in order to minimize the perception of changes to the settings during runtime Bug 840155 Change-Id: Id1a354dc153a432cdd08d54f197adb6b37d2fdb0 Reviewed-on: http://git-master/r/50926 Tested-by: Matt Wagner <mwagner@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com> 
Settings in DIDIM driver are now phased in over a defined
number of steps in order to minimize the perception of changes
to the settings during runtime

Bug 840155

Change-Id: Id1a354dc153a432cdd08d54f197adb6b37d2fdb0
Reviewed-on: http://git-master/r/50926
Tested-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
Tested-by: Ryan Wong <ryanw@nvidia.com>
arm: tegra: cardhu: Update Elpida EMC DFS table 2011-09-07T18:05:05+00:00 Ray Poudrier rapoudrier@nvidia.com 2011-09-06T22:06:31+00:00 e1fa6f8826cdd1674745b54dcad8042f5d5acce5 Bug 871431 (cherry picked from commit dc15be635bfc69d60d1ffc324acc487245d5d7bb) Change-Id: Ifee293da8de4f2f814b862d99cde0e604d1b6690 Reviewed-on: http://git-master/r/50972 Reviewed-by: Thomas Cherry <tcherry@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com> 
Bug 871431

(cherry picked from commit dc15be635bfc69d60d1ffc324acc487245d5d7bb)

Change-Id: Ifee293da8de4f2f814b862d99cde0e604d1b6690
Reviewed-on: http://git-master/r/50972
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
Tested-by: Ryan Wong <ryanw@nvidia.com>
arm: tegra: cardhu: update EMC DFS tables 2011-09-07T17:14:29+00:00 Ray Poudrier rapoudrier@nvidia.com 2011-09-03T00:53:47+00:00 5456ce495081c7f1b5328a7b379cd3655daa493b For Samsung EB memory Bug 871975 (cherry picked from commit d948bb75228b99e9577e1265d9b1c78a12f4958b) Change-Id: I3b477126a4157ffa4f3be02326270c14d4b32531 Reviewed-on: http://git-master/r/50970 Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com> Tested-by: Raymond Poudrier <rapoudrier@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com> 
For Samsung EB memory

Bug 871975

(cherry picked from commit d948bb75228b99e9577e1265d9b1c78a12f4958b)

Change-Id: I3b477126a4157ffa4f3be02326270c14d4b32531
Reviewed-on: http://git-master/r/50970
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
Tested-by: Ryan Wong <ryanw@nvidia.com>
arm: tegra: cardhu: secureos LP2 suspend mode 2011-09-07T17:11:40+00:00 J. Aaron Gamble jgamble@nvidia.com 2011-08-17T15:38:35+00:00 db4e77f09608b8224c578d4341673c88123ee6ed Temporary change from LP0 to LP2 for secureos customers Bug 857303 Change-Id: If106ee433bcda0bcaffcab70f6e083e17c15f07e Reviewed-on: http://git-master/r/50999 Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com> 
Temporary change from LP0 to LP2 for secureos customers

Bug 857303

Change-Id: If106ee433bcda0bcaffcab70f6e083e17c15f07e
Reviewed-on: http://git-master/r/50999
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
Tested-by: Ryan Wong <ryanw@nvidia.com>
input: tegra-kbc: add is_open, don't suspend if no clock 2011-09-07T17:08:18+00:00 Ray Poudrier rapoudrier@nvidia.com 2011-09-01T02:03:10+00:00 22763947a76eac49d71097c87e933e0383246bb7 Added is_open to know whether the clock has been disabled. Occasionally _close is called before _suspend during LP0 cycles resulting in a hang as the clock is disabled. Bug 855753 (cherry picked from commit 7a266230ecfaf48676554257e259e31637aa25ba) Change-Id: Ib6f2aa734ce259dc79baf402fe4e1e4dd22a5b92 Reviewed-on: http://git-master/r/50965 Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com> Tested-by: Raymond Poudrier <rapoudrier@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com> 
Added is_open to know whether the clock has been disabled.
Occasionally _close is called before _suspend during LP0 cycles
resulting in a hang as the clock is disabled.

Bug 855753

(cherry picked from commit 7a266230ecfaf48676554257e259e31637aa25ba)

Change-Id: Ib6f2aa734ce259dc79baf402fe4e1e4dd22a5b92
Reviewed-on: http://git-master/r/50965
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
Tested-by: Ryan Wong <ryanw@nvidia.com>
arm: tegra: Add handle for kernel option power_supply 2011-09-06T23:50:50+00:00 Laxman Dewangan ldewangan@nvidia.com 2011-09-04T11:40:13+00:00 8d9e6bbe59ab68f44a4713f5d1bcc7877baf8180 Adding the handler function for the kernel command line option "power_supply". Change-Id: I6289936a0f31404812b63f170d4fd9907609c855 Reviewed-on: http://git-master/r/50674 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> 
Adding the handler function for the kernel command line
option "power_supply".

Change-Id: I6289936a0f31404812b63f170d4fd9907609c855
Reviewed-on: http://git-master/r/50674
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
arm: tegra: enterprise: Enable battery charging based on kernel option 2011-09-06T23:47:35+00:00 Laxman Dewangan ldewangan@nvidia.com 2011-09-04T11:42:53+00:00 4f36edabc585f3fea28e2f959558ac7e07dd2b5e If kernel command line option have the power_supply as battery then enable the battery charging functionality. Change-Id: I0f7c5e03b0505fbd4161434f09d0084d33e3397f Reviewed-on: http://git-master/r/50673 Reviewed-by: Thomas Cherry <tcherry@nvidia.com> Tested-by: Thomas Cherry <tcherry@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com> 
If kernel command line option have the power_supply as battery
then enable the battery charging functionality.

Change-Id: I0f7c5e03b0505fbd4161434f09d0084d33e3397f
Reviewed-on: http://git-master/r/50673
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
tegra: usb: phy: phy ready and phy off callbacks for HSIC 2011-09-06T23:47:26+00:00 Seshendra Gadagottu sgadagottu@nvidia.com 2011-09-02T12:44:40+00:00 e654b3633e92c9b2ce26ce8ceaed7baaad071282 Added phy ready and phy off callbacks to indicate HSIC phy state. BUG 828389 Change-Id: I83e6ca2bb19bb6b35c3d9fa9f659bf1d32563184 Reviewed-on: http://git-master/r/50276 Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
Added phy ready and phy off callbacks to indicate HSIC
phy state.

BUG 828389

Change-Id: I83e6ca2bb19bb6b35c3d9fa9f659bf1d32563184
Reviewed-on: http://git-master/r/50276
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
video: tegra: dc: disable windows on dc disable 2011-09-06T23:47:24+00:00 Jon Mayo jmayo@nvidia.com 2011-09-01T01:01:45+00:00 969fe6f1a6b5e28cf6de75937fd100c73e6a99b4 When disabling a display, also disable its windows. This forces applications to resend windows on hotplug and resume or they will see a blank screen. Bug 871107 Change-Id: I647cbc27fa8ce34b18dd3fbd270f9b8569d7f506 Reviewed-on: http://git-master/r/50204 Tested-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Donghan Ryu <dryu@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Thomas Cherry <tcherry@nvidia.com> 
When disabling a display, also disable its windows. This forces
applications to resend windows on hotplug and resume or they will see a
blank screen.

Bug 871107

Change-Id: I647cbc27fa8ce34b18dd3fbd270f9b8569d7f506
Reviewed-on: http://git-master/r/50204
Tested-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
arm: tegra: xmm : Changes for CP initiated system resume 2011-09-06T23:47:10+00:00 Seshendra Gadagottu sgadagottu@nvidia.com 2011-08-26T13:58:35+00:00 58de177d5eb9ad81c6bfb25195a88011ce8622b9 Added the changes required for CP initiated L3 -> L0 resume. BUG 828389 Change-Id: Ic6be39965f0f6b66db1f57fd8f860b6f7bb0d18b Reviewed-on: http://git-master/r/49462 Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
Added the changes required for CP initiated L3 -> L0 resume.

BUG 828389

Change-Id: Ic6be39965f0f6b66db1f57fd8f860b6f7bb0d18b
Reviewed-on: http://git-master/r/49462
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>