linux-toradex.git, branch tegra-T30.ER5 Linux kernel for Apalis and Colibri modules arm: tegra: cardhu: set CPU EDP limits 2011-05-19T05:49:28+00:00 Varun Wadekar vwadekar@nvidia.com 2011-05-12T08:55:01+00:00 40429e13014675e82e1126c5df87c9008aee92c1 Change-Id: I6282bbb63c34b8cc0d503cdd6eafe575fb78ef5f Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/31342 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> 
Change-Id: I6282bbb63c34b8cc0d503cdd6eafe575fb78ef5f
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/31342
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
ARM: Tegra: Support to update edp zones 2011-05-19T05:44:45+00:00 Varun Wadekar vwadekar@nvidia.com 2011-05-12T08:49:03+00:00 dbfa483300a34035c9b5de68e67bdad269817144 Tegra cpu-freq driver will now recognize edp zones and cap the max cpu freq for that zone. The temperature monitoring driver will be giving inputs to cpu-freq on the current temperature which would be interpreted by the cpu-freq driver appropriately. Change-Id: I918eb31771aa7e1e1a5f25438edded727de6eb8c Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/31339 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> 
Tegra cpu-freq driver will now recognize edp zones
and cap the max cpu freq for that zone. The temperature
monitoring driver will be giving inputs to cpu-freq
on the current temperature which would be interpreted
by the cpu-freq driver appropriately.

Change-Id: I918eb31771aa7e1e1a5f25438edded727de6eb8c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/31339
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
misc: nct1008: update edp zones for current temperature 2011-05-19T05:44:01+00:00 Varun Wadekar vwadekar@nvidia.com 2011-05-12T08:51:20+00:00 05f8714bb4fe61f9bb5103429d270c89d4c40f55 nct1008 will now use the ALERT# functionality to decide which edp zone to switch to. Change-Id: I1616a1d88e9f2f308a8b31935dbecec05ef54bca Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/31340 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> 
nct1008 will now use the ALERT# functionality to
decide which edp zone to switch to.

Change-Id: I1616a1d88e9f2f308a8b31935dbecec05ef54bca
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/31340
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
media: video: ov5650: synchronize sensors for stereo 2011-05-19T05:41:58+00:00 Prayas Mohanty pmohanty@nvidia.com 2011-05-02T10:35:53+00:00 2f777956b8ca3577cd5bc298d97c01be97ca3267 For stereo camera, it is important that both sensors should start sending data at the same time for them to be in sync. Add IOCTL (OV5650_IOCTL_SYNC_SENSORS), which user code can access to synchronize both sensors. bug 787214 bug 786928 Change-Id: I6bf34a8af3b7dd51150d5c0247b6787b824c1dae Reviewed-on: http://git-master/r/30005 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com> 
For stereo camera, it is important that both sensors
should start sending data at the same time for them to
be in sync. Add IOCTL (OV5650_IOCTL_SYNC_SENSORS),
which user code can access to synchronize both sensors.

bug 787214
bug 786928

Change-Id: I6bf34a8af3b7dd51150d5c0247b6787b824c1dae
Reviewed-on: http://git-master/r/30005
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
arm: tegra: sensors: synchronize cam A and cam B 2011-05-19T05:41:36+00:00 Prayas Mohanty pmohanty@nvidia.com 2011-05-18T12:22:29+00:00 7f99ddd6073eb9baf6b5bee4ca403fe74bcd1427 For stereo camera support, both cam A and cam B should start at the same point of time to be in sync. bug 787214 bug 786928 Change-Id: I417db0f8ff8c76130b76d8edb4e66189d6b92447 Reviewed-on: http://git-master/r/30004 Tested-by: Prayas Mohanty <pmohanty@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
For stereo camera support, both cam A and cam B should
start at the same point of time to be in sync.

bug 787214
bug 786928

Change-Id: I417db0f8ff8c76130b76d8edb4e66189d6b92447
Reviewed-on: http://git-master/r/30004
Tested-by: Prayas Mohanty <pmohanty@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
tegra: iovm: Limit forced Carveout-to-IOVM conversion to tegra 3 2011-05-19T05:41:20+00:00 Hiro Sugawara hsugawara@nvidia.com 2011-05-17T20:15:05+00:00 a602fe1941f5e486b6d8e8191b01b730cbdd4dd2 Bug 828027 Change-Id: I890e0481be5aade59bc68510c9fe5929bb3b64a2 Reviewed-on: http://git-master/r/31902 Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com> Tested-by: Daniel Willemsen <dwillemsen@nvidia.com> Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> 
Bug 828027

Change-Id: I890e0481be5aade59bc68510c9fe5929bb3b64a2
Reviewed-on: http://git-master/r/31902
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
Tested-by: Daniel Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
arm: tegra: Fix suspend/resume hang 2011-05-19T05:41:03+00:00 Vinod G vinodg@nvidia.com 2011-05-18T20:39:37+00:00 2c4aef1e859d273ff7a67bd6747e436d8d17b965 Spdif driver resume was causing issue on resume stage. Change-Id: I25c0d52889c4ff1b029053f744bee32023cf1a8f Reviewed-on: http://git-master/r/32070 Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Tested-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Reviewed-by: Scott Peterson <speterson@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> 
Spdif driver resume was causing issue on resume stage.

Change-Id: I25c0d52889c4ff1b029053f744bee32023cf1a8f
Reviewed-on: http://git-master/r/32070
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Tested-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
ARM: tegra: power: Enable Tegra3 core DVFS 2011-05-18T19:02:31+00:00 Alex Frid afrid@nvidia.com 2011-05-11T23:01:44+00:00 c859cc742fc0e9d88e88f5a96051ac5c6800d6b5 Enable Tegra3 core DVFS with default EDP limit set to 1.2V. Bug 812738 Bug 826200 Change-Id: If1e9f431729d0dbe6e8c89d9d8b9d5f9d2e8a2bf Reviewed-on: http://git-master/r/31254 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> 
Enable Tegra3 core DVFS with default EDP limit set to 1.2V.

Bug 812738
Bug 826200

Change-Id: If1e9f431729d0dbe6e8c89d9d8b9d5f9d2e8a2bf
Reviewed-on: http://git-master/r/31254
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
ARM: tegra: baseband: Add PH450 modem init and reset functions 2011-05-18T19:02:20+00:00 Steve Lin stlin@nvidia.com 2011-05-16T18:22:57+00:00 d8de4ab6e5b7598630b6f1b679762852c8b90b48 Add PH450 modem init and reset functions for Tegra Enterprise. Bug 800301 Change-Id: I7068fa87118c2388badb664da3d1a83a3eb49dae Reviewed-on: http://git-master/r/30920 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> 
Add PH450 modem init and reset functions for Tegra Enterprise.
Bug 800301

Change-Id: I7068fa87118c2388badb664da3d1a83a3eb49dae
Reviewed-on: http://git-master/r/30920
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
ARM: tegra: power: Use CPU LP mode for Tegra3 deep sleep 2011-05-18T19:02:11+00:00 Alex Frid afrid@nvidia.com 2011-05-13T05:51:34+00:00 6c7f0ecfe90d1b3c56d1616762acee6231f5a726 Change-Id: If23b48fb414332f5dd25307a098569a5474283c6 Reviewed-on: http://git-master/r/31471 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> 
Change-Id: If23b48fb414332f5dd25307a098569a5474283c6
Reviewed-on: http://git-master/r/31471
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>