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<title>linux-toradex.git/Documentation/accel/amdxdna, branch master</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>accel/amdxdna: Expose per-client BO memory usage via fdinfo</title>
<updated>2026-04-09T20:41:47+00:00</updated>
<author>
<name>Lizhi Hou</name>
<email>lizhi.hou@amd.com</email>
</author>
<published>2026-04-09T15:22:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e0169d0c690f03f379bf71d9332bb2065a5c6a05'/>
<id>e0169d0c690f03f379bf71d9332bb2065a5c6a05</id>
<content type='text'>
Implement amdxdna_show_fdinfo() to report per-client memory usage,
including below driver-specific memory stat:
  - heap allocation
  - internal BO allocation
  - external BO allocation

Hook the implementation into the DRM fdinfo infrastructure via
drm_driver.show_fdinfo, while continuing to expose standard DRM
memory stat through drm_show_memory_stats().

This improves observability of per-process memory usage and aligns
with existing fdinfo reporting mechanisms used by other drivers.

Suggested-by: Ian Rogers &lt;irogers@google.com&gt;
Signed-off-by: Max Zhen &lt;max.zhen@amd.com&gt;
Reviewed-by: Mario Limonciello (AMD) &lt;superm1@kernel.org&gt;
Signed-off-by: Lizhi Hou &lt;lizhi.hou@amd.com&gt;
Link: https://patch.msgid.link/20260409152259.176883-1-lizhi.hou@amd.com
</content>
<content type='xhtml'>
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<pre>
Implement amdxdna_show_fdinfo() to report per-client memory usage,
including below driver-specific memory stat:
  - heap allocation
  - internal BO allocation
  - external BO allocation

Hook the implementation into the DRM fdinfo infrastructure via
drm_driver.show_fdinfo, while continuing to expose standard DRM
memory stat through drm_show_memory_stats().

This improves observability of per-process memory usage and aligns
with existing fdinfo reporting mechanisms used by other drivers.

Suggested-by: Ian Rogers &lt;irogers@google.com&gt;
Signed-off-by: Max Zhen &lt;max.zhen@amd.com&gt;
Reviewed-by: Mario Limonciello (AMD) &lt;superm1@kernel.org&gt;
Signed-off-by: Lizhi Hou &lt;lizhi.hou@amd.com&gt;
Link: https://patch.msgid.link/20260409152259.176883-1-lizhi.hou@amd.com
</pre>
</div>
</content>
</entry>
<entry>
<title>Documentation: accel: amdxdna: Update compiler information</title>
<updated>2025-08-21T15:25:31+00:00</updated>
<author>
<name>Lizhi Hou</name>
<email>lizhi.hou@amd.com</email>
</author>
<published>2025-08-20T23:38:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3f13bcc886fc034113cb75cb32b8d9db1216b846'/>
<id>3f13bcc886fc034113cb75cb32b8d9db1216b846</id>
<content type='text'>
The compiler information is outdated. Update it to the latest.

Reviewed-by: Maciej Falkowski &lt;maciej.falkowski@linux.intel.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Lizhi Hou &lt;lizhi.hou@amd.com&gt;
Link: https://lore.kernel.org/r/20250820233817.4050006-1-lizhi.hou@amd.com
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<pre>
The compiler information is outdated. Update it to the latest.

Reviewed-by: Maciej Falkowski &lt;maciej.falkowski@linux.intel.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Lizhi Hou &lt;lizhi.hou@amd.com&gt;
Link: https://lore.kernel.org/r/20250820233817.4050006-1-lizhi.hou@amd.com
</pre>
</div>
</content>
</entry>
<entry>
<title>accel/amdxdna: Add documentation for AMD NPU accelerator driver</title>
<updated>2024-11-22T18:40:56+00:00</updated>
<author>
<name>Lizhi Hou</name>
<email>lizhi.hou@amd.com</email>
</author>
<published>2024-11-18T17:29:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=cafb2c9c27e3d0c63eae3be71b516e0d40ce2bb3'/>
<id>cafb2c9c27e3d0c63eae3be71b516e0d40ce2bb3</id>
<content type='text'>
AMD NPU (Neural Processing Unit) is a multi-user AI inference accelerator
integrated into AMD client APU. NPU enables efficient execution of Machine
Learning applications like CNN, LLM, etc. NPU is based on AMD XDNA
Architecture. NPU is managed by amdxdna driver.

Co-developed-by: Sonal Santan &lt;sonal.santan@amd.com&gt;
Signed-off-by: Sonal Santan &lt;sonal.santan@amd.com&gt;
Reviewed-by: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt;
Signed-off-by: Lizhi Hou &lt;lizhi.hou@amd.com&gt;
Signed-off-by: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20241118172942.2014541-2-lizhi.hou@amd.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
AMD NPU (Neural Processing Unit) is a multi-user AI inference accelerator
integrated into AMD client APU. NPU enables efficient execution of Machine
Learning applications like CNN, LLM, etc. NPU is based on AMD XDNA
Architecture. NPU is managed by amdxdna driver.

Co-developed-by: Sonal Santan &lt;sonal.santan@amd.com&gt;
Signed-off-by: Sonal Santan &lt;sonal.santan@amd.com&gt;
Reviewed-by: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt;
Signed-off-by: Lizhi Hou &lt;lizhi.hou@amd.com&gt;
Signed-off-by: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20241118172942.2014541-2-lizhi.hou@amd.com
</pre>
</div>
</content>
</entry>
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