<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/Documentation/arch, branch v6.16-rc4</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>docs: arm64: Fix ICC_SRE_EL2 register typo in booting.rst</title>
<updated>2025-06-12T14:50:00+00:00</updated>
<author>
<name>Lorenzo Pieralisi</name>
<email>lpieralisi@kernel.org</email>
</author>
<published>2025-06-10T12:09:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c0c7fa4e7a512006710c8e4d6b6f7b40c9f786cd'/>
<id>c0c7fa4e7a512006710c8e4d6b6f7b40c9f786cd</id>
<content type='text'>
Fix trivial ICC_SRE_EL2 register spelling typo in booting.rst.

Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
Cc: Jonathan Corbet &lt;corbet@lwn.net&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
CC: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Link: https://lore.kernel.org/r/20250610120935.852034-1-lpieralisi@kernel.org
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix trivial ICC_SRE_EL2 register spelling typo in booting.rst.

Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
Cc: Jonathan Corbet &lt;corbet@lwn.net&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
CC: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Link: https://lore.kernel.org/r/20250610120935.852034-1-lpieralisi@kernel.org
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'riscv-for-linus-6.16-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux</title>
<updated>2025-06-07T01:05:18+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-06-07T01:05:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=119b1e61a769aa98e68599f44721661a4d8c55f3'/>
<id>119b1e61a769aa98e68599f44721661a4d8c55f3</id>
<content type='text'>
Pull RISC-V updates from Palmer Dabbelt:

 - Support for the FWFT SBI extension, which is part of SBI 3.0 and a
   dependency for many new SBI and ISA extensions

 - Support for getrandom() in the VDSO

 - Support for mseal

 - Optimized routines for raid6 syndrome and recovery calculations

 - kexec_file() supports loading Image-formatted kernel binaries

 - Improvements to the instruction patching framework to allow for
   atomic instruction patching, along with rules as to how systems need
   to behave in order to function correctly

 - Support for a handful of new ISA extensions: Svinval, Zicbop, Zabha,
   some SiFive vendor extensions

 - Various fixes and cleanups, including: misaligned access handling,
   perf symbol mangling, module loading, PUD THPs, and improved uaccess
   routines

* tag 'riscv-for-linus-6.16-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (69 commits)
  riscv: uaccess: Only restore the CSR_STATUS SUM bit
  RISC-V: vDSO: Wire up getrandom() vDSO implementation
  riscv: enable mseal sysmap for RV64
  raid6: Add RISC-V SIMD syndrome and recovery calculations
  riscv: mm: Add support for Svinval extension
  RISC-V: Documentation: Add enough title underlines to CMODX
  riscv: Improve Kconfig help for RISCV_ISA_V_PREEMPTIVE
  MAINTAINERS: Update Atish's email address
  riscv: uaccess: do not do misaligned accesses in get/put_user()
  riscv: process: use unsigned int instead of unsigned long for put_user()
  riscv: make unsafe user copy routines use existing assembly routines
  riscv: hwprobe: export Zabha extension
  riscv: Make regs_irqs_disabled() more clear
  perf symbols: Ignore mapping symbols on riscv
  RISC-V: Kconfig: Fix help text of CMDLINE_EXTEND
  riscv: module: Optimize PLT/GOT entry counting
  riscv: Add support for PUD THP
  riscv: xchg: Prefetch the destination word for sc.w
  riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop
  riscv: Add support for Zicbop
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull RISC-V updates from Palmer Dabbelt:

 - Support for the FWFT SBI extension, which is part of SBI 3.0 and a
   dependency for many new SBI and ISA extensions

 - Support for getrandom() in the VDSO

 - Support for mseal

 - Optimized routines for raid6 syndrome and recovery calculations

 - kexec_file() supports loading Image-formatted kernel binaries

 - Improvements to the instruction patching framework to allow for
   atomic instruction patching, along with rules as to how systems need
   to behave in order to function correctly

 - Support for a handful of new ISA extensions: Svinval, Zicbop, Zabha,
   some SiFive vendor extensions

 - Various fixes and cleanups, including: misaligned access handling,
   perf symbol mangling, module loading, PUD THPs, and improved uaccess
   routines

* tag 'riscv-for-linus-6.16-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (69 commits)
  riscv: uaccess: Only restore the CSR_STATUS SUM bit
  RISC-V: vDSO: Wire up getrandom() vDSO implementation
  riscv: enable mseal sysmap for RV64
  raid6: Add RISC-V SIMD syndrome and recovery calculations
  riscv: mm: Add support for Svinval extension
  RISC-V: Documentation: Add enough title underlines to CMODX
  riscv: Improve Kconfig help for RISCV_ISA_V_PREEMPTIVE
  MAINTAINERS: Update Atish's email address
  riscv: uaccess: do not do misaligned accesses in get/put_user()
  riscv: process: use unsigned int instead of unsigned long for put_user()
  riscv: make unsafe user copy routines use existing assembly routines
  riscv: hwprobe: export Zabha extension
  riscv: Make regs_irqs_disabled() more clear
  perf symbols: Ignore mapping symbols on riscv
  RISC-V: Kconfig: Fix help text of CMDLINE_EXTEND
  riscv: module: Optimize PLT/GOT entry counting
  riscv: Add support for PUD THP
  riscv: xchg: Prefetch the destination word for sc.w
  riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop
  riscv: Add support for Zicbop
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'riscv-mw2-6.16-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/alexghiti/linux into for-next</title>
<updated>2025-06-05T21:03:16+00:00</updated>
<author>
<name>Palmer Dabbelt</name>
<email>palmer@dabbelt.com</email>
</author>
<published>2025-06-05T18:23:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2670a39b1ea68fb0b9175e26e299f3fe974e0332'/>
<id>2670a39b1ea68fb0b9175e26e299f3fe974e0332</id>
<content type='text'>
riscv patches for 6.16-rc1, part 2

* Performance improvements
  - Add support for vdso getrandom
  - Implement raid6 calculations using vectors
  - Introduce svinval tlb invalidation

* Cleanup
  - A bunch of deduplication of the macros we use for manipulating instructions

* Misc
  - Introduce a kunit test for kprobes
  - Add support for mseal as riscv fits the requirements (thanks to Lorenzo for making sure of that :))

[Palmer: There was a rebase between part 1 and part 2, so I've had to do
some more git surgery here... at least two rounds of surgery...]

* alex-pr-2: (866 commits)
  RISC-V: vDSO: Wire up getrandom() vDSO implementation
  riscv: enable mseal sysmap for RV64
  raid6: Add RISC-V SIMD syndrome and recovery calculations
  riscv: mm: Add support for Svinval extension
  riscv: Add kprobes KUnit test
  riscv: kprobes: Remove duplication of RV_EXTRACT_ITYPE_IMM
  riscv: kprobes: Remove duplication of RV_EXTRACT_UTYPE_IMM
  riscv: kprobes: Remove duplication of RV_EXTRACT_RD_REG
  riscv: kprobes: Remove duplication of RVC_EXTRACT_BTYPE_IMM
  riscv: kprobes: Remove duplication of RVC_EXTRACT_C2_RS1_REG
  riscv: kproves: Remove duplication of RVC_EXTRACT_JTYPE_IMM
  riscv: kprobes: Remove duplication of RV_EXTRACT_BTYPE_IMM
  riscv: kprobes: Remove duplication of RV_EXTRACT_RS1_REG
  riscv: kprobes: Remove duplication of RV_EXTRACT_JTYPE_IMM
  riscv: kprobes: Move branch_funct3 to insn.h
  riscv: kprobes: Move branch_rs2_idx to insn.h
  Linux 6.15-rc6
  Input: xpad - fix xpad_device sorting
  Input: xpad - add support for several more controllers
  Input: xpad - fix Share button on Xbox One controllers
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
riscv patches for 6.16-rc1, part 2

* Performance improvements
  - Add support for vdso getrandom
  - Implement raid6 calculations using vectors
  - Introduce svinval tlb invalidation

* Cleanup
  - A bunch of deduplication of the macros we use for manipulating instructions

* Misc
  - Introduce a kunit test for kprobes
  - Add support for mseal as riscv fits the requirements (thanks to Lorenzo for making sure of that :))

[Palmer: There was a rebase between part 1 and part 2, so I've had to do
some more git surgery here... at least two rounds of surgery...]

* alex-pr-2: (866 commits)
  RISC-V: vDSO: Wire up getrandom() vDSO implementation
  riscv: enable mseal sysmap for RV64
  raid6: Add RISC-V SIMD syndrome and recovery calculations
  riscv: mm: Add support for Svinval extension
  riscv: Add kprobes KUnit test
  riscv: kprobes: Remove duplication of RV_EXTRACT_ITYPE_IMM
  riscv: kprobes: Remove duplication of RV_EXTRACT_UTYPE_IMM
  riscv: kprobes: Remove duplication of RV_EXTRACT_RD_REG
  riscv: kprobes: Remove duplication of RVC_EXTRACT_BTYPE_IMM
  riscv: kprobes: Remove duplication of RVC_EXTRACT_C2_RS1_REG
  riscv: kproves: Remove duplication of RVC_EXTRACT_JTYPE_IMM
  riscv: kprobes: Remove duplication of RV_EXTRACT_BTYPE_IMM
  riscv: kprobes: Remove duplication of RV_EXTRACT_RS1_REG
  riscv: kprobes: Remove duplication of RV_EXTRACT_JTYPE_IMM
  riscv: kprobes: Move branch_funct3 to insn.h
  riscv: kprobes: Move branch_rs2_idx to insn.h
  Linux 6.15-rc6
  Input: xpad - fix xpad_device sorting
  Input: xpad - add support for several more controllers
  Input: xpad - fix Share button on Xbox One controllers
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>RISC-V: Documentation: Add enough title underlines to CMODX</title>
<updated>2025-06-05T19:26:07+00:00</updated>
<author>
<name>Palmer Dabbelt</name>
<email>palmer@dabbelt.com</email>
</author>
<published>2025-06-03T17:28:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7bc76fb3883aaba56b16dc4009ba8a490b8dc6ab'/>
<id>7bc76fb3883aaba56b16dc4009ba8a490b8dc6ab</id>
<content type='text'>
This reports as a warning in linux-next along the lines of

    Documentation/arch/riscv/cmodx.rst:14: WARNING: Title underline too short.

    CMODX in the Kernel Space
    --------------------- [docutils]
    Documentation/arch/riscv/cmodx.rst:43: WARNING: Title underline too short.

    CMODX in the User Space
    --------------------- [docutils]
    Documentation/arch/riscv/cmodx.rst:43: WARNING: Title underline too short.

    CMODX in the User Space
    --------------------- [docutils]

Link: https://lore.kernel.org/all/20250603154544.1602a8b5@canb.auug.org.au/
Fixes: 0e07200b2af6 ("riscv: Documentation: add a description about dynamic ftrace")
Reviewed-by: Charlie Jenkins &lt;charlie@rivosinc.com&gt;
Link: https://lore.kernel.org/r/20250603172856.49925-1-palmer@dabbelt.com
Signed-off-by: Palmer Dabbelt &lt;palmer@dabbelt.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This reports as a warning in linux-next along the lines of

    Documentation/arch/riscv/cmodx.rst:14: WARNING: Title underline too short.

    CMODX in the Kernel Space
    --------------------- [docutils]
    Documentation/arch/riscv/cmodx.rst:43: WARNING: Title underline too short.

    CMODX in the User Space
    --------------------- [docutils]
    Documentation/arch/riscv/cmodx.rst:43: WARNING: Title underline too short.

    CMODX in the User Space
    --------------------- [docutils]

Link: https://lore.kernel.org/all/20250603154544.1602a8b5@canb.auug.org.au/
Fixes: 0e07200b2af6 ("riscv: Documentation: add a description about dynamic ftrace")
Reviewed-by: Charlie Jenkins &lt;charlie@rivosinc.com&gt;
Link: https://lore.kernel.org/r/20250603172856.49925-1-palmer@dabbelt.com
Signed-off-by: Palmer Dabbelt &lt;palmer@dabbelt.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'riscv-mw1-6.16-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/alexghiti/linux into for-next</title>
<updated>2025-06-05T19:26:06+00:00</updated>
<author>
<name>Palmer Dabbelt</name>
<email>palmer@dabbelt.com</email>
</author>
<published>2025-06-05T18:11:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9d3da7827536b8e41e4188185622816a105b46f7'/>
<id>9d3da7827536b8e41e4188185622816a105b46f7</id>
<content type='text'>
riscv patches for 6.16-rc1

* Implement atomic patching support for ftrace which finally allows to
  get rid of stop_machine().
* Support for kexec_file_load() syscall
* Improve module loading time by changing the algorithm that counts the
  number of plt/got entries in a module.
* Zicbop is now used in the kernel to prefetch instructions

[Palmer: There's been two rounds of surgery on this one, so as a result
it's a bit different than the PR.]

* alex-pr: (734 commits)
  riscv: Improve Kconfig help for RISCV_ISA_V_PREEMPTIVE
  MAINTAINERS: Update Atish's email address
  riscv: hwprobe: export Zabha extension
  riscv: Make regs_irqs_disabled() more clear
  perf symbols: Ignore mapping symbols on riscv
  RISC-V: Kconfig: Fix help text of CMDLINE_EXTEND
  riscv: module: Optimize PLT/GOT entry counting
  riscv: Add support for PUD THP
  riscv: xchg: Prefetch the destination word for sc.w
  riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop
  riscv: Add support for Zicbop
  riscv: Introduce Zicbop instructions
  riscv/kexec_file: Fix comment in purgatory relocator
  riscv: kexec_file: Support loading Image binary file
  riscv: kexec_file: Split the loading of kernel and others
  riscv: Documentation: add a description about dynamic ftrace
  riscv: ftrace: support direct call using call_ops
  riscv: Implement HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS
  riscv: ftrace: support PREEMPT
  riscv: add a data fence for CMODX in the kernel mode
  ...

Signed-off-by: Palmer Dabbelt &lt;palmer@dabbelt.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
riscv patches for 6.16-rc1

* Implement atomic patching support for ftrace which finally allows to
  get rid of stop_machine().
* Support for kexec_file_load() syscall
* Improve module loading time by changing the algorithm that counts the
  number of plt/got entries in a module.
* Zicbop is now used in the kernel to prefetch instructions

[Palmer: There's been two rounds of surgery on this one, so as a result
it's a bit different than the PR.]

* alex-pr: (734 commits)
  riscv: Improve Kconfig help for RISCV_ISA_V_PREEMPTIVE
  MAINTAINERS: Update Atish's email address
  riscv: hwprobe: export Zabha extension
  riscv: Make regs_irqs_disabled() more clear
  perf symbols: Ignore mapping symbols on riscv
  RISC-V: Kconfig: Fix help text of CMDLINE_EXTEND
  riscv: module: Optimize PLT/GOT entry counting
  riscv: Add support for PUD THP
  riscv: xchg: Prefetch the destination word for sc.w
  riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop
  riscv: Add support for Zicbop
  riscv: Introduce Zicbop instructions
  riscv/kexec_file: Fix comment in purgatory relocator
  riscv: kexec_file: Support loading Image binary file
  riscv: kexec_file: Split the loading of kernel and others
  riscv: Documentation: add a description about dynamic ftrace
  riscv: ftrace: support direct call using call_ops
  riscv: Implement HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS
  riscv: ftrace: support PREEMPT
  riscv: add a data fence for CMODX in the kernel mode
  ...

Signed-off-by: Palmer Dabbelt &lt;palmer@dabbelt.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>riscv: hwprobe: export Zabha extension</title>
<updated>2025-06-05T18:10:18+00:00</updated>
<author>
<name>Alexandre Ghiti</name>
<email>alexghiti@rivosinc.com</email>
</author>
<published>2025-04-21T14:14:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=415a8c81da3dab0a585bd4f8d505a11ad5a171a7'/>
<id>415a8c81da3dab0a585bd4f8d505a11ad5a171a7</id>
<content type='text'>
Export Zabha through the hwprobe syscall.

Reviewed-by: Clément Léger &lt;cleger@rivosinc.com&gt;
Link: https://lore.kernel.org/r/20250421141413.394444-1-alexghiti@rivosinc.com
Signed-off-by: Alexandre Ghiti &lt;alexghiti@rivosinc.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@dabbelt.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Export Zabha through the hwprobe syscall.

Reviewed-by: Clément Léger &lt;cleger@rivosinc.com&gt;
Link: https://lore.kernel.org/r/20250421141413.394444-1-alexghiti@rivosinc.com
Signed-off-by: Alexandre Ghiti &lt;alexghiti@rivosinc.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@dabbelt.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>riscv: Documentation: add a description about dynamic ftrace</title>
<updated>2025-06-05T18:09:32+00:00</updated>
<author>
<name>Andy Chiu</name>
<email>andybnac@gmail.com</email>
</author>
<published>2025-04-07T18:08:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d8ac85dad407f4cea65a970e9ba42201cb49686a'/>
<id>d8ac85dad407f4cea65a970e9ba42201cb49686a</id>
<content type='text'>
Add a section in cmodx to describe how dynamic ftrace works on riscv,
limitations, and assumptions.

Signed-off-by: Andy Chiu &lt;andybnac@gmail.com&gt;
Link: https://lore.kernel.org/r/20250407180838.42877-12-andybnac@gmail.com
Signed-off-by: Alexandre Ghiti &lt;alexghiti@rivosinc.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@dabbelt.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a section in cmodx to describe how dynamic ftrace works on riscv,
limitations, and assumptions.

Signed-off-by: Andy Chiu &lt;andybnac@gmail.com&gt;
Link: https://lore.kernel.org/r/20250407180838.42877-12-andybnac@gmail.com
Signed-off-by: Alexandre Ghiti &lt;alexghiti@rivosinc.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@dabbelt.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'for-linus' of https://github.com/openrisc/linux</title>
<updated>2025-06-01T15:56:34+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-06-01T15:56:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=82dad698061c2db166fdcf92f549d34ba038e829'/>
<id>82dad698061c2db166fdcf92f549d34ba038e829</id>
<content type='text'>
Pull OpenRISC updates from Stafford Horne:
 "Just a few documentation updates from the community:

   - Device tree documentation conversion from txt to yaml

   - Documentation addition to help users getting started with initramfs
     on OpenRISC

* tag 'for-linus' of https://github.com/openrisc/linux:
  dt-bindings: interrupt-controller: Convert openrisc,ompic to DT schema
  dt-bindings: interrupt-controller: Convert opencores,or1k-pic to DT schema
  Documentation:openrisc: Add build instructions with initramfs
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull OpenRISC updates from Stafford Horne:
 "Just a few documentation updates from the community:

   - Device tree documentation conversion from txt to yaml

   - Documentation addition to help users getting started with initramfs
     on OpenRISC

* tag 'for-linus' of https://github.com/openrisc/linux:
  dt-bindings: interrupt-controller: Convert openrisc,ompic to DT schema
  dt-bindings: interrupt-controller: Convert opencores,or1k-pic to DT schema
  Documentation:openrisc: Add build instructions with initramfs
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'platform-drivers-x86-v6.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86</title>
<updated>2025-05-29T17:19:22+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-05-29T17:19:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1193e205dbb6feca917dc8e1862ffcdf2194234b'/>
<id>1193e205dbb6feca917dc8e1862ffcdf2194234b</id>
<content type='text'>
Pull x86 platform drivers updates from Ilpo Järvinen:
 "The changes are mostly business as usual. Besides pdx86 changes, there
  are a few power supply changes needed for related pdx86 features, move
  of oxpec driver from hwmon (oxp-sensors) to pdx86, and one FW version
  warning to hid-asus.

  Highlights:

   - alienware-wmi-wmax:
       - Add HWMON support
       - Add ABI and admin-guide documentation
       - Expose GPIO debug methods through debug FS
       - Support manual fan control and "custom" thermal profile

   - amd/hsmp:
       - Add sysfs files to show HSMP telemetry
       - Report power readings and limits via hwmon

   - amd/isp4: Add AMD ISP platform config for OV05C10

   - asus-wmi:
       - Refactor Ally suspend/resume to work better with older FW
       - hid-asus: check ROG Ally MCU version and warn about old FW versions

   - dasharo-acpi:
       - Add driver for Dasharo devices supporting fans and temperatures
         monitoring

   - dell-ddv:
       - Expose the battery health and manufacture date to userspace
         using power supply extensions
       - Implement the battery matching algorithm

   - dell-pc:
       - Improve error propagation
       - Use faux device

   - int3472:
       - Add delays to avoid GPIO regulator spikes
       - Add handshake pin support
       - Make regulator supply name configurable and allow registering
         more than 1 GPIO regulator
       - Map mt9m114 powerdown pin to powerenable

   - intel/pmc: Add separate SSRAM Telemetry driver

   - intel-uncore-freq: Add attributes to show agent types and die ID

   - ISST:
       - Support SST-TF revision 2 (allows more cores per bucket)
       - Support SST-PP revision 2 (fabric 1 frequencies)
       - Remove unnecessary SST MSRs restore (the package retains MSRs
         despite CPU offlining)

   - mellanox: Add support for SN2201, SN4280, SN5610, and SN5640

   - mellanox: mlxbf-pmc: Support additional PMC blocks

   - oxpec:
       - Add OneXFly variants
       - Add support for charge limit, charge thresholds, and turbo LED
       - Distinguish current X1 variants to avoid unwanted matching to
         new variants
       - Follow hwmon conventions
       - Move from hwmon/oxp-sensors to platform/x86 to match the
         enlarged scope

   - power supply:
       - Add inhibit-charge-awake (needed by oxpec)
       - Add additional battery health status values ("blown fuse" and
         "cell imbalance") (needed by dell-ddv)

   - powerwell-ec: Add driver for Portwell EC supporting GPIO and watchdog

   - thinkpad-acpi: Support camera shutter switch hotkey

   - tuxedo: Add virtual LampArray for TUXEDO NB04 devices

   - tools/power/x86/intel-speed-select:
       - Support displaying SST-PP revision 2 fields
       - Skip uncore frequency update on newer generations of CPUs

   - Miscellaneous cleanups / refactoring / improvements"

* tag 'platform-drivers-x86-v6.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86: (112 commits)
  thermal/drivers/acerhdf: Constify struct thermal_zone_device_ops
  platform/x86/amd/hsmp: fix building with CONFIG_HWMON=m
  platform/x86: asus-wmi: fix build without CONFIG_SUSPEND
  docs: ABI: Fix "aassociated" to "associated"
  platform/x86: Add AMD ISP platform config for OV05C10
  Documentation: admin-guide: pm: Add documentation for die_id
  platform/x86/intel-uncore-freq: Add attributes to show die_id
  platform/x86/intel: power-domains: Add interface to get Linux die ID
  Documentation: admin-guide: pm: Add documentation for agent_types
  platform/x86/intel-uncore-freq: Add attributes to show agent types
  platform/x86/tuxedo: Prevent invalid Kconfig state
  platform/x86: dell-ddv: Expose the battery health to userspace
  platform/x86: dell-ddv: Expose the battery manufacture date to userspace
  platform/x86: dell-ddv: Implement the battery matching algorithm
  power: supply: core: Add additional health status values
  platform/x86/amd/hsmp: acpi: Add sysfs files to display HSMP telemetry
  platform/x86/amd/hsmp: Report power via hwmon sensors
  platform/x86/amd/hsmp: Use a single DRIVER_VERSION for all hsmp modules
  platform/mellanox: mlxreg-dpu: Fix smatch warnings
  platform: mellanox: nvsw-sn2200: Fix .items in nvsw_sn2201_busbar_hotplug
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull x86 platform drivers updates from Ilpo Järvinen:
 "The changes are mostly business as usual. Besides pdx86 changes, there
  are a few power supply changes needed for related pdx86 features, move
  of oxpec driver from hwmon (oxp-sensors) to pdx86, and one FW version
  warning to hid-asus.

  Highlights:

   - alienware-wmi-wmax:
       - Add HWMON support
       - Add ABI and admin-guide documentation
       - Expose GPIO debug methods through debug FS
       - Support manual fan control and "custom" thermal profile

   - amd/hsmp:
       - Add sysfs files to show HSMP telemetry
       - Report power readings and limits via hwmon

   - amd/isp4: Add AMD ISP platform config for OV05C10

   - asus-wmi:
       - Refactor Ally suspend/resume to work better with older FW
       - hid-asus: check ROG Ally MCU version and warn about old FW versions

   - dasharo-acpi:
       - Add driver for Dasharo devices supporting fans and temperatures
         monitoring

   - dell-ddv:
       - Expose the battery health and manufacture date to userspace
         using power supply extensions
       - Implement the battery matching algorithm

   - dell-pc:
       - Improve error propagation
       - Use faux device

   - int3472:
       - Add delays to avoid GPIO regulator spikes
       - Add handshake pin support
       - Make regulator supply name configurable and allow registering
         more than 1 GPIO regulator
       - Map mt9m114 powerdown pin to powerenable

   - intel/pmc: Add separate SSRAM Telemetry driver

   - intel-uncore-freq: Add attributes to show agent types and die ID

   - ISST:
       - Support SST-TF revision 2 (allows more cores per bucket)
       - Support SST-PP revision 2 (fabric 1 frequencies)
       - Remove unnecessary SST MSRs restore (the package retains MSRs
         despite CPU offlining)

   - mellanox: Add support for SN2201, SN4280, SN5610, and SN5640

   - mellanox: mlxbf-pmc: Support additional PMC blocks

   - oxpec:
       - Add OneXFly variants
       - Add support for charge limit, charge thresholds, and turbo LED
       - Distinguish current X1 variants to avoid unwanted matching to
         new variants
       - Follow hwmon conventions
       - Move from hwmon/oxp-sensors to platform/x86 to match the
         enlarged scope

   - power supply:
       - Add inhibit-charge-awake (needed by oxpec)
       - Add additional battery health status values ("blown fuse" and
         "cell imbalance") (needed by dell-ddv)

   - powerwell-ec: Add driver for Portwell EC supporting GPIO and watchdog

   - thinkpad-acpi: Support camera shutter switch hotkey

   - tuxedo: Add virtual LampArray for TUXEDO NB04 devices

   - tools/power/x86/intel-speed-select:
       - Support displaying SST-PP revision 2 fields
       - Skip uncore frequency update on newer generations of CPUs

   - Miscellaneous cleanups / refactoring / improvements"

* tag 'platform-drivers-x86-v6.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86: (112 commits)
  thermal/drivers/acerhdf: Constify struct thermal_zone_device_ops
  platform/x86/amd/hsmp: fix building with CONFIG_HWMON=m
  platform/x86: asus-wmi: fix build without CONFIG_SUSPEND
  docs: ABI: Fix "aassociated" to "associated"
  platform/x86: Add AMD ISP platform config for OV05C10
  Documentation: admin-guide: pm: Add documentation for die_id
  platform/x86/intel-uncore-freq: Add attributes to show die_id
  platform/x86/intel: power-domains: Add interface to get Linux die ID
  Documentation: admin-guide: pm: Add documentation for agent_types
  platform/x86/intel-uncore-freq: Add attributes to show agent types
  platform/x86/tuxedo: Prevent invalid Kconfig state
  platform/x86: dell-ddv: Expose the battery health to userspace
  platform/x86: dell-ddv: Expose the battery manufacture date to userspace
  platform/x86: dell-ddv: Implement the battery matching algorithm
  power: supply: core: Add additional health status values
  platform/x86/amd/hsmp: acpi: Add sysfs files to display HSMP telemetry
  platform/x86/amd/hsmp: Report power via hwmon sensors
  platform/x86/amd/hsmp: Use a single DRIVER_VERSION for all hsmp modules
  platform/mellanox: mlxreg-dpu: Fix smatch warnings
  platform: mellanox: nvsw-sn2200: Fix .items in nvsw_sn2201_busbar_hotplug
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm</title>
<updated>2025-05-29T15:10:01+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-05-29T15:10:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=43db1111073049220381944af4a3b8a5400eda71'/>
<id>43db1111073049220381944af4a3b8a5400eda71</id>
<content type='text'>
Pull kvm updates from Paolo Bonzini:
 "As far as x86 goes this pull request "only" includes TDX host support.

  Quotes are appropriate because (at 6k lines and 100+ commits) it is
  much bigger than the rest, which will come later this week and
  consists mostly of bugfixes and selftests. s390 changes will also come
  in the second batch.

  ARM:

   - Add large stage-2 mapping (THP) support for non-protected guests
     when pKVM is enabled, clawing back some performance.

   - Enable nested virtualisation support on systems that support it,
     though it is disabled by default.

   - Add UBSAN support to the standalone EL2 object used in nVHE/hVHE
     and protected modes.

   - Large rework of the way KVM tracks architecture features and links
     them with the effects of control bits. While this has no functional
     impact, it ensures correctness of emulation (the data is
     automatically extracted from the published JSON files), and helps
     dealing with the evolution of the architecture.

   - Significant changes to the way pKVM tracks ownership of pages,
     avoiding page table walks by storing the state in the hypervisor's
     vmemmap. This in turn enables the THP support described above.

   - New selftest checking the pKVM ownership transition rules

   - Fixes for FEAT_MTE_ASYNC being accidentally advertised to guests
     even if the host didn't have it.

   - Fixes for the address translation emulation, which happened to be
     rather buggy in some specific contexts.

   - Fixes for the PMU emulation in NV contexts, decoupling PMCR_EL0.N
     from the number of counters exposed to a guest and addressing a
     number of issues in the process.

   - Add a new selftest for the SVE host state being corrupted by a
     guest.

   - Keep HCR_EL2.xMO set at all times for systems running with the
     kernel at EL2, ensuring that the window for interrupts is slightly
     bigger, and avoiding a pretty bad erratum on the AmpereOne HW.

   - Add workaround for AmpereOne's erratum AC04_CPU_23, which suffers
     from a pretty bad case of TLB corruption unless accesses to HCR_EL2
     are heavily synchronised.

   - Add a per-VM, per-ITS debugfs entry to dump the state of the ITS
     tables in a human-friendly fashion.

   - and the usual random cleanups.

  LoongArch:

   - Don't flush tlb if the host supports hardware page table walks.

   - Add KVM selftests support.

  RISC-V:

   - Add vector registers to get-reg-list selftest

   - VCPU reset related improvements

   - Remove scounteren initialization from VCPU reset

   - Support VCPU reset from userspace using set_mpstate() ioctl

  x86:

   - Initial support for TDX in KVM.

     This finally makes it possible to use the TDX module to run
     confidential guests on Intel processors. This is quite a large
     series, including support for private page tables (managed by the
     TDX module and mirrored in KVM for efficiency), forwarding some
     TDVMCALLs to userspace, and handling several special VM exits from
     the TDX module.

     This has been in the works for literally years and it's not really
     possible to describe everything here, so I'll defer to the various
     merge commits up to and including commit 7bcf7246c42a ('Merge
     branch 'kvm-tdx-finish-initial' into HEAD')"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (248 commits)
  x86/tdx: mark tdh_vp_enter() as __flatten
  Documentation: virt/kvm: remove unreferenced footnote
  RISC-V: KVM: lock the correct mp_state during reset
  KVM: arm64: Fix documentation for vgic_its_iter_next()
  KVM: arm64: np-guest CMOs with PMD_SIZE fixmap
  KVM: arm64: Stage-2 huge mappings for np-guests
  KVM: arm64: Add a range to pkvm_mappings
  KVM: arm64: Convert pkvm_mappings to interval tree
  KVM: arm64: Add a range to __pkvm_host_test_clear_young_guest()
  KVM: arm64: Add a range to __pkvm_host_wrprotect_guest()
  KVM: arm64: Add a range to __pkvm_host_unshare_guest()
  KVM: arm64: Add a range to __pkvm_host_share_guest()
  KVM: arm64: Introduce for_each_hyp_page
  KVM: arm64: Handle huge mappings for np-guest CMOs
  KVM: arm64: nv: Release faulted-in VNCR page from mmu_lock critical section
  KVM: arm64: nv: Handle TLBI S1E2 for VNCR invalidation with mmu_lock held
  KVM: arm64: nv: Hold mmu_lock when invalidating VNCR SW-TLB before translating
  RISC-V: KVM: add KVM_CAP_RISCV_MP_STATE_RESET
  RISC-V: KVM: Remove scounteren initialization
  KVM: RISC-V: remove unnecessary SBI reset state
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull kvm updates from Paolo Bonzini:
 "As far as x86 goes this pull request "only" includes TDX host support.

  Quotes are appropriate because (at 6k lines and 100+ commits) it is
  much bigger than the rest, which will come later this week and
  consists mostly of bugfixes and selftests. s390 changes will also come
  in the second batch.

  ARM:

   - Add large stage-2 mapping (THP) support for non-protected guests
     when pKVM is enabled, clawing back some performance.

   - Enable nested virtualisation support on systems that support it,
     though it is disabled by default.

   - Add UBSAN support to the standalone EL2 object used in nVHE/hVHE
     and protected modes.

   - Large rework of the way KVM tracks architecture features and links
     them with the effects of control bits. While this has no functional
     impact, it ensures correctness of emulation (the data is
     automatically extracted from the published JSON files), and helps
     dealing with the evolution of the architecture.

   - Significant changes to the way pKVM tracks ownership of pages,
     avoiding page table walks by storing the state in the hypervisor's
     vmemmap. This in turn enables the THP support described above.

   - New selftest checking the pKVM ownership transition rules

   - Fixes for FEAT_MTE_ASYNC being accidentally advertised to guests
     even if the host didn't have it.

   - Fixes for the address translation emulation, which happened to be
     rather buggy in some specific contexts.

   - Fixes for the PMU emulation in NV contexts, decoupling PMCR_EL0.N
     from the number of counters exposed to a guest and addressing a
     number of issues in the process.

   - Add a new selftest for the SVE host state being corrupted by a
     guest.

   - Keep HCR_EL2.xMO set at all times for systems running with the
     kernel at EL2, ensuring that the window for interrupts is slightly
     bigger, and avoiding a pretty bad erratum on the AmpereOne HW.

   - Add workaround for AmpereOne's erratum AC04_CPU_23, which suffers
     from a pretty bad case of TLB corruption unless accesses to HCR_EL2
     are heavily synchronised.

   - Add a per-VM, per-ITS debugfs entry to dump the state of the ITS
     tables in a human-friendly fashion.

   - and the usual random cleanups.

  LoongArch:

   - Don't flush tlb if the host supports hardware page table walks.

   - Add KVM selftests support.

  RISC-V:

   - Add vector registers to get-reg-list selftest

   - VCPU reset related improvements

   - Remove scounteren initialization from VCPU reset

   - Support VCPU reset from userspace using set_mpstate() ioctl

  x86:

   - Initial support for TDX in KVM.

     This finally makes it possible to use the TDX module to run
     confidential guests on Intel processors. This is quite a large
     series, including support for private page tables (managed by the
     TDX module and mirrored in KVM for efficiency), forwarding some
     TDVMCALLs to userspace, and handling several special VM exits from
     the TDX module.

     This has been in the works for literally years and it's not really
     possible to describe everything here, so I'll defer to the various
     merge commits up to and including commit 7bcf7246c42a ('Merge
     branch 'kvm-tdx-finish-initial' into HEAD')"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (248 commits)
  x86/tdx: mark tdh_vp_enter() as __flatten
  Documentation: virt/kvm: remove unreferenced footnote
  RISC-V: KVM: lock the correct mp_state during reset
  KVM: arm64: Fix documentation for vgic_its_iter_next()
  KVM: arm64: np-guest CMOs with PMD_SIZE fixmap
  KVM: arm64: Stage-2 huge mappings for np-guests
  KVM: arm64: Add a range to pkvm_mappings
  KVM: arm64: Convert pkvm_mappings to interval tree
  KVM: arm64: Add a range to __pkvm_host_test_clear_young_guest()
  KVM: arm64: Add a range to __pkvm_host_wrprotect_guest()
  KVM: arm64: Add a range to __pkvm_host_unshare_guest()
  KVM: arm64: Add a range to __pkvm_host_share_guest()
  KVM: arm64: Introduce for_each_hyp_page
  KVM: arm64: Handle huge mappings for np-guest CMOs
  KVM: arm64: nv: Release faulted-in VNCR page from mmu_lock critical section
  KVM: arm64: nv: Handle TLBI S1E2 for VNCR invalidation with mmu_lock held
  KVM: arm64: nv: Hold mmu_lock when invalidating VNCR SW-TLB before translating
  RISC-V: KVM: add KVM_CAP_RISCV_MP_STATE_RESET
  RISC-V: KVM: Remove scounteren initialization
  KVM: RISC-V: remove unnecessary SBI reset state
  ...
</pre>
</div>
</content>
</entry>
</feed>
