linux-toradex.git/Documentation/devicetree/bindings/dma, branch v6.8 Linux kernel for Apalis and Colibri modules dt-bindings: dmaengine: Add Loongson LS2X APB DMA controller 2023-12-21T16:05:13+00:00 Binbin Zhou zhoubinbin@loongson.cn 2023-12-18T01:56:38+00:00 3b3b5339cdc67e98817d08431f8443b08880084f Add Loongson LS2X APB DMA controller binding with DT schema format using json-schema. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Link: https://lore.kernel.org/r/078307641077edaf46dd986c6d31cea15545a208.1702365725.git.zhoubinbin@loongson.cn Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Add Loongson LS2X APB DMA controller binding with DT schema
format using json-schema.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
Link: https://lore.kernel.org/r/078307641077edaf46dd986c6d31cea15545a208.1702365725.git.zhoubinbin@loongson.cn
Signed-off-by: Vinod Koul <vkoul@kernel.org>
dt-bindings: dma: Add dma-channel-mask to nvidia,tegra210-adma 2023-12-11T12:14:18+00:00 Mohan Kumar mkumard@nvidia.com 2023-11-28T07:16:14+00:00 d95fcb78e7f263f909ce492c3882a704067dc534 Add dma-channel-mask binding doc support to nvidia,tegra210-adma to reserve the adma channel usage Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mohan Kumar <mkumard@nvidia.com> Link: https://lore.kernel.org/r/20231128071615.31447-2-mkumard@nvidia.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Add dma-channel-mask binding doc support to nvidia,tegra210-adma
to reserve the adma channel usage

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Link: https://lore.kernel.org/r/20231128071615.31447-2-mkumard@nvidia.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
dt-bindings: dma: sf-pdma: add new compatible name 2023-12-11T11:03:22+00:00 Shravan Chippa shravan.chippa@microchip.com 2023-12-08T10:38:54+00:00 72b22006ba78c2e3bf39b486a7b8155dc9020133 Add new compatible name microchip,mpfs-pdma to support out of order dma transfers Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com> Link: https://lore.kernel.org/r/20231208103856.3732998-3-shravan.chippa@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Add new compatible name microchip,mpfs-pdma to support
out of order dma transfers

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
Link: https://lore.kernel.org/r/20231208103856.3732998-3-shravan.chippa@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
dt-bindings: dma: Drop undocumented examples 2023-12-11T06:30:54+00:00 Rob Herring robh@kernel.org 2023-11-22T23:50:50+00:00 4a8ececbb50f0dd9395ffc4188ae780916df4a9c The compatibles "ti,omap-sdma" and "ti,dra7-dma-crossbar" aren't documented by a schema which causes warnings: Documentation/devicetree/bindings/dma/dma-controller.example.dtb: /example-0/dma-controller@48000000: failed to match any schema with compatible: ['ti,omap-sdma'] Documentation/devicetree/bindings/dma/dma-router.example.dtb: /example-0/dma-router@4a002b78: failed to match any schema with compatible: ['ti,dra7-dma-crossbar'] As no one has cared to fix them, just drop them. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231122235050.2966280-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org> 
The compatibles "ti,omap-sdma" and "ti,dra7-dma-crossbar" aren't documented
by a schema which causes warnings:

Documentation/devicetree/bindings/dma/dma-controller.example.dtb: /example-0/dma-controller@48000000: failed to match any schema with compatible: ['ti,omap-sdma']
Documentation/devicetree/bindings/dma/dma-router.example.dtb: /example-0/dma-router@4a002b78: failed to match any schema with compatible: ['ti,dra7-dma-crossbar']

As no one has cared to fix them, just drop them.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231122235050.2966280-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
dt-bindings: dma: qcom,gpi: document the SM8650 GPI DMA Engine 2023-11-24T13:26:40+00:00 Neil Armstrong neil.armstrong@linaro.org 2023-10-25T08:23:04+00:00 375ff42c4c9825c19a53b9095ae4b3337cc83442 Document the GPI DMA Engine on the SM8650 Platform. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231025-topic-sm8650-upstream-bindings-gpi-v2-1-4de85293d730@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Document the GPI DMA Engine on the SM8650 Platform.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231025-topic-sm8650-upstream-bindings-gpi-v2-1-4de85293d730@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
dt-bindings: dma: rz-dmac: Document RZ/Five SoC 2023-11-24T12:49:12+00:00 Lad Prabhakar prabhakar.mahadev-lad.rj@bp.renesas.com 2023-11-02T20:39:22+00:00 56d02cfa3fbfca7466ccd68f4db78b0297f5c01f The DMAC block on the RZ/Five SoC is identical to one found on the RZ/G2UL SoC. "renesas,r9a07g043-dmac" compatible string will be used on the RZ/Five SoC so to make this clear, update the comment to include RZ/Five SoC. No driver changes are required as generic compatible string "renesas,rz-dmac" will be used as a fallback on RZ/Five SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20231102203922.548353-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
The DMAC block on the RZ/Five SoC is identical to one found on the RZ/G2UL
SoC. "renesas,r9a07g043-dmac" compatible string will be used on the
RZ/Five SoC so to make this clear, update the comment to include RZ/Five
SoC.

No driver changes are required as generic compatible string
"renesas,rz-dmac" will be used as a fallback on RZ/Five SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231102203922.548353-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
dt-bindings: dma: qcom: gpi: add compatible for X1E80100 2023-11-24T12:13:47+00:00 Sibi Sankar quic_sibis@quicinc.com 2023-11-24T10:06:06+00:00 66fb6eb6fab63ee80fd26cd5bdd9164aead0d207 The Qualcomm X1E80100 uses GPI DMA for its GENI interface. Add a compatible string for it in the documentation by using the SM6350 as fallback. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231124100608.29964-4-quic_sibis@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
The Qualcomm X1E80100 uses GPI DMA for its GENI interface. Add a compatible
string for it in the documentation by using the SM6350 as fallback.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231124100608.29964-4-quic_sibis@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
dt-bindings: dma: ti: k3-udma: Describe cfg register regions 2023-11-24T08:42:37+00:00 Vignesh Raghavendra vigneshr@ti.com 2023-11-24T04:57:22+00:00 d7aaccd3beb1ec34b04b13fa236f50efb77c8d6c Unified DMA (UDMA) module on K3 SoCs have TX and RX channel cfg and RX flow cfg register regions which are usually configured by a Device Management firmware. But certain entities such as bootloader (like U-Boot) may have to access them directly. Describe this region in the binding documentation for completeness of module description. Keep the binding compatible with existing DTS files by requiring first four regions to be present at least. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231124045722.191817-5-vigneshr@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Unified DMA (UDMA) module on K3 SoCs have TX and RX channel cfg and RX
flow cfg register regions which are usually configured by a Device
Management firmware. But certain entities such as bootloader (like
U-Boot) may have to access them directly. Describe this region in the
binding documentation for completeness of module description.

Keep the binding compatible with existing DTS files by requiring first
four regions to be present at least.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231124045722.191817-5-vigneshr@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
dt-bindings: dma: ti: k3-pktdma: Describe cfg register regions 2023-11-24T08:42:37+00:00 Vignesh Raghavendra vigneshr@ti.com 2023-11-24T04:57:21+00:00 8d75e0e5eed23e4f8ced5eacae3255e498a1c304 Packet DMA (PKTDMA) module on K3 SoCs have ring cfg, TX and RX channel cfg and RX flow cfg register regions which are usually configured by a Device Management firmware. But certain entities such as bootloader (like U-Boot) may have to access them directly. Describe this region in the binding documentation for completeness of module description. Keep the binding compatible with existing DTS files by requiring first four regions to be present at least. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231124045722.191817-4-vigneshr@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Packet DMA (PKTDMA) module on K3 SoCs have ring cfg, TX and RX channel
cfg and RX flow cfg register regions which are usually configured by a
Device Management firmware. But certain entities such as bootloader
(like U-Boot) may have to access them directly. Describe this region in
the binding documentation for completeness of module description.

Keep the binding compatible with existing DTS files by requiring first
four regions to be present at least.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231124045722.191817-4-vigneshr@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
dt-bindings: dma: ti: k3-bcdma: Describe cfg register regions 2023-11-24T08:42:37+00:00 Vignesh Raghavendra vigneshr@ti.com 2023-11-24T04:57:20+00:00 f04470678132c2d044b92befab39a933ac4d106c Block copy DMA(BCDMA)module on K3 SoCs have ring, BCHAN, TX and RX channel cfg register regions which are usually configured by a Device Management firmware. But certain entities such as bootloader (like U-Boot) may have to access them directly. Describe this region in the binding documentation for completeness of module description. Keep the binding compatible with existing DTS files by requiring first five regions to be present at least. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231124045722.191817-3-vigneshr@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Block copy DMA(BCDMA)module on K3 SoCs have ring, BCHAN, TX and RX
channel cfg register regions which are usually configured by a Device
Management firmware. But certain entities such as bootloader (like
U-Boot) may have to access them directly. Describe this region in the
binding documentation for completeness of module description.

Keep the binding compatible with existing DTS files by requiring first
five regions to be present at least.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231124045722.191817-3-vigneshr@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>