Pull mtd updates from Miquel Raynal:
 "MTD changes:

   - Apart from a binding conversion to yaml, only minor changes/small
     fixes have been merged.

  Raw NAND changes:

   - Minor fixes for various controller drivers like DMA mapping checks,
     better timing derivations or bitflip statistics.

   - some Hynix NAND flashes were not supporting read-retries, so don't
     even try to do it

  SPI NAND changes:

   - In order to support high-speed modes, certain chips need extra
     configuration like adding more dummy cycles. This is now possible,
     especially on Winbond chips.

   - Aside from that, Gigadevice gets support for a new chip (GD5F1GM9).

  SPI NOR changes:

   - A notable changes is the fix for exiting 4-byte addressing on
     Infineon SEMPER flashes. These flashes do not support the standard
     EX4B opcode (E9h), and use a vendor-specific opcode (B8h) instead.

   - There is also a fix for unlocking flashes that are write-protected
     at power-on. This was caused by using an uninitialized mtd_info in
     spi_nor_try_unlock_all()"

* tag 'mtd/for-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (26 commits)
  mtd: spinand: winbond: Add comment about the maximum frequency
  mtd: spinand: winbond: Enable high-speed modes on w35n0xjw
  mtd: spinand: winbond: Enable high-speed modes on w25n0xjw
  mtd: spinand: Add a ->configure_chip() hook
  mtd: spinand: Add a frequency field to all READ_FROM_CACHE variants
  mtd: spinand: Fix macro alignment
  spi: spi-mem: Take into account the actual maximum frequency
  spi: spi-mem: Use picoseconds for calculating the op durations
  mtd: rawnand: atmel: set pmecc data setup time
  mtd: spinand: propagate spinand_wait() errors from spinand_write_page()
  mtd: rawnand: fsmc: Add missing check after DMA map
  mtd: rawnand: rockchip: Add missing check after DMA map
  mtd: rawnand: hynix: don't try read-retry on SLC NANDs
  mtd: rawnand: atmel: Fix dma_mapping_error() address
  mtd: nand: brcmnand: fix mtd corrected bits stat
  mtd: rawnand: renesas: Add missing check after DMA map
  mtd: spinand: gigadevice: Add support for GD5F1GM9 chips
  mtd: nand: brcmnand: replace manual string choices with standard helpers
  mtd: map: Don't use "proxy" headers
  mtd: spi-nor: Fix spi_nor_try_unlock_all()
  ...

SPI NOR changes for 6.17

Notable changes:

- Fix exiting 4-byte addressing on Infineon SEMPER flashes. These
  flashes do not support the standard EX4B opcode (E9h), and use a
  vendor-specific opcode (B8h) instead.

- Fix unlocking of flashes that are write-protected at power-on. This
  was caused by using an uninitialized mtd_info in
  spi_nor_try_unlock_all().

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

DTS example in the bindings should be indented with 2- or 4-spaces and
aligned with opening '- |', so correct any differences like 3-spaces or
mixtures 2- and 4-spaces in one binding.

No functional changes here, but saves some comments during reviews of
new patches built on existing code.

Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # For MMC
Acked-by: Lee Jones <lee@kernel.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> # renesas
Link: https://lore.kernel.org/r/20250107131456.247610-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250725100241.120106-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>

Add atmel,at26* compatible string to fix below CHECK_DTB warning:

arch/arm/boot/dts/nxp/vf/vf610-twr.dtb: /soc/bus@40000000/spi@4002c000/at26df081a@0:
    failed to match any schema with compatible: ['atmel,at26df081a']

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Pratyush Yadav <pratyush@kernel.org>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Link: https://lore.kernel.org/r/20250523155258.546003-1-Frank.Li@nxp.com

Convert nxp-spifi.txt to yaml format.

Additional changes:
- ref /schemas/spi/spi-controller.yaml.
- remove label in example.
- change node name to spi in example.
- remove child node in example.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

The SPI NAND subsystem has seen the introduction of DTR operations (the
equivalent of DDR transfers), which involved quite a few preparation
patches for clarifying macro names.

In the raw NAND subsystem, the brcmnand driver has been "fixed" for old
legacy SoCs with an update of the ->exec_op() hook, there has been the
introduction of a new controller driver named Loongson-1, and the
Qualcomm driver has received quite a few misc fixes as well as a new
compatible.

Aside from this, there is the usual load of misc improvement and fixes.

Add new compatible for the QPIC NAND controller v2.1.1 used for SDX75 SoC.

SDX75 NAND controller has iommu support so define it in the properties
section.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

Convert binding doc vf610-nfc to yaml format.

Additional changes:
- ref to nand-controller.yaml.
- include arm-gic.h and vf610-clock.h in examples.
- add clocks and clock-names description.
- remove #address-cells, #size-cells assigned-clocks and
assigned-clock-rates.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

Add devicetree binding document for Loongson-1 NAND controller.

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

Pull mtd updates from Miquel Raynal:
 "MTD changes:

   - The atmel,dataflash binding has been converted to yaml and the
     physmap one constrained. Some logs are improved, error path are
     getting reworked a bit, few patches target the use of
     str_enabled_disabled().

  Raw NAND changes:

   - i.MX8 and i.MX31 now have their own compatible, the Qcom driver got
     cleaned, the Broadcom driver got fixed.

  SPI NAND changes:

     - OTP support has been brought, and ESMT and Micron manufacturer
       drivers implement it.

     - Read retry, and Macronix manufacturer driver implement it.

  SPI NOR changes:

   - Adding support for few flashes. Few cleanup patches for the core
     driver, where we touched the headers inclusion list and we start
     using the scope based mutex cleanup helpers.

  There is also a bunch of minor improvements and fixes in drivers
  and bindings"

* tag 'mtd/for-6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (34 commits)
  dt-bindings: mtd: atmel,dataflash: convert txt to yaml
  mtd: mchp48l640: Use str_enable_disable() in mchp48l640_write_prepare()
  mtd: rawnand: gpmi: Use str_enabled_disabled() in gpmi_nand_attach_chip()
  mtd: mtdpart: Do not supply NULL to printf()
  dt-bindings: mtd: gpmi-nand: Add compatible string for i.MX8 chips
  mtd: nand: Fix a kdoc comment
  mtd: spinand: Improve spinand_info macros style
  mtd: spi-nor: drop unused <linux/of_platform.h>
  mtd: spi-nor: explicitly include <linux/of.h>
  mtd: spi-nor: explicitly include <linux/math64.h>
  mtd: spi-nor: macronix: add support for mx66{l2, u1}g45g
  mtd: spi-nor: macronix: Add post_sfdp fixups for Quad Input Page Program
  mtd: Fix error handling in mtd_device_parse_register() error path
  mtd: capture device name setting failure when adding mtd
  mtd: Add check for devm_kcalloc()
  mtd: Replace kcalloc() with devm_kcalloc()
  dt-bindings: mtd: physmap: Ensure all properties are defined
  mtd: rawnand: brcmnand: fix PM resume warning
  dt-bindings: mtd: mxc-nand: Document fsl,imx31-nand
  mtd: spinand: macronix: Add support for read retry
  ...