linux-toradex.git/Documentation/devicetree/bindings/sram, branch v4.10 Linux kernel for Apalis and Colibri modules misc: sram: document new compatible 2016-11-07T22:43:28+00:00 Alexandre Belloni alexandre.belloni@free-electrons.com 2016-09-21T22:09:37+00:00 15adffadc59b0430a5e411eb149c39547fc207ce Add atmel,sama5d2-securam to the compatible list. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> 
Add atmel,sama5d2-securam to the compatible list.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
misc: sram: DT spelling s/#adress-cells/#address-cells/ 2016-04-25T13:38:44+00:00 Geert Uytterhoeven geert+renesas@glider.be 2016-04-20T15:32:15+00:00 2366b80f9122ab5100ad738f726a3c7539c1d1df Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Rob Herring <robh@kernel.org> 
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
misc: sram: add optional ioremap without write combining 2016-03-14T16:19:45+00:00 Marcin Wojtas mw@semihalf.com 2016-03-14T08:38:56+00:00 eb43e023130b5021c1ffad4d5c84cb310ffcb0f6 Some SRAM users may require non-bufferable access to the memory, which is impossible, because devm_ioremap_wc() is used for setting sram->virt_base. This commit adds optional flag 'no-memory-wc', which allow to choose remap method, using DT property. Documentation is updated accordingly. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: David S. Miller <davem@davemloft.net> 
Some SRAM users may require non-bufferable access to the memory, which is
impossible, because devm_ioremap_wc() is used for setting sram->virt_base.

This commit adds optional flag 'no-memory-wc', which allow to choose remap
method, using DT property. Documentation is updated accordingly.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
dt-bindings: Consolidate SRAM bindings from all vendors 2015-12-09T21:29:37+00:00 Krzysztof Kozlowski k.kozlowski@samsung.com 2015-11-19T00:42:49+00:00 22697acdd72d6749d603cb861d4f6c1c2b583c1b SRAM bindings for various SoCs, using the mmio-sram genalloc API, are spread over different places - per SoC vendor. Since all of these are quite similar (they depend on mmio-sram) move them to a common place. Suggested-by: Rob Herring <robh+dt@kernel.org> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Kukjin Kim <kgene@kernel.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Rob Herring <robh@kernel.org> 
SRAM bindings for various SoCs, using the mmio-sram genalloc
API, are spread over different places - per SoC vendor. Since all of
these are quite similar (they depend on mmio-sram) move them to a common
place.

Suggested-by: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Kukjin Kim <kgene@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Rob Herring <robh@kernel.org>