linux-toradex.git/Documentation/devicetree, branch v4.4.93

iio: adc: hx711: Add DT binding for avia,hx711

2017-10-08T08:14:17+00:00

[ Upstream commit ff1293f67734da68e23fecb6ecdae7112b8c43f9 ]

Add DT bindings for avia,hx711
Add vendor avia to vendor list

Signed-off-by: Andreas Klinger 
Acked-by: Rob Herring 
Signed-off-by: Jonathan Cameron 
Signed-off-by: Sasha Levin 
Signed-off-by: Greg Kroah-Hartman

drm: bridge: add DT bindings for TI ths8135

2017-10-08T08:14:16+00:00

[ Upstream commit 2e644be30fcc08c736f66b60f4898d274d4873ab ]

THS8135 is a configurable video DAC. Add DT bindings for this chip.

Signed-off-by: Bartosz Golaszewski 
Reviewed-by: Laurent Pinchart 
Acked-by: Rob Herring 
Signed-off-by: Archit Taneja 
Link: http://patchwork.freedesktop.org/patch/msgid/1481623759-12786-3-git-send-email-bgolaszewski@baylibre.com
Signed-off-by: Sasha Levin 
Signed-off-by: Greg Kroah-Hartman

clk: sunxi: Add apb0 gates for H3

2017-05-03T04:19:47+00:00

commit 6e17b4181603d183d20c73f4535529ddf2a2a020 upstream.

This patch adds support for APB0 in H3. It seems to be compatible with
earlier SOCs. apb0 gates controls R_ block peripherals (R_PIO, R_IR,
etc).

Since this gates behave just like any Allwinner clock gate, add a generic
compatible that can be reused if we don't have any clock to protect.

Signed-off-by: Krzysztof Adamski 
[Maxime: Removed the H3 compatible from the simple-gates driver, reworked
         the commit log a bit]
Signed-off-by: Maxime Ripard 
Cc: Julia Lawall 
Signed-off-by: Greg Kroah-Hartman

ARM: dts: imx31: fix clock control module interrupts description

2017-01-26T07:23:47+00:00

commit 2e575cbc930901718cc18e084566ecbb9a4b5ebb upstream.

The type of AVIC interrupt controller found on i.MX31 is one-cell,
namely 31 for CCM DVFS and 53 for CCM, however for clock control
module its interrupts are specified as 3-cells, fix it.

Fixes: ef0e4a606fb6 ("ARM: mx31: Replace clk_register_clkdev with clock DT lookup")
Acked-by: Rob Herring 
Signed-off-by: Vladimir Zapolskiy 
Signed-off-by: Shawn Guo 
Signed-off-by: Greg Kroah-Hartman

regulator: qcom_spmi: Update mvs1/mvs2 switches on pm8941

2016-10-07T13:23:43+00:00

commit 93bfe79b03365f410aa91caf04263173c008ecdf upstream.

The mvs1 and mvs2 switches are actually called 5vs1 and 5vs2 on
some datasheets. Let's rename them to match the datasheets and
also match the RPM based regulator driver which calls these by
their 5vs names (see qcom_smd-regulator.c). There aren't any
users of these regulators so far, so there aren't any concerns of
DT ABI breakage here. While we're here making updates to the
switches, also mandate usage of the OCP irq for these switches
too.

Cc: Bjorn Andersson 
Fixes: e92a4047419c ("regulator: Add QCOM SPMI regulator driver")
Signed-off-by: Stephen Boyd 
Signed-off-by: Mark Brown 
Signed-off-by: Greg Kroah-Hartman

regulator: qcom_spmi: Add support for S4 supply on pm8941

2016-10-07T13:23:43+00:00

commit c333dfe8dba7d3e47e97e1cee3c38123e19ae73c upstream.

The S4 supply is sometimes called the boost regulator because it
outputs 5V. Typically it's connected to the 5vs1 and 5vs2
switches for use in USB OTG and HDMI applications. Add support
for this regulator which was mistakenly left out from the initial
submission of this driver.

Cc: Bjorn Andersson 
Fixes: e92a4047419c ("regulator: Add QCOM SPMI regulator driver")
Signed-off-by: Stephen Boyd 
Signed-off-by: Mark Brown 
Signed-off-by: Greg Kroah-Hartman

iio: adc: rockchip_saradc: reset saradc controller before programming it

2016-09-24T08:07:37+00:00

commit 543852af8e5902aee8f7c72c89e1513663e0f696 upstream.

SARADC controller needs to be reset before programming it, otherwise
it will not function properly.

Signed-off-by: Caesar Wang 
Cc: Jonathan Cameron 
Cc: Heiko Stuebner 
Cc: Rob Herring 
Cc: linux-iio@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Tested-by: Guenter Roeck 
Signed-off-by: Jonathan Cameron 
Signed-off-by: Greg Kroah-Hartman

ARM: dts: imx35: restore existing used clock enumeration

2016-06-08T01:14:32+00:00

commit 3397c2c45b1b6f54834dfeae30a73046f33ca943 upstream.

A new element got inserted into enum mx35_clks with commit 3713e3f5e927
("clk: imx35: define two clocks for rtc"). This insertion shifted most
nummerical clock assignments to a new nummerical value which in turn
rendered most hardcoded nummeric values in imx35.dtsi incorrect.

Restore the existing order by moving the newly introduced clock to the
end of the enum. Update the dts documentation accordingly.

Signed-off-by: Alexander Kurz 
Fixes: 3713e3f5e927 ("clk: imx35: define two clocks for rtc")
Signed-off-by: Shawn Guo 
Signed-off-by: Greg Kroah-Hartman

ata: ahci-platform: Add ports-implemented DT bindings.

2016-05-11T09:21:21+00:00

commit 17dcc37e3e847bc0e67a5b1ec52471fcc6c18682 upstream.

On some SOCs PORTS_IMPL register value is never programmed by the
firmware and left at zero value. Which means that no sata ports are
available for software. AHCI driver used to cope up with this by
fabricating the port_map if the PORTS_IMPL register is read zero,
but recent patch broke this workaround as zero value was valid for
NVMe disks.

This patch adds ports-implemented DT bindings as workaround for this issue
in a way that DT can can override the PORTS_IMPL register in cases where
the firmware did not program it already.

Fixes: 566d1827df2e ("libata: disable forced PORTS_IMPL for >= AHCI 1.3")
Signed-off-by: Srinivas Kandagatla 
Acked-by: Tejun Heo 
Reviewed-by: Andy Gross 
Signed-off-by: Tejun Heo 
Signed-off-by: Greg Kroah-Hartman

pinctrl: pistachio: fix mfio84-89 function description and pinmux.

2016-04-20T06:42:08+00:00

commit e9adb336d0bf391be23e820975ca5cd12c31d781 upstream.

mfio 84 to 89 are described wrongly, fix it to describe
the right pin and add them to right pin-mux group.

The correct order is:
	pll1_lock => mips_pll	-- MFIO_83
	pll2_lock => audio_pll	-- MFIO_84
	pll3_lock => rpu_v_pll	-- MFIO_85
	pll4_lock => rpu_l_pll	-- MFIO_86
	pll5_lock => sys_pll	-- MFIO_87
	pll6_lock => wifi_pll	-- MFIO_88
	pll7_lock => bt_pll	-- MFIO_89

Cc: linux-gpio@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: James Hartley 
Fixes: cefc03e5995e("pinctrl: Add Pistachio SoC pin control driver")
Signed-off-by: Govindraj Raja 
Acked-by: Andrew Bresticker 
Acked-by: Rob Herring 
Signed-off-by: Linus Walleij 
Signed-off-by: Greg Kroah-Hartman