linux-toradex.git/Documentation/memory-barriers.txt, branch v3.19.1

arch: Add lightweight memory barriers dma_rmb() and dma_wmb()

2014-12-12T02:15:06+00:00

There are a number of situations where the mandatory barriers rmb() and
wmb() are used to order memory/memory operations in the device drivers
and those barriers are much heavier than they actually need to be.  For
example in the case of PowerPC wmb() calls the heavy-weight sync
instruction when for coherent memory operations all that is really needed
is an lsync or eieio instruction.

This commit adds a coherent only version of the mandatory memory barriers
rmb() and wmb().  In most cases this should result in the barrier being the
same as the SMP barriers for the SMP case, however in some cases we use a
barrier that is somewhere in between rmb() and smp_rmb().  For example on
ARM the rmb barriers break down as follows:

  Barrier   Call     Explanation
  --------- -------- ----------------------------------
  rmb()     dsb()    Data synchronization barrier - system
  dma_rmb() dmb(osh) data memory barrier - outer sharable
  smp_rmb() dmb(ish) data memory barrier - inner sharable

These new barriers are not as safe as the standard rmb() and wmb().
Specifically they do not guarantee ordering between coherent and incoherent
memories.  The primary use case for these would be to enforce ordering of
reads and writes when accessing coherent memory that is shared between the
CPU and a device.

It may also be noted that there is no dma_mb().  Most architectures don't
provide a good mechanism for performing a coherent only full barrier without
resorting to the same mechanism used in mb().  As such there isn't much to
be gained in trying to define such a function.

Cc: Frederic Weisbecker 
Cc: Mathieu Desnoyers 
Cc: Michael Ellerman 
Cc: Michael Neuling 
Cc: Russell King 
Cc: Geert Uytterhoeven 
Cc: Heiko Carstens 
Cc: Linus Torvalds 
Cc: Martin Schwidefsky 
Cc: Tony Luck 
Cc: Oleg Nesterov 
Cc: "Paul E. McKenney" 
Cc: Peter Zijlstra 
Cc: Ingo Molnar 
Cc: David Miller 
Acked-by: Benjamin Herrenschmidt 
Acked-by: Will Deacon 
Signed-off-by: Alexander Duyck 
Signed-off-by: David S. Miller

Merge branch 'core-rcu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

2014-12-10T04:23:19+00:00

Pull RCU updates from Ingo Molnar:
 "These are the main changes in this cycle:

    - Streamline RCU's use of per-CPU variables, shifting from "cpu"
      arguments to functions to "this_"-style per-CPU variable
      accessors.

    - signal-handling RCU updates.

    - real-time updates.

    - torture-test updates.

    - miscellaneous fixes.

    - documentation updates"

* 'core-rcu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (34 commits)
  rcu: Fix FIXME in rcu_tasks_kthread()
  rcu: More info about potential deadlocks with rcu_read_unlock()
  rcu: Optimize cond_resched_rcu_qs()
  rcu: Add sparse check for RCU_INIT_POINTER()
  documentation: memory-barriers.txt: Correct example for reorderings
  documentation: Add atomic_long_t to atomic_ops.txt
  documentation: Additional restriction for control dependencies
  documentation: Document RCU self test boot params
  rcutorture: Fix rcu_torture_cbflood() memory leak
  rcutorture: Remove obsolete kversion param in kvm.sh
  rcutorture: Remove stale test configurations
  rcutorture: Enable RCU self test in configs
  rcutorture: Add early boot self tests
  torture: Run Linux-kernel binary out of results directory
  cpu: Avoid puts_pending overflow
  rcu: Remove "cpu" argument to rcu_cleanup_after_idle()
  rcu: Remove "cpu" argument to rcu_prepare_for_idle()
  rcu: Remove "cpu" argument to rcu_needs_cpu()
  rcu: Remove "cpu" argument to rcu_note_context_switch()
  rcu: Remove "cpu" argument to rcu_preempt_check_callbacks()
  ...

documentation: memory-barriers.txt: Correct example for reorderings

2014-11-13T18:34:55+00:00

Correct the example of memory orderings in memory-barriers.txt

Commit 615cc2c9cf95 "Documentation/memory-barriers.txt: fix important typo re
memory barriers" changed the assignment to x and y. Change the rest of the
example to match this change.

Reported-by: Ganesh Rapolu 
Signed-off-by: Pranith Kumar 
Signed-off-by: Paul E. McKenney

documentation: Additional restriction for control dependencies

2014-11-13T18:34:53+00:00

Short-circuit booleans are not defences against compilers breaking
your intended control dependencies.

Signed-off-by: Paul E. McKenney 
Reviewed-by: Pranith Kumar

documentation: memory-barriers: clarify relaxed io accessor semantics

2014-10-20T17:49:18+00:00

This patch extends the paragraph describing the relaxed read io accessors
so that the relaxed accessors are defined to be:

 - Ordered with respect to each other if accessing the same peripheral

 - Unordered with respect to normal memory accesses

 - Unordered with respect to LOCK/UNLOCK operations

Whilst many architectures will provide stricter semantics, ARM, Alpha and
PPC can achieve significant performance gains by taking advantage of some
or all of the above relaxations.

Cc: Randy Dunlap 
Cc: Benjamin Herrenschmidt 
Cc: Paul E. McKenney 
Cc: David Howells 
Signed-off-by: Will Deacon

memory-barriers: Fix description of 2-legged-if-based control dependencies

2014-09-07T23:15:53+00:00

Sad to say, current compilers really will hoist identical stores from both
branches of an "if" statement to precede the conditional.  This commit
therefore updates the description of control dependencies to reflect this
ugly reality.

Reported-by: Pranith Kumar 
Reported-by: Peter Zijlstra 
Signed-off-by: Paul E. McKenney

memory-barriers: Retain barrier() in fold-to-zero example

2014-09-07T23:15:52+00:00

The transformation in the fold-to-zero example incorrectly omits the
barrier() directive.  This commit therefore adds it back in.

Reported-by: Pranith Kumar 
Signed-off-by: Paul E. McKenney

memory-barriers: Fix control-ordering no-transitivity example

2014-09-07T23:15:41+00:00

The control-ordering example demonstrating lack of transitivity had
multiple problems.  This commit fixes them.

Reported-by: Nikolay Samofatov 
Signed-off-by: Paul E. McKenney 
Reviewed-by: Pranith Kumar

documentation: Add acquire/release barriers to pairing rules

2014-07-08T15:32:51+00:00

It is possible to pair acquire and release barriers with other barriers,
so this commit adds them to the list in the SMP barrier pairing section.

Reported-by: Lai Jiangshan 
Signed-off-by: Paul E. McKenney 
Reviewed-by: Tejun Heo 
Reviewed-by: Josh Triplett 
[ paulmck: Updated pairing discussion as suggested by Peter Zijlstra. ]

documentation: Clarify wake-up/memory-barrier relationship

2014-07-08T15:13:03+00:00

This commit adds an example demonstrating that if a wake_up() doesn't
actually wake something up, no memory ordering is provided.

Reported-by: Peter Zijlstra 
Signed-off-by: Paul E. McKenney 
Reviewed-by: Josh Triplett 
Reviewed-by: Lai Jiangshan 
Acked-by: Peter Zijlstra