linux-toradex.git/Documentation/trace/hisi-ptt.rst, branch master

perf hisi-ptt: Fix PTT trace TLP header parsing

2026-07-31T22:48:12+00:00

TLP Headers traced by HiSilicon PCIe tune and trace device (PTT) in
4DW format are shown in the document as below:
bits [31:30] [ 29:25 ][24][23][22][21][    20:11   ][    10:0    ]
     |-----|---------|---|---|---|---|-------------|-------------|
DW0  [ Fmt ][  Type  ][T9][T8][TH][SO][   Length   ][    Time    ]
DW1  [                     Header DW1                            ]
DW2  [                     Header DW2                            ]
DW3  [                     Header DW3                            ]

Problem:
The DW0 bit field layout of the hisi_ptt_4dw union does not match the
actual bit ordering in little-endian memory, causing incorrect field
decoding.

Test on Kunpeng 930 SOC, generating data flow with `iperf` commands:
- server side:
    iperf -s
- client side:
    iperf -c $ip_addr -t 30

Trace the TLP headers with hisi_ptt on server side at the same time:
  perf record -e hisi_ptt12_0/type=4,filter=0x05101,direction=2,format=0/ \
  --max-size 50M -o perf.data &
The trace aims to capture completion TLPs, learn more in the document:
  https://docs.kernel.org/trace/hisi-ptt.html

Decode perf.data with hisi_ptt decoder:
  perf report -D

The hisi_ptt decoder produces the following result:
[...perf headers and other information]
. ... HISI PTT data: size 8388608 bytes
.  00000000: 68 87 20 94                                 Format 3 Type 1a T9 0 T8 1 TH 1 SO 1 Length 10 Time 4a1
.  00000004: 40 00 00 00                                 Header DW1
.  00000008: 40 00 01 51                                 Header DW2
.  0000000c: 00 00 00 00                                 Header DW3
[...other hisi_ptt TLP headers]

According to PCIe r5.0 sec 2.2.1, the Fmt & Type of Cpl/CplD is supposed
to be 8b'00001010' / 8b'01001010'
However, the Format & Type decoder analyzing result is 8b'01111010'.
It does not match field encodings of any TLP.

Correct decoder result should be:
[...perf headers and other information]
. ... HISI PTT data: size 8388608 bytes
.  00000000: 94 20 87 68                                 Format 2 Type a T9 0 T8 0 TH 0 SO 1 Length 10 Time 768
.  00000004: 00 00 00 40                                 Header DW1
.  00000008: 51 01 00 40                                 Header DW2
.  0000000c: 00 00 00 00                                 Header DW3
[...other hisi_ptt TLP headers]

To solve the problem:
1. Drop the union and C bitfield struct, store the raw DW value in
a plain uint32_t, and extract the fields with FIELD_GET() against
GENMASK/BIT masks declared in the header so they can be reused by
other translation units. The masks are portable across endianness and
compilers.

2. Print all DW hex values in big-endian byte order for readability,
matching the bit field layout shown in the 4DW format diagram.

3. Read the DW value with get_unaligned_le32() instead of an unaligned
pointer cast, avoiding both strict-aliasing violations and
alignment hazards on hosts that do not support unaligned access.

Cc: stable@vger.kernel.org
Fixes: 5e91e57e6809 ("perf auxtrace arm64: Add support for parsing HiSilicon PCIe Trace packet")
Reviewed-by: James Clark 
Signed-off-by: Sizhe Liu 
Signed-off-by: Namhyung Kim

Documentation: ABI + trace: hisi_ptt: update paths to bus/event_source

2024-05-02T10:36:11+00:00

To allow for assigning a suitable parent to the struct pmu device
update the documentation to describe the device via the event_source
bus where it will remain accessible.

For the ABI documention file also rename the file as it is named
after the path.

Reviewed-by: Yicong Yang 
Signed-off-by: Jonathan Cameron 
Signed-off-by: Suzuki K Poulose 
Link: https://lore.kernel.org/r/20240412161057.14099-30-Jonathan.Cameron@huawei.com

hwtracing: hisi_ptt: Export available filters through sysfs

2023-06-21T10:52:09+00:00

The PTT can only filter the traced TLP headers by the Root Ports or the
Requester ID of the Endpoint, which are located on the same PCIe core of
the PTT device. The filter value used is derived from the BDF number of
the supported Root Port or the Endpoint. It's not friendly enough for the
users since it requires the user to be familiar enough with the platform
and calculate the filter value manually.

This patch export the available filters through sysfs. Each available
filters is presented as an individual file with the name of the BDF
number of the related PCIe device. The files are created under
$(PTT PMU dir)/available_root_port_filters and
$(PTT PMU dir)/available_requester_filters respectively. The filter
value can be known by reading the related file.

Then the users can easily know the available filters for trace and get
the filter values without calculating.

Reviewed-by: Jonathan Cameron 
Signed-off-by: Yicong Yang 
Signed-off-by: Suzuki K Poulose 
Link: https://lore.kernel.org/r/20230621092804.15120-4-yangyicong@huawei.com

hwtracing: hisi_ptt: Add support for dynamically updating the filter list

2023-06-21T10:52:08+00:00

The PCIe devices supported by the PTT trace can be removed/rescanned by
hotplug or through sysfs.  Add support for dynamically updating the
available filter list by registering a PCI bus notifier block. Then user
can always get latest information about available tracing filters and
driver can block the invalid filters of which related devices no longer
exist in the system.

Reviewed-by: Jonathan Cameron 
Signed-off-by: Yicong Yang 
Signed-off-by: Suzuki K Poulose 
Link: https://lore.kernel.org/r/20230621092804.15120-3-yangyicong@huawei.com

docs: trace: Add HiSilicon PTT device driver documentation

2022-09-09T00:41:22+00:00

Document the introduction and usage of HiSilicon PTT device driver as well
as the sysfs attributes description provided by the driver.

Signed-off-by: Yicong Yang 
Reviewed-by: Jonathan Cameron 
Reviewed-by: Bagas Sanjaya 
[Fixed month and kernel version]
Link: https://lore.kernel.org/r/20220816114414.4092-5-yangyicong@huawei.com
Signed-off-by: Mathieu Poirier