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<title>linux-toradex.git/Documentation/xtensa, branch v3.13-rc1</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>xtensa: document MMUv3 setup sequence</title>
<updated>2013-05-09T08:07:09+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2013-03-04T19:48:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=93e294ac99cc005044ab6357a26998eb962a10e8'/>
<id>93e294ac99cc005044ab6357a26998eb962a10e8</id>
<content type='text'>
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>xtensa: initialize atomctl SR</title>
<updated>2012-12-19T05:10:22+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2012-11-19T03:00:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c622b29d1f38021411965b7e0170ab055551b257'/>
<id>c622b29d1f38021411965b7e0170ab055551b257</id>
<content type='text'>
In order to use S32C1I instruction on cores with ATOMCTL SR the register
must be properly initialized.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In order to use S32C1I instruction on cores with ATOMCTL SR the register
must be properly initialized.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</pre>
</div>
</content>
</entry>
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