<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/alpha/kernel, branch v3.14.57</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>alpha: Enable system-call auditing support.</title>
<updated>2014-01-31T17:21:55+00:00</updated>
<author>
<name>蔡正龙</name>
<email>zhenglong.cai@cs2c.com.cn</email>
</author>
<published>2013-12-20T02:04:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a9302e8439445710552886e7b623dbcfa943a1f2'/>
<id>a9302e8439445710552886e7b623dbcfa943a1f2</id>
<content type='text'>
Signed-off-by: Zhenglong.cai &lt;zhenglong.cai@cs2c.com.cn&gt;
Signed-off-by: Matt Turner &lt;mattst88@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Zhenglong.cai &lt;zhenglong.cai@cs2c.com.cn&gt;
Signed-off-by: Matt Turner &lt;mattst88@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/resource' into next</title>
<updated>2014-01-10T21:23:15+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2014-01-10T21:23:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=96702be560374ee7e7139a34cab03554129abbb4'/>
<id>96702be560374ee7e7139a34cab03554129abbb4</id>
<content type='text'>
* pci/resource:
  PCI: Allocate 64-bit BARs above 4G when possible
  PCI: Enforce bus address limits in resource allocation
  PCI: Split out bridge window override of minimum allocation address
  agp/ati: Use PCI_COMMAND instead of hard-coded 4
  agp/intel: Use CPU physical address, not bus address, for ioremap()
  agp/intel: Use pci_bus_address() to get GTTADR bus address
  agp/intel: Use pci_bus_address() to get MMADR bus address
  agp/intel: Support 64-bit GMADR
  agp/intel: Rename gtt_bus_addr to gtt_phys_addr
  drm/i915: Rename gtt_bus_addr to gtt_phys_addr
  agp: Use pci_resource_start() to get CPU physical address for BAR
  agp: Support 64-bit APBASE
  PCI: Add pci_bus_address() to get bus address of a BAR
  PCI: Convert pcibios_resource_to_bus() to take a pci_bus, not a pci_dev
  PCI: Change pci_bus_region addresses to dma_addr_t
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* pci/resource:
  PCI: Allocate 64-bit BARs above 4G when possible
  PCI: Enforce bus address limits in resource allocation
  PCI: Split out bridge window override of minimum allocation address
  agp/ati: Use PCI_COMMAND instead of hard-coded 4
  agp/intel: Use CPU physical address, not bus address, for ioremap()
  agp/intel: Use pci_bus_address() to get GTTADR bus address
  agp/intel: Use pci_bus_address() to get MMADR bus address
  agp/intel: Support 64-bit GMADR
  agp/intel: Rename gtt_bus_addr to gtt_phys_addr
  drm/i915: Rename gtt_bus_addr to gtt_phys_addr
  agp: Use pci_resource_start() to get CPU physical address for BAR
  agp: Support 64-bit APBASE
  PCI: Add pci_bus_address() to get bus address of a BAR
  PCI: Convert pcibios_resource_to_bus() to take a pci_bus, not a pci_dev
  PCI: Change pci_bus_region addresses to dma_addr_t
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Convert pcibios_resource_to_bus() to take a pci_bus, not a pci_dev</title>
<updated>2013-12-21T17:06:10+00:00</updated>
<author>
<name>Yinghai Lu</name>
<email>yinghai@kernel.org</email>
</author>
<published>2013-12-10T06:54:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=fc2798502f860b18f3c7121e4dc659d3d9d28d74'/>
<id>fc2798502f860b18f3c7121e4dc659d3d9d28d74</id>
<content type='text'>
These interfaces:

  pcibios_resource_to_bus(struct pci_dev *dev, *bus_region, *resource)
  pcibios_bus_to_resource(struct pci_dev *dev, *resource, *bus_region)

took a pci_dev, but they really depend only on the pci_bus.  And we want to
use them in resource allocation paths where we have the bus but not a
device, so this patch converts them to take the pci_bus instead of the
pci_dev:

  pcibios_resource_to_bus(struct pci_bus *bus, *bus_region, *resource)
  pcibios_bus_to_resource(struct pci_bus *bus, *resource, *bus_region)

In fact, with standard PCI-PCI bridges, they only depend on the host
bridge, because that's the only place address translation occurs, but
we aren't going that far yet.

[bhelgaas: changelog]
Signed-off-by: Yinghai Lu &lt;yinghai@kernel.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
These interfaces:

  pcibios_resource_to_bus(struct pci_dev *dev, *bus_region, *resource)
  pcibios_bus_to_resource(struct pci_dev *dev, *resource, *bus_region)

took a pci_dev, but they really depend only on the pci_bus.  And we want to
use them in resource allocation paths where we have the bus but not a
device, so this patch converts them to take the pci_bus instead of the
pci_dev:

  pcibios_resource_to_bus(struct pci_bus *bus, *bus_region, *resource)
  pcibios_bus_to_resource(struct pci_bus *bus, *resource, *bus_region)

In fact, with standard PCI-PCI bridges, they only depend on the host
bridge, because that's the only place address translation occurs, but
we aren't going that far yet.

[bhelgaas: changelog]
Signed-off-by: Yinghai Lu &lt;yinghai@kernel.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>alpha/PCI: Use dev_is_pci() to identify PCI devices</title>
<updated>2013-12-11T23:53:19+00:00</updated>
<author>
<name>Yijing Wang</name>
<email>wangyijing@huawei.com</email>
</author>
<published>2013-12-05T12:04:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=09296c0bbbc107586a43e9ca7c7214153bbbefa6'/>
<id>09296c0bbbc107586a43e9ca7c7214153bbbefa6</id>
<content type='text'>
Use dev_is_pci() instead of checking bus type directly.

Signed-off-by: Yijing Wang &lt;wangyijing@huawei.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use dev_is_pci() instead of checking bus type directly.

Signed-off-by: Yijing Wang &lt;wangyijing@huawei.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>alpha: perf: fix out-of-bounds array access triggered from raw event</title>
<updated>2013-11-17T00:37:10+00:00</updated>
<author>
<name>Will Deacon</name>
<email>will.deacon@arm.com</email>
</author>
<published>2013-09-10T09:58:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=6e22f8f2e8d81dcab4c40bc229d53388fda63dbc'/>
<id>6e22f8f2e8d81dcab4c40bc229d53388fda63dbc</id>
<content type='text'>
Vince's perf fuzzer uncovered the following issue on Alpha:

Unable to handle kernel paging request at virtual address fffffbfe4e46a0e8
CPU 0 perf_fuzzer(1278): Oops 0
pc = [&lt;fffffc000031fbc0&gt;]  ra = [&lt;fffffc000031ff54&gt;]  ps = 0007    Not tainted
pc is at alpha_perf_event_set_period+0x60/0xf0
ra is at alpha_pmu_enable+0x1a4/0x1c0
v0 = 0000000000000000  t0 = 00000000000fffff  t1 = fffffc007b3f5800
t2 = fffffbff275faa94  t3 = ffffffffc9b9bd89  t4 = fffffbfe4e46a098
t5 = 0000000000000020  t6 = fffffbfe4e46a0b8  t7 = fffffc007f4c8000
s0 = 0000000000000000  s1 = fffffc0001b0c018  s2 = fffffc0001b0c020
s3 = fffffc007b3f5800  s4 = 0000000000000001  s5 = ffffffffc9b9bd85
s6 = 0000000000000001
a0 = 0000000000000006  a1 = fffffc007b3f5908  a2 = fffffbfe4e46a098
a3 = 00000005000108c0  a4 = 0000000000000000  a5 = 0000000000000000
t8 = 0000000000000001  t9 = 0000000000000001  t10= 0000000027829f6f
t11= 0000000000000020  pv = fffffc000031fb60  at = fffffc0000950900
gp = fffffc0000940900  sp = fffffc007f4cbca8
Disabling lock debugging due to kernel taint
Trace:
[&lt;fffffc000031ff54&gt;] alpha_pmu_enable+0x1a4/0x1c0
[&lt;fffffc000039f4e8&gt;] perf_pmu_enable+0x48/0x60
[&lt;fffffc00003a0d6c&gt;] __perf_install_in_context+0x15c/0x230
[&lt;fffffc000039d1f0&gt;] remote_function+0x80/0xa0
[&lt;fffffc00003a0c10&gt;] __perf_install_in_context+0x0/0x230
[&lt;fffffc000037b7e4&gt;] smp_call_function_single+0x1b4/0x1d0
[&lt;fffffc000039bb70&gt;] task_function_call+0x60/0x80
[&lt;fffffc00003a0c10&gt;] __perf_install_in_context+0x0/0x230
[&lt;fffffc000039bb44&gt;] task_function_call+0x34/0x80
[&lt;fffffc000039d3fc&gt;] perf_install_in_context+0x9c/0x150
[&lt;fffffc00003a0c10&gt;] __perf_install_in_context+0x0/0x230
[&lt;fffffc00003a5100&gt;] SYSC_perf_event_open+0x360/0xac0
[&lt;fffffc00003110c4&gt;] entSys+0xa4/0xc0

This is due to the raw event encoding being used as an index directly
into the ev67_mapping array, rather than being validated against the
ev67_pmc_event_type enumeration instead. Unlike other architectures,
which allow raw events to propagate into the hardware counters with
little interference, the limited number of events on Alpha and the
strict event &lt;-&gt; counter relationships mean that raw events actually
correspond to the Linux-specific Alpha events, rather than anything
defined by the architecture.

This patch adds a new callback to alpha_pmu_t for validating the raw
event encoding with the Linux event types for the PMU, preventing the
out-of-bounds array access.

Cc: Peter Zijlstra &lt;a.p.zijlstra@chello.nl&gt;
Acked-by: Michael Cree &lt;mcree@orcon.net.nz&gt;
Acked-by: Matt Turner &lt;mattst88@gmail.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Vince's perf fuzzer uncovered the following issue on Alpha:

Unable to handle kernel paging request at virtual address fffffbfe4e46a0e8
CPU 0 perf_fuzzer(1278): Oops 0
pc = [&lt;fffffc000031fbc0&gt;]  ra = [&lt;fffffc000031ff54&gt;]  ps = 0007    Not tainted
pc is at alpha_perf_event_set_period+0x60/0xf0
ra is at alpha_pmu_enable+0x1a4/0x1c0
v0 = 0000000000000000  t0 = 00000000000fffff  t1 = fffffc007b3f5800
t2 = fffffbff275faa94  t3 = ffffffffc9b9bd89  t4 = fffffbfe4e46a098
t5 = 0000000000000020  t6 = fffffbfe4e46a0b8  t7 = fffffc007f4c8000
s0 = 0000000000000000  s1 = fffffc0001b0c018  s2 = fffffc0001b0c020
s3 = fffffc007b3f5800  s4 = 0000000000000001  s5 = ffffffffc9b9bd85
s6 = 0000000000000001
a0 = 0000000000000006  a1 = fffffc007b3f5908  a2 = fffffbfe4e46a098
a3 = 00000005000108c0  a4 = 0000000000000000  a5 = 0000000000000000
t8 = 0000000000000001  t9 = 0000000000000001  t10= 0000000027829f6f
t11= 0000000000000020  pv = fffffc000031fb60  at = fffffc0000950900
gp = fffffc0000940900  sp = fffffc007f4cbca8
Disabling lock debugging due to kernel taint
Trace:
[&lt;fffffc000031ff54&gt;] alpha_pmu_enable+0x1a4/0x1c0
[&lt;fffffc000039f4e8&gt;] perf_pmu_enable+0x48/0x60
[&lt;fffffc00003a0d6c&gt;] __perf_install_in_context+0x15c/0x230
[&lt;fffffc000039d1f0&gt;] remote_function+0x80/0xa0
[&lt;fffffc00003a0c10&gt;] __perf_install_in_context+0x0/0x230
[&lt;fffffc000037b7e4&gt;] smp_call_function_single+0x1b4/0x1d0
[&lt;fffffc000039bb70&gt;] task_function_call+0x60/0x80
[&lt;fffffc00003a0c10&gt;] __perf_install_in_context+0x0/0x230
[&lt;fffffc000039bb44&gt;] task_function_call+0x34/0x80
[&lt;fffffc000039d3fc&gt;] perf_install_in_context+0x9c/0x150
[&lt;fffffc00003a0c10&gt;] __perf_install_in_context+0x0/0x230
[&lt;fffffc00003a5100&gt;] SYSC_perf_event_open+0x360/0xac0
[&lt;fffffc00003110c4&gt;] entSys+0xa4/0xc0

This is due to the raw event encoding being used as an index directly
into the ev67_mapping array, rather than being validated against the
ev67_pmc_event_type enumeration instead. Unlike other architectures,
which allow raw events to propagate into the hardware counters with
little interference, the limited number of events on Alpha and the
strict event &lt;-&gt; counter relationships mean that raw events actually
correspond to the Linux-specific Alpha events, rather than anything
defined by the architecture.

This patch adds a new callback to alpha_pmu_t for validating the raw
event encoding with the Linux event types for the PMU, preventing the
out-of-bounds array access.

Cc: Peter Zijlstra &lt;a.p.zijlstra@chello.nl&gt;
Acked-by: Michael Cree &lt;mcree@orcon.net.nz&gt;
Acked-by: Matt Turner &lt;mattst88@gmail.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>alpha: Use qemu+cserve provided high-res clock and alarm.</title>
<updated>2013-11-17T00:33:21+00:00</updated>
<author>
<name>Richard Henderson</name>
<email>rth@twiddle.net</email>
</author>
<published>2013-07-14T21:50:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4914d7b458e35a7db2f9c7dc6eb014620254bbbf'/>
<id>4914d7b458e35a7db2f9c7dc6eb014620254bbbf</id>
<content type='text'>
QEMU provides a high-resolution timer and alarm; use this for
a clock source and clock event source when available.

Signed-off-by: Richard Henderson &lt;rth@twiddle.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
QEMU provides a high-resolution timer and alarm; use this for
a clock source and clock event source when available.

Signed-off-by: Richard Henderson &lt;rth@twiddle.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>alpha: Switch to GENERIC_CLOCKEVENTS</title>
<updated>2013-11-17T00:33:19+00:00</updated>
<author>
<name>Richard Henderson</name>
<email>rth@twiddle.net</email>
</author>
<published>2013-07-14T17:57:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a1659d6d128a7e0c2985bce7c957b66af1f71181'/>
<id>a1659d6d128a7e0c2985bce7c957b66af1f71181</id>
<content type='text'>
This allows us to get rid of some hacky code for SMP.  Get rid of
some cycle counter hackery that's now handled by generic code via
clocksource + clock_event_device objects.

Signed-off-by: Richard Henderson &lt;rth@twiddle.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This allows us to get rid of some hacky code for SMP.  Get rid of
some cycle counter hackery that's now handled by generic code via
clocksource + clock_event_device objects.

Signed-off-by: Richard Henderson &lt;rth@twiddle.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>alpha: Enable the rpcc clocksource for single processor</title>
<updated>2013-11-17T00:33:18+00:00</updated>
<author>
<name>Richard Henderson</name>
<email>rth@twiddle.net</email>
</author>
<published>2013-07-14T16:55:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=db2d3260617ae8c9076ef12e6de06bd5b3d82cd3'/>
<id>db2d3260617ae8c9076ef12e6de06bd5b3d82cd3</id>
<content type='text'>
Don't depend on SMP, just check the number of processors online.
This allows a single distribution kernel to use the clocksource
when run on a single processor machine.  Do depend on whether or
not we're using WTINT.

Signed-off-by: Richard Henderson &lt;rth@twiddle.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Don't depend on SMP, just check the number of processors online.
This allows a single distribution kernel to use the clocksource
when run on a single processor machine.  Do depend on whether or
not we're using WTINT.

Signed-off-by: Richard Henderson &lt;rth@twiddle.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>alpha: Reorganize rtc handling</title>
<updated>2013-11-17T00:33:16+00:00</updated>
<author>
<name>Richard Henderson</name>
<email>rth@twiddle.net</email>
</author>
<published>2013-07-13T22:49:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=85d0b3a573d8b711ee0c96199ac24a0f3283ed68'/>
<id>85d0b3a573d8b711ee0c96199ac24a0f3283ed68</id>
<content type='text'>
Discontinue use of GENERIC_CMOS_UPDATE; rely on the RTC subsystem.

The marvel platform requires that the rtc only be touched from the
boot cpu.  This had been partially implemented with hooks for
get/set_rtc_time, but read/update_persistent_clock were not handled.
Move the hooks from the machine_vec to a special rtc_class_ops struct.

We had read_persistent_clock managing the epoch against which the
rtc hw is based, but this didn't apply to get_rtc_time or set_rtc_time.
This resulted in incorrect values when hwclock(8) gets involved.

Allow the epoch to be set from the kernel command-line, overriding
the autodetection, which is doomed to fail in 2020.  Further, by
implementing the rtc ioctl function, we can expose this epoch to
userland.

Elide the alarm functions that RTC_DRV_CMOS implements.  This was
highly questionable on Alpha, since the interrupt is used by the
system timer.

Signed-off-by: Richard Henderson &lt;rth@twiddle.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Discontinue use of GENERIC_CMOS_UPDATE; rely on the RTC subsystem.

The marvel platform requires that the rtc only be touched from the
boot cpu.  This had been partially implemented with hooks for
get/set_rtc_time, but read/update_persistent_clock were not handled.
Move the hooks from the machine_vec to a special rtc_class_ops struct.

We had read_persistent_clock managing the epoch against which the
rtc hw is based, but this didn't apply to get_rtc_time or set_rtc_time.
This resulted in incorrect values when hwclock(8) gets involved.

Allow the epoch to be set from the kernel command-line, overriding
the autodetection, which is doomed to fail in 2020.  Further, by
implementing the rtc ioctl function, we can expose this epoch to
userland.

Elide the alarm functions that RTC_DRV_CMOS implements.  This was
highly questionable on Alpha, since the interrupt is used by the
system timer.

Signed-off-by: Richard Henderson &lt;rth@twiddle.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>alpha: Primitive support for CPU power down.</title>
<updated>2013-11-17T00:33:15+00:00</updated>
<author>
<name>Richard Henderson</name>
<email>rth@twiddle.net</email>
</author>
<published>2013-07-12T16:36:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7f3bbb82e0c371d6881129f776c90130ba66f051'/>
<id>7f3bbb82e0c371d6881129f776c90130ba66f051</id>
<content type='text'>
Use WTINT to wait for the next interrupt.  Squash the WTINT call
if the PALcode doesn't support it (e.g. MILO).  No attempt is yet
made to skip clock ticks during normal scheduling in order to stay
in power down mode longer.

Signed-off-by: Richard Henderson &lt;rth@twiddle.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use WTINT to wait for the next interrupt.  Squash the WTINT call
if the PALcode doesn't support it (e.g. MILO).  No attempt is yet
made to skip clock ticks during normal scheduling in order to stay
in power down mode longer.

Signed-off-by: Richard Henderson &lt;rth@twiddle.net&gt;
</pre>
</div>
</content>
</entry>
</feed>
