linux-toradex.git/arch/arc/Kconfig, branch v4.3.1 Linux kernel for Apalis and Colibri modules ARC: Enable HAVE_FUTEX_CMPXCHG 2015-08-20T12:46:01+00:00 Vineet Gupta vgupta@synopsys.com 2015-08-06T12:25:34+00:00 5e0574292ad48dcdf48ef90a47da862c21d649a6 ARC doesn't need the runtime detection of futex cmpxchg op Cc: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
ARC doesn't need the runtime detection of futex cmpxchg op

Cc: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: Enable optimistic spinning for LLSC config 2015-08-11T09:21:09+00:00 Vineet Gupta vgupta@synopsys.com 2015-08-08T12:21:58+00:00 2a4401687c11def29fe5a9b23ab98bf7ab1dce61 Suggested-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
Suggested-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARCv2: spinlock/rwlock/atomics: Delayed retry of failed SCOND with exponential backoff 2015-08-04T03:56:34+00:00 Vineet Gupta vgupta@synopsys.com 2015-07-14T14:20:18+00:00 e78fdfef84be13a5c2b8276e12203cdf24778596 This is to workaround the llock/scond livelock HS38x4 could get into a LLOCK/SCOND livelock in case of multiple overlapping coherency transactions in the SCU. The exclusive line state keeps rotating among contenting cores leading to a never ending cycle. So break the cycle by deferring the retry of failed exclusive access (SCOND). The actual delay needed is function of number of contending cores as well as the unrelated coherency traffic from other cores. To keep the code simple, start off with small delay of 1 which would suffice most cases and in case of contention double the delay. Eventually the delay is sufficient such that the coherency pipeline is drained, thus a subsequent exclusive access would succeed. Link: http://lkml.kernel.org/r/1438612568-28265-1-git-send-email-vgupta@synopsys.com Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
This is to workaround the llock/scond livelock

HS38x4 could get into a LLOCK/SCOND livelock in case of multiple overlapping
coherency transactions in the SCU. The exclusive line state keeps rotating
among contenting cores leading to a never ending cycle. So break the cycle
by deferring the retry of failed exclusive access (SCOND). The actual delay
needed is function of number of contending cores as well as the unrelated
coherency traffic from other cores. To keep the code simple, start off with
small delay of 1 which would suffice most cases and in case of contention
double the delay. Eventually the delay is sufficient such that the coherency
pipeline is drained, thus a subsequent exclusive access would succeed.

Link: http://lkml.kernel.org/r/1438612568-28265-1-git-send-email-vgupta@synopsys.com
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARCv2: allow selection of page size for MMUv4 2015-07-23T09:04:39+00:00 Alexey Brodkin abrodkin@synopsys.com 2015-07-16T18:45:17+00:00 450ed0db011d200a691591a75fdbcd7cae1a9b4a MMUv4 also supports the configurable page size as MMUv3. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
MMUv4 also supports the configurable page size as MMUv3.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARCv2: add knob for DIV_REV in Kconfig 2015-07-20T10:33:30+00:00 Alexey Brodkin abrodkin@synopsys.com 2015-07-16T18:45:38+00:00 d05a76ab4d9ece9bd987a8c29e3f384ec9f7b211 Being highly configurable core ARC HS among other features might be configured with or without DIV_REM_OPTION (hardware divider). That option when enabled adds following instructions: div, divu, rem, remu. By default ARC HS38 has this option enabled. So we add here possibility to disable usage of hardware divider by compiler. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
Being highly configurable core ARC HS among other features might be
configured with or without DIV_REM_OPTION (hardware divider).

That option when enabled adds following instructions: div, divu, rem, remu.

By default ARC HS38 has this option enabled. So we add here possibility
to disable usage of hardware divider by compiler.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: Kconfig: better way to disable ARC_HAS_LLSC for ARC_CPU_750D 2015-07-06T04:42:39+00:00 Vineet Gupta vgupta@synopsys.com 2015-06-26T07:12:53+00:00 14a0abfc4ab0b49c7e48eca5c6b31288ea457dee Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARCv2: All bits in place, allow ARCv2 builds 2015-06-25T00:30:19+00:00 Vineet Gupta vgupta@synopsys.com 2015-03-09T08:31:08+00:00 65bfbcdfdec5c6ba055302e25506aaf67ce3c5c7 Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARCv2: SMP: clocksource: Enable Global Real Time counter 2015-06-22T08:36:57+00:00 Vineet Gupta vgupta@synopsys.com 2014-12-24T13:11:55+00:00 72d72880612705143ad32cf4ede0d6ae27e8b975 Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARCv2: SMP: ARConnect debug/robustness 2015-06-22T08:36:57+00:00 Vineet Gupta vgupta@synopsys.com 2014-11-07T05:15:28+00:00 aa6083ed50957f699596999affbb6eb9d7a8b72e - Handle possible interrupt coalescing from MCIP - chk if prev IPI ack before sending new Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
- Handle possible interrupt coalescing from MCIP
- chk if prev IPI ack before sending new

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et al 2015-06-22T08:36:56+00:00 Vineet Gupta vgupta@synopsys.com 2014-09-10T13:35:38+00:00 82fea5a1bbbe8c3b56d5f3efbf8880c7b25b1758 Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>