linux-toradex.git/arch/arc/include/asm/entry-compact.h, branch v4.3.1 Linux kernel for Apalis and Colibri modules ARC: intc: split into ARCompact ISA specific, common bits 2015-06-19T12:39:40+00:00 Vineet Gupta vgupta@synopsys.com 2015-03-05T13:43:56+00:00 5793e273a134331d05ed904e5be3b31ccfca54c1 Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: entry.S: [arcompact] simplify SWITCH_TO_KERNEL_STK 2015-06-19T12:39:40+00:00 Vineet Gupta vgupta@synopsys.com 2015-03-28T16:06:00+00:00 5a343b9fe22995c43b1209b0b63ea0fa2824cbae Previously this macro was overloaded with stack switching, saving SP at right slot in pt_regs, saving/setup of r25 and setting SP baseline to where pt_regs->sp is saved (vs. bottom of pt_regs) Now it only does SP switch, and leaves SP pointing to bottom of pt_regs. r25 saving is no longer done here to allow for future reordering of regfile in pt_regs w/o touching this macro Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
Previously this macro was overloaded with stack switching, saving SP at right
slot in pt_regs, saving/setup of r25 and setting SP baseline to where
pt_regs->sp is saved (vs. bottom of pt_regs)

Now it only does SP switch, and leaves SP pointing to bottom of pt_regs.

r25 saving is no longer done here to allow for future reordering of
regfile in pt_regs w/o touching this macro

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: entry.S: micro-optimize Trap handler 2015-06-19T12:39:39+00:00 Vineet Gupta vgupta@synopsys.com 2015-03-13T06:20:23+00:00 62fb64034d30293448de10a48c7ee47ee978e338 Elide the need to re-read ECR in Trap handler by ensuring that EXCEPTION_PROLOGUE does that at the very end just before returning to Trap handler ARCv2 EXCEPTION_PROLOGUE already did that, so same for ARcompact and the common trap handler adjusted to use cached ECR Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
Elide the need to re-read ECR in Trap handler by ensuring that
EXCEPTION_PROLOGUE does that at the very end just before returning
to Trap handler

ARCv2 EXCEPTION_PROLOGUE already did that, so same for ARcompact and the
common trap handler adjusted to use cached ECR

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: entry.S: split into ARCompact ISA specific, common bits 2015-06-19T12:39:38+00:00 Vineet Gupta vgupta@synopsys.com 2015-02-21T09:39:32+00:00 6d1a20b1d237db29878ae54142e39c87a36d0e95 Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>