linux-toradex.git/arch/arc/include/asm/irq.h, branch v4.20

ARCv2: intc: Use runtime value of irq count for setting up intc

2017-02-06T17:37:57+00:00

Signed-off-by: Vineet Gupta

ARCv2: intc: Rework the build time irq count information

2017-02-06T17:37:57+00:00

Currently Kconfig knob ARC_NUMBER_OF_INTERRUPTS is used as indicator of
hard irq count. But it is flawed that it doesn't affect
 - NR_IRQS     : for number of virtual interrupts
 - NR_CPU_IRQS : for number of hardware interrupts

Moreover the actual hardware irq count might still not be same as
ARC_NUMBER_OF_INTERRUPTS. So use the information availble in the
Build Configuration Registers and get rid of the Kconfig option.

We still need "some" build time info about irq count to set up
sufficient number of vector table entries. This is done with a
sufficiently large NR_CPU_IRQS which will eventually be used soley for
that purpose (subsequent patches will remove its usage elsewhere)

So to summarize what this patch does:

  * NR_CPU_IRQS defines a maximum number of hardware interrupts.
  * Remove ARC_NUMBER_OF_INTERRUPTS option and create interrupts
    table for all possible hardware interrupts.
  * Increase a maximum number of virtual IRQs to 512. ARCv2 can
    support 240 interrupts in the core interrupts controllers
    and 128 interrupts in IDU. Thus 512 virtual IRQs must be
    enough for most configurations of boards.

This patch leads to NR_CPU_IRQS in 2 places, to reduce the overall
churn. The next patch will remove the 2nd definition anyways.

Signed-off-by: Yuriy Kolerov 
Signed-off-by: Vineet Gupta 
[vgupta: reworked the changelog a bit]

ARC: [intc-*]: confine NR_CPU_IRQS to intc code

2017-02-06T17:37:57+00:00

And even this willl change in subsequent patches where we resort to
using run time info instead...

Signed-off-by: Vineet Gupta

ARC: irq: export some IRQs again

2016-05-09T04:02:30+00:00

This will be needed for switching to linear irq domain as
irq_create_mapping() called by intr code needs the IRQ numbers
in addition to existing usage in mcip.c for requesting the irq

Signed-off-by: Vineet Gupta

ARC: clockevent: DT based probe

2016-05-09T04:02:29+00:00

 - timer frequency is derived from DT (no longer rely on top level
   DT "clock-frequency" probed early and exported by asm/clk.h)

 - TIMER0_IRQ need not be exported across arch code, confined to intc as
   it is property of same

 - Any failures in clockevent setup are considered pedantic and system
   panic()'s as there is no generic fallback (unlike clocksource where
   a jiffies based soft clocksource always exists)

Acked-by: Daniel Lezcano 
Signed-off-by: Vineet Gupta

ARC: clockevent: switch to cpu notifier for clockevent setup

2016-05-09T04:02:28+00:00

ARC Timers so far have been handled as "legacy" w/o explicit description
in DT. This poses challenge for newer platforms wanting to use them.
This series will eventually help move timers over to DT.

This patch does a small change of using a CPU notifier to set clockevent
on non-boot CPUs. So explicit setup is done only on boot CPU (which will
later be done by DT)

Signed-off-by: Noam Camus 
[vgupta: broken off from a bigger patch]
Signed-off-by: Vineet Gupta

ARC: opencode arc_request_percpu_irq

2016-05-09T04:02:28+00:00

- The idea is to remove the API usage since it has a subltle
  design flaw - relies on being called on cpu0 first. This is true for
  some early per cpu irqs such as TIMER/IPI, but not for late probed
  per cpu peripherals such a perf. And it's usage in perf has already
  bitten us once: see c6317bc7c5ab
  ("ARCv2: perf: Ensure perf intr gets enabled on all cores") where we
  ended up open coding it anyways

- The seeming duplication will go away once we start using cpu notifier
  for timer setup

Signed-off-by: Vineet Gupta

ARCv2: SMP: Push IPI_IRQ into IPI provider

2016-02-24T05:37:31+00:00

Signed-off-by: Vineet Gupta

ARC: [intc-compact] Remove IPI setup from ARCompact port

2016-02-24T05:37:31+00:00

There is no real ARC700 based SMP SoC so remove IPI definition.
EZChip's SMP ARC700 is going to use a different intc and IPI provider
anyways.

Signed-off-by: Vineet Gupta

ARC: smp: irqchip: handle IPI as percpu irq like timer

2015-10-28T10:43:39+00:00

The reason this was not done so far was lack of genuine IPI_IRQ for
ARC700, as we don't have a SMP version of core yet (which might change
soon thx to EZChip). Nevertheles to increase the build coverage, we
need to allow CONFIG_SMP for ARC700 and still be able to run it on a
UP platform (nsim or AXS101) with a UP Device Tree (SMP-on-UP)

The build itself requires some define for IPI_IRQ and even a dummy
value is fine since that code won't run anyways.

Signed-off-by: Vineet Gupta