linux-toradex.git/arch/arc/kernel, branch v4.10-rc5

ARC: module: Fix !CONFIG_ARC_DW2_UNWIND builds

2017-01-18T19:17:44+00:00

commit d65283f7b695b5 added mod->arch.secstr under
CONFIG_ARC_DW2_UNWIND, but used it unconditionally which broke builds
when the option was disabled. Fix that by adjusting the #ifdef guard.

And while at it add a missing guard (for unwinder) in module.c as well

Reported-by: Waldemar Brodkorb 
Cc: stable@vger.kernel.org    #4.9
Fixes: d65283f7b695b5 ("ARC: module: elide loop to save reference to .eh_frame")
Tested-by: Anton Kolesov 
Reviewed-by: Alexey Brodkin 
[abrodkin: provided fixlet to Kconfig per failure in allnoconfig build]
Signed-off-by: Vineet Gupta

ARCv2: IRQ: Call entry/exit functions for chained handlers in MCIP

2017-01-05T01:12:11+00:00

It is necessary to call entry/exit functions for parent interrupt
controllers for proper masking/unmasking of interrupt lines.

Signed-off-by: Yuriy Kolerov 
Signed-off-by: Vineet Gupta

ARC: IRQ: Use hwirq instead of virq in mask/unmask

2017-01-05T01:12:10+00:00

It is necessary to use hwirq instead of virq when you communicate
with an interrupt controller since there is no guaranty that virq
numbers match hwirq numbers.

Signed-off-by: Yuriy Kolerov 
Signed-off-by: Vineet Gupta

ARCv2: intc: default all interrupts to priority 1

2016-12-14T17:23:46+00:00

ARC HS Cores support configurable multiple interrupt priorities of upto
16 levels. In commit dec2b2849cfcc ("ARCv2: intc: Allow interruption by
lowest priority interrupt") we switched to 15 which seems a bit
excessive given that there would be rare hardware implementing so many
preemption levels AND running Linux. It would seem that 2 levels will be
more common so switch to 1 as the default priority level. This will be
the "lower" priority level saving 0 for implementing NMI style support.

This scheme also works in systems with more than 2 prioity levels as
well.

Signed-off-by: Vineet Gupta

ARCv2: entry: document intr disable in hard isr

2016-12-14T17:23:45+00:00

And while at it - use the proper assembler macro which includes the
optional irq tracing already - de-uglify'ing the code a bit

Signed-off-by: Vineet Gupta

ARC: ARCompact entry: elide re-reading ECR in ProtV handler

2016-12-13T21:16:11+00:00

Signed-off-by: Vineet Gupta

clocksource: import ARC timer driver

2016-11-30T19:54:25+00:00

This adds support for

 - CONFIG_ARC_TIMERS : legacy 32-bit TIMER0 and TIMER1 which count UP
   from @CNT to @LIMIT, before optionally triggering an interrupt.
   These are programmed using ARC auxiliary register interface.
   These are present in all ARC cores (ARC700 and ARC HS38)
   TIMER0 serves as clockevent for all ARC linux builds.
   TIMER1 is used for clocksource in arc700 builds.

 - CONFIG_ARC_TIMERS_64BIT: 64-bit counters, RTC and GFRC found in
   ARC HS38 cores. These are independnet IP blocks with different
   programming model respectively.

Link: http://lkml.kernel.org/r/20161111231132.GA4186@mai
Acked-by: Daniel Lezcano 
Signed-off-by: Vineet Gupta

ARC: breakout timer include code into separate header ...

2016-11-30T19:54:25+00:00

... which allows for use in drivers/clocksource later

Signed-off-by: Vineet Gupta

ARC: move mcip.h into include/soc and adjust the includes

2016-11-30T19:54:25+00:00

Also remove the dependency on ARCv2, to increase compile coverage for
!ARCV2 builds

Acked-by: Daniel Lezcano 
Signed-off-by: Vineet Gupta

ARC: time: move time_init() out of the driver

2016-11-30T19:54:25+00:00

to allow future git mv of the driver into drivers/clocksource

Acked-by: Daniel Lezcano 
Signed-off-by: Vineet Gupta