linux-toradex.git/arch/arc/mm, branch v3.9.2

ARC: Don't fiddle with non-existent caches

2013-02-15T17:46:19+00:00

!CONFIG_ARC_HAS_(I|D)CACHE makes Linux disable caches (assuming they
exist in hardware) - mostly for debugging issues with new peripherals.
However, independent of CONFIG_ARC_HAS_(I|D)CACHE, Linux also needs to
handle, non-existant caches, using the information in Cache BCRs (Build
Configuration Reg)

Reported-by: Alexey Brodkin 
Signed-off-by: Vineet Gupta

ARC: Add support for ioremap_prot API

2013-02-15T17:46:11+00:00

Implement ioremap_prot() to allow mapping IO memory with variable
protection
via TLB.

Implementing this allows the /dev/mem driver to use its generic access()
VMA callback, which in turn allows ptrace to examine data in memory
mapped regions mapped via /dev/mem, such as Arc DCCM.

The end result is that it is possible to examine values of variables
placed into DCCM in user space programs via GDB.

CC: Alexey Brodkin 
CC: Noam Camus 
Acked-by: Vineet Gupta 
Signed-off-by: Gilad Ben-Yossef 
Signed-off-by: Vineet Gupta

ARC: Support for single cycle Close Coupled Mem (CCM)

2013-02-15T17:46:10+00:00

* Includes mapping of CCMs in address space
* Annotations to move arbitrary code/data into CCM
* Moving some of the critical code/data into CCM
* Runtime detection/reporting

Signed-off-by: Vineet Gupta

ARC: Boot #2: Verbose Boot reporting / feature verification

2013-02-15T17:46:07+00:00

Signed-off-by: Vineet Gupta

ARC: SMP support

2013-02-15T17:46:02+00:00

ARC common code to enable a SMP system + ISS provided SMP extensions.

ARC700 natively lacks SMP support, hence some of the core features are
are only enabled if SoCs have the necessary h/w pixie-dust. This
includes:
-Inter Processor Interrupts (IPI)
-Cache coherency
-load-locked/store-conditional
...

The low level exception handling would be completely broken in SMP
because we don't have hardware assisted stack switching. Thus a fair bit
of this code is repurposing the MMU_SCRATCH reg for event handler
prologues to keep them re-entrant.

Many thanks to Rajeshwar Ranga for his initial "major" contributions to
SMP Port (back in 2008), and to Noam Camus and Gilad Ben-Yossef for help
with resurrecting that in 3.2 kernel (2012).

Note that this platform code is again singleton design pattern - so
multiple SMP platforms won't build at the moment - this deficiency is
addressed in subsequent patches within this series.

Signed-off-by: Vineet Gupta 
Cc: Arnd Bergmann 
Cc: Thomas Gleixner 
Cc: Rajeshwar Ranga 
Cc: Noam Camus 
Cc: Gilad Ben-Yossef

ARC: Diagnostics: show_regs() etc

2013-02-15T17:46:02+00:00

Signed-off-by: Vineet Gupta

ARC: [DeviceTree] Convert some Kconfig items to runtime values

2013-02-15T17:45:56+00:00

* mem size now runtime configured (prev CONFIG_ARC_PLAT_SDRAM_SIZE)
* core cpu clk runtime configured (prev CONFIG_ARC_PLAT_CLK)

Signed-off-by: Vineet Gupta 
Cc: Arnd Bergmann 
Cc: Grant Likely

ARC: [DeviceTree] Basic support

2013-02-15T17:45:55+00:00

This is minimal infrastructure needed for devicetree work.
It uses an a sample "skeleton" devicetree - embedded in kernel image -
to print the board, manufacturer by parsing the top-level "compatible"
string.

As of now we don't need any additional "board" specific "machine_desc".

TODO: support interpreting the command line as boot-loader passed dtb

Signed-off-by: Vineet Gupta 
Cc: Arnd Bergmann 
Cc: Grant Likely 
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Rob Herring 
Cc: James Hogan 
Reviewed-by: Rob Herring 
Reviewed-by: James Hogan

ARC: Boot #1: low-level, setup_arch(), /proc/cpuinfo, mem init

2013-02-15T17:45:54+00:00

Signed-off-by: Vineet Gupta 
Acked-by: Arnd Bergmann

ARC: I/O and DMA Mappings

2013-02-15T17:45:54+00:00

Signed-off-by: Vineet Gupta