<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/arm/boot/compressed, branch v4.1.5</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge tag 'armsoc-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-04-22T16:20:15+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-04-22T16:20:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e5ac320de1fe3ef5a5afa5f8a0cd19b0c5373a37'/>
<id>e5ac320de1fe3ef5a5afa5f8a0cd19b0c5373a37</id>
<content type='text'>
Pull ARM SoC multiplatform code changes from Olof Johansson:
 "The changes here belong to two main platforms:

   - Atmel At91 is flipping the bit and going multiplatform.  This
     includes some cleanups and removal of code, and the final flip of
     config dependencies

   - Shmobile has several platforms that are going multiplatform, but
     this branch also contains a bunch of cleanups that they weren't
     able to keep separate in a good way.  THere's also a removal of one
     of their SoCs and the corresponding boards (sh7372 and mackerel)"

* tag 'armsoc-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (67 commits)
  ARM: at91/pm: move AT91_MEMCTRL_* to pm.h
  ARM: at91/pm: move the standby functions to pm.c
  ARM: at91: fix pm_suspend.S compilation when ARMv6 is selected
  ARM: at91: add a Kconfig dependency on multi-platform
  ARM: at91: drop AT91_TIMER_HZ
  ARM: at91: remove hardware.h
  ARM: at91: remove SoC headers
  ARM: at91: remove useless mach/cpu.h
  ARM: at91: remove unused headers
  ARM: at91: switch at91_dt_defconfig to multiplatform
  ARM: at91: switch to multiplatform
  ARM: shmobile: r8a7778: enable multiplatform target
  ARM: shmobile: bockw: add sound to DT
  ARM: shmobile: r8a7778: add sound to DT
  ARM: shmobile: bockw: add devices hooked up to i2c0 to DT
  DT: i2c: add trivial binding for OKI ML86V7667 video decoder
  ARM: shmobile: r8a7778: common clock framework CPG driver
  ARM: shmobile: bockw dts: set extal clock frequency
  ARM: shmobile: bockw dts: Move Ethernet node to BSC
  ARM: shmobile: r8a73a4: Remove legacy code
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull ARM SoC multiplatform code changes from Olof Johansson:
 "The changes here belong to two main platforms:

   - Atmel At91 is flipping the bit and going multiplatform.  This
     includes some cleanups and removal of code, and the final flip of
     config dependencies

   - Shmobile has several platforms that are going multiplatform, but
     this branch also contains a bunch of cleanups that they weren't
     able to keep separate in a good way.  THere's also a removal of one
     of their SoCs and the corresponding boards (sh7372 and mackerel)"

* tag 'armsoc-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (67 commits)
  ARM: at91/pm: move AT91_MEMCTRL_* to pm.h
  ARM: at91/pm: move the standby functions to pm.c
  ARM: at91: fix pm_suspend.S compilation when ARMv6 is selected
  ARM: at91: add a Kconfig dependency on multi-platform
  ARM: at91: drop AT91_TIMER_HZ
  ARM: at91: remove hardware.h
  ARM: at91: remove SoC headers
  ARM: at91: remove useless mach/cpu.h
  ARM: at91: remove unused headers
  ARM: at91: switch at91_dt_defconfig to multiplatform
  ARM: at91: switch to multiplatform
  ARM: shmobile: r8a7778: enable multiplatform target
  ARM: shmobile: bockw: add sound to DT
  ARM: shmobile: r8a7778: add sound to DT
  ARM: shmobile: bockw: add devices hooked up to i2c0 to DT
  DT: i2c: add trivial binding for OKI ML86V7667 video decoder
  ARM: shmobile: r8a7778: common clock framework CPG driver
  ARM: shmobile: bockw dts: set extal clock frequency
  ARM: shmobile: bockw dts: Move Ethernet node to BSC
  ARM: shmobile: r8a73a4: Remove legacy code
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 8327/1: zImage: add support for ARMv7-M</title>
<updated>2015-03-28T16:54:53+00:00</updated>
<author>
<name>Joachim Eastwood</name>
<email>manabian@gmail.com</email>
</author>
<published>2015-03-25T07:47:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c20611df13c3e3070607c267cf781ba8645a185e'/>
<id>c20611df13c3e3070607c267cf781ba8645a185e</id>
<content type='text'>
This patch makes it possible to enter zImage in Thumb mode for ARMv7-M
(Cortex-M) CPUs that do not support ARM mode. The kernel entry is also
made in Thumb mode.

[ukl: fix spelling in commit log, return early in call_cache_fn]

Signed-off-by: Joachim Eastwood &lt;manabian@gmail.com&gt;
Tested-by: Stefan Agner &lt;stefan@agner.ch&gt;
Tested-by: Ezequiel Garcia &lt;ezequiel@vanguardiasur.com.ar&gt;
Tested-by: Chanwoo Choi &lt;cw00.choi@samsung.com&gt;
Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch makes it possible to enter zImage in Thumb mode for ARMv7-M
(Cortex-M) CPUs that do not support ARM mode. The kernel entry is also
made in Thumb mode.

[ukl: fix spelling in commit log, return early in call_cache_fn]

Signed-off-by: Joachim Eastwood &lt;manabian@gmail.com&gt;
Tested-by: Stefan Agner &lt;stefan@agner.ch&gt;
Tested-by: Ezequiel Garcia &lt;ezequiel@vanguardiasur.com.ar&gt;
Tested-by: Chanwoo Choi &lt;cw00.choi@samsung.com&gt;
Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: add documentation for finding start of physical memory</title>
<updated>2015-03-27T22:21:14+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2015-03-26T09:41:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0a6a78b8b3c1c1757fbeca4bbf518e44c70c9e4b'/>
<id>0a6a78b8b3c1c1757fbeca4bbf518e44c70c9e4b</id>
<content type='text'>
Occasionally, there's a question about the method we use to find the
start of physical memory.  Add some documentation so we don't have to
keep repeating outselves on the mailing list.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Occasionally, there's a question about the method we use to find the
start of physical memory.  Add some documentation so we don't have to
keep repeating outselves on the mailing list.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: shmobile: sh7372: Remove ZBOOT MMC/SDHI support</title>
<updated>2015-02-23T21:45:24+00:00</updated>
<author>
<name>Magnus Damm</name>
<email>damm+renesas@opensource.se</email>
</author>
<published>2015-01-26T06:19:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=10c7fcbd0f00a0d7e6039fcfcb04dca80c0ff362'/>
<id>10c7fcbd0f00a0d7e6039fcfcb04dca80c0ff362</id>
<content type='text'>
Remove the sh7372 implementation and the shared ZBOOT MMC
and SDHI support code from the compressed ARM boot loader.

With this in place it is no longer possible to boot any
self-contained kernel for sh7372 directly from Mask ROM
via SDHI and MMCIF hardware.

Signed-off-by: Magnus Damm &lt;damm+renesas@opensource.se&gt;
Acked-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Acked-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Simon Horman &lt;horms+renesas@verge.net.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Remove the sh7372 implementation and the shared ZBOOT MMC
and SDHI support code from the compressed ARM boot loader.

With this in place it is no longer possible to boot any
self-contained kernel for sh7372 directly from Mask ROM
via SDHI and MMCIF hardware.

Signed-off-by: Magnus Damm &lt;damm+renesas@opensource.se&gt;
Acked-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Acked-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Simon Horman &lt;horms+renesas@verge.net.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branches 'debug', 'fixes', 'l2c' (early part), 'misc' and 'sa1100' into for-next</title>
<updated>2015-02-10T10:26:27+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2015-02-10T10:26:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ed8f8ce38d0f7b505d7da2d79522972e962457c2'/>
<id>ed8f8ce38d0f7b505d7da2d79522972e962457c2</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 8294/1: ATAG_DTB_COMPAT: remove the DT workspace's hardcoded 64KB size</title>
<updated>2015-01-29T15:23:01+00:00</updated>
<author>
<name>Nicolas Pitre</name>
<email>nicolas.pitre@linaro.org</email>
</author>
<published>2015-01-27T15:10:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c2607f74aad96d18316a6e709b40e0ffe9def148'/>
<id>c2607f74aad96d18316a6e709b40e0ffe9def148</id>
<content type='text'>
There is currently a hardcoded limit of 64KB for the DTB to live in and
be extended with ATAG info.  Some DTBs have outgrown that limit:

$ du -b arch/arm/boot/dts/omap3-n900.dtb
70212   arch/arm/boot/dts/omap3-n900.dtb

Furthermore, the actual size passed to atags_to_fdt() included the stack
size which is obviously wrong.

The initial DTB size is known, so use it to size the allocated workspace
with a 50% growth assumption and relocate the temporary stack above that.
This is also clamped to 32KB min / 1MB max for robustness against bad
DTB data.

Reported-by: Pali Rohár &lt;pali.rohar@gmail.com&gt;
Tested-by: Pavel Machek &lt;pavel@ucw.cz&gt;
Signed-off-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There is currently a hardcoded limit of 64KB for the DTB to live in and
be extended with ATAG info.  Some DTBs have outgrown that limit:

$ du -b arch/arm/boot/dts/omap3-n900.dtb
70212   arch/arm/boot/dts/omap3-n900.dtb

Furthermore, the actual size passed to atags_to_fdt() included the stack
size which is obviously wrong.

The initial DTB size is known, so use it to size the allocated workspace
with a 50% growth assumption and relocate the temporary stack above that.
This is also clamped to 32KB min / 1MB max for robustness against bad
DTB data.

Reported-by: Pali Rohár &lt;pali.rohar@gmail.com&gt;
Tested-by: Pavel Machek &lt;pavel@ucw.cz&gt;
Signed-off-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 8290/1: decompressor: fix a wrong comment</title>
<updated>2015-01-21T15:59:34+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2015-01-20T02:44:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7d57909bf69f213b4a9f278d78271e7c9a05f62f'/>
<id>7d57909bf69f213b4a9f278d78271e7c9a05f62f</id>
<content type='text'>
This comment does not correspond to the actual code.

When zImage is loaded at a lower *OR* higher address of
the destination of Image, it won't overwrite itself.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Acked-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This comment does not correspond to the actual code.

When zImage is loaded at a lower *OR* higher address of
the destination of Image, it won't overwrite itself.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Acked-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 8191/1: decompressor: ensure I-side picks up relocated code</title>
<updated>2014-11-13T23:45:20+00:00</updated>
<author>
<name>Will Deacon</name>
<email>will.deacon@arm.com</email>
</author>
<published>2014-11-04T10:40:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=238962ac71910d6c20162ea5230685fead1836a4'/>
<id>238962ac71910d6c20162ea5230685fead1836a4</id>
<content type='text'>
To speed up decompression, the decompressor sets up a flat, cacheable
mapping of memory. However, when there is insufficient space to hold
the page tables for this mapping, we don't bother to enable the caches
and subsequently skip all the cache maintenance hooks.

Skipping the cache maintenance before jumping to the relocated code
allows the processor to predict the branch and populate the I-cache
with stale data before the relocation loop has completed (since a
bootloader may have SCTLR.I set, which permits normal, cacheable
instruction fetches regardless of SCTLR.M).

This patch moves the cache maintenance check into the maintenance
routines themselves, allowing the v6/v7 versions to invalidate the
I-cache regardless of the MMU state.

Cc: &lt;stable@vger.kernel.org&gt;
Reported-by: Marc Carino &lt;marc.ceeeee@gmail.com&gt;
Tested-by: Julien Grall &lt;julien.grall@linaro.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
To speed up decompression, the decompressor sets up a flat, cacheable
mapping of memory. However, when there is insufficient space to hold
the page tables for this mapping, we don't bother to enable the caches
and subsequently skip all the cache maintenance hooks.

Skipping the cache maintenance before jumping to the relocated code
allows the processor to predict the branch and populate the I-cache
with stale data before the relocation loop has completed (since a
bootloader may have SCTLR.I set, which permits normal, cacheable
instruction fetches regardless of SCTLR.M).

This patch moves the cache maintenance check into the maintenance
routines themselves, allowing the v6/v7 versions to invalidate the
I-cache regardless of the MMU state.

Cc: &lt;stable@vger.kernel.org&gt;
Reported-by: Marc Carino &lt;marc.ceeeee@gmail.com&gt;
Tested-by: Julien Grall &lt;julien.grall@linaro.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 8153/1: Enable gcov support on the ARM architecture</title>
<updated>2014-09-26T13:39:57+00:00</updated>
<author>
<name>Vincent Sanders</name>
<email>vincent.sanders@collabora.co.uk</email>
</author>
<published>2014-09-18T19:39:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=75c349062a666deab57bdca8b5bd0779c9fb0d58'/>
<id>75c349062a666deab57bdca8b5bd0779c9fb0d58</id>
<content type='text'>
Enable gcov support for ARM based on original patches by David
Singleton and George G. Davis

Riku - updated to patch to current mainline kernel. The patch
has been submitted in 2010, 2012 - for symmetry, now in 2014 too.

https://lwn.net/Articles/390419/
http://marc.info/?l=linux-arm-kernel&amp;m=133823081813044

v2: remove arch/arm/kernel from gcov disabled files

Cc: Andrey Ryabinin &lt;a.ryabinin@samsung.com&gt;
Cc: Naresh Kamboju &lt;naresh.kamboju@linaro.org&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Riku Voipio &lt;riku.voipio@linaro.org&gt;
Signed-off-by: Vincent Sanders &lt;vincent.sanders@collabora.co.uk&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Enable gcov support for ARM based on original patches by David
Singleton and George G. Davis

Riku - updated to patch to current mainline kernel. The patch
has been submitted in 2010, 2012 - for symmetry, now in 2014 too.

https://lwn.net/Articles/390419/
http://marc.info/?l=linux-arm-kernel&amp;m=133823081813044

v2: remove arch/arm/kernel from gcov disabled files

Cc: Andrey Ryabinin &lt;a.ryabinin@samsung.com&gt;
Cc: Naresh Kamboju &lt;naresh.kamboju@linaro.org&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Riku Voipio &lt;riku.voipio@linaro.org&gt;
Signed-off-by: Vincent Sanders &lt;vincent.sanders@collabora.co.uk&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 8079/1: zImage: identify kernel endianness</title>
<updated>2014-07-18T11:29:08+00:00</updated>
<author>
<name>Nicolas Pitre</name>
<email>nicolas.pitre@linaro.org</email>
</author>
<published>2014-06-19T21:44:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9696fcae9251610f5935a3823be40d1365649720'/>
<id>9696fcae9251610f5935a3823be40d1365649720</id>
<content type='text'>
With patch #8067/1 ("zImage: ensure header in LE format for BE8 kernels")
applied, it is no longer possible to determine the endianness of a compiled
kernel image.  This normally shouldn't matter to the boot environment,
except for those cases where the selection of a ramdisk or root filesystem
with a matching endianness has to be automated.

Let's add a flag to the zImage header indicating the actual endianness.
Four bytes from offset 0x30 can be interpreted as follows:

	04 03 02 01	big endian kernel

	01 02 03 04	little endian kernel

Anything else should be interpreted as "unknown", in which case it is
most likely that patch #8067/1 was not applied either and the zImage
magic number at offset 0x24 could be used instead to determine
endianness. No zImage before this patch ever produced 0x01020304 nor
0x04030201 at offset 0x30 so there is no confusion possible.

Signed-off-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Acked-by: Kevin Hilman &lt;khilman@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
With patch #8067/1 ("zImage: ensure header in LE format for BE8 kernels")
applied, it is no longer possible to determine the endianness of a compiled
kernel image.  This normally shouldn't matter to the boot environment,
except for those cases where the selection of a ramdisk or root filesystem
with a matching endianness has to be automated.

Let's add a flag to the zImage header indicating the actual endianness.
Four bytes from offset 0x30 can be interpreted as follows:

	04 03 02 01	big endian kernel

	01 02 03 04	little endian kernel

Anything else should be interpreted as "unknown", in which case it is
most likely that patch #8067/1 was not applied either and the zImage
magic number at offset 0x24 could be used instead to determine
endianness. No zImage before this patch ever produced 0x01020304 nor
0x04030201 at offset 0x30 so there is no confusion possible.

Signed-off-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Acked-by: Kevin Hilman &lt;khilman@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
</feed>
