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<title>linux-toradex.git/arch/arm/include/asm/entry-macro-multi.S, branch v4.10</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>ARM: replace BSYM() with badr assembly macro</title>
<updated>2015-05-08T16:33:50+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2015-04-21T13:17:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=14327c662822e5e874cb971a7162067519300ca8'/>
<id>14327c662822e5e874cb971a7162067519300ca8</id>
<content type='text'>
BSYM() was invented to allow us to work around a problem with the
assembler, where local symbols resolved by the assembler for the 'adr'
instruction did not take account of their ISA.

Since we don't want BSYM() used elsewhere, replace BSYM() with a new
macro 'badr', which is like the 'adr' pseudo-op, but with the BSYM()
mechanics integrated into it.  This ensures that the BSYM()-ification
is only used in conjunction with 'adr'.

Acked-by: Dave Martin &lt;Dave.Martin@arm.com&gt;
Acked-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
BSYM() was invented to allow us to work around a problem with the
assembler, where local symbols resolved by the assembler for the 'adr'
instruction did not take account of their ISA.

Since we don't want BSYM() used elsewhere, replace BSYM() with a new
macro 'badr', which is like the 'adr' pseudo-op, but with the BSYM()
mechanics integrated into it.  This ensures that the BSYM()-ification
is only used in conjunction with 'adr'.

Acked-by: Dave Martin &lt;Dave.Martin@arm.com&gt;
Acked-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+</title>
<updated>2014-07-18T11:29:04+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2014-06-30T15:29:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=6ebbf2ce437b33022d30badd49dc94d33ecfa498'/>
<id>6ebbf2ce437b33022d30badd49dc94d33ecfa498</id>
<content type='text'>
ARMv6 and greater introduced a new instruction ("bx") which can be used
to return from function calls.  Recent CPUs perform better when the
"bx lr" instruction is used rather than the "mov pc, lr" instruction,
and this sequence is strongly recommended to be used by the ARM
architecture manual (section A.4.1.1).

We provide a new macro "ret" with all its variants for the condition
code which will resolve to the appropriate instruction.

Rather than doing this piecemeal, and miss some instances, change all
the "mov pc" instances to use the new macro, with the exception of
the "movs" instruction and the kprobes code.  This allows us to detect
the "mov pc, lr" case and fix it up - and also gives us the possibility
of deploying this for other registers depending on the CPU selection.

Reported-by: Will Deacon &lt;will.deacon@arm.com&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt; # Tegra Jetson TK1
Tested-by: Robert Jarzmik &lt;robert.jarzmik@free.fr&gt; # mioa701_bootresume.S
Tested-by: Andrew Lunn &lt;andrew@lunn.ch&gt; # Kirkwood
Tested-by: Shawn Guo &lt;shawn.guo@freescale.com&gt;
Tested-by: Tony Lindgren &lt;tony@atomide.com&gt; # OMAPs
Tested-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt; # Armada XP, 375, 385
Acked-by: Sekhar Nori &lt;nsekhar@ti.com&gt; # DaVinci
Acked-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt; # kvm/hyp
Acked-by: Haojian Zhuang &lt;haojian.zhuang@gmail.com&gt; # PXA3xx
Acked-by: Stefano Stabellini &lt;stefano.stabellini@eu.citrix.com&gt; # Xen
Tested-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt; # ARMv7M
Tested-by: Simon Horman &lt;horms+renesas@verge.net.au&gt; # Shmobile
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
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<pre>
ARMv6 and greater introduced a new instruction ("bx") which can be used
to return from function calls.  Recent CPUs perform better when the
"bx lr" instruction is used rather than the "mov pc, lr" instruction,
and this sequence is strongly recommended to be used by the ARM
architecture manual (section A.4.1.1).

We provide a new macro "ret" with all its variants for the condition
code which will resolve to the appropriate instruction.

Rather than doing this piecemeal, and miss some instances, change all
the "mov pc" instances to use the new macro, with the exception of
the "movs" instruction and the kprobes code.  This allows us to detect
the "mov pc, lr" case and fix it up - and also gives us the possibility
of deploying this for other registers depending on the CPU selection.

Reported-by: Will Deacon &lt;will.deacon@arm.com&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt; # Tegra Jetson TK1
Tested-by: Robert Jarzmik &lt;robert.jarzmik@free.fr&gt; # mioa701_bootresume.S
Tested-by: Andrew Lunn &lt;andrew@lunn.ch&gt; # Kirkwood
Tested-by: Shawn Guo &lt;shawn.guo@freescale.com&gt;
Tested-by: Tony Lindgren &lt;tony@atomide.com&gt; # OMAPs
Tested-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt; # Armada XP, 375, 385
Acked-by: Sekhar Nori &lt;nsekhar@ti.com&gt; # DaVinci
Acked-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt; # kvm/hyp
Acked-by: Haojian Zhuang &lt;haojian.zhuang@gmail.com&gt; # PXA3xx
Acked-by: Stefano Stabellini &lt;stefano.stabellini@eu.citrix.com&gt; # Xen
Tested-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt; # ARMv7M
Tested-by: Simon Horman &lt;horms+renesas@verge.net.au&gt; # Shmobile
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: gic: consolidate PPI handling</title>
<updated>2011-10-23T12:32:29+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2011-07-20T15:24:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=292b293ceef2eda1f96f0c90b96e954d7bdabd1c'/>
<id>292b293ceef2eda1f96f0c90b96e954d7bdabd1c</id>
<content type='text'>
PPI handling is a bit of an odd beast. It uses its own low level
handling code and is hardwired to the local timers (hence lacking
a registration interface).

Instead, switch the low handling to the normal SPI handling code.
PPIs are handled by the handle_percpu_devid_irq flow.

This also allows the removal of some duplicated code.

Cc: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
Cc: David Brown &lt;davidb@codeaurora.org&gt;
Cc: Bryan Huntsman &lt;bryanh@codeaurora.org&gt;
Cc: Tony Lindgren &lt;tony@atomide.com&gt;
Cc: Paul Mundt &lt;lethal@linux-sh.org&gt;
Cc: Magnus Damm &lt;magnus.damm@gmail.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: David Brown &lt;davidb@codeaurora.org&gt;
Tested-by: David Brown &lt;davidb@codeaurora.org&gt;
Tested-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
PPI handling is a bit of an odd beast. It uses its own low level
handling code and is hardwired to the local timers (hence lacking
a registration interface).

Instead, switch the low handling to the normal SPI handling code.
PPIs are handled by the handle_percpu_devid_irq flow.

This also allows the removal of some duplicated code.

Cc: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
Cc: David Brown &lt;davidb@codeaurora.org&gt;
Cc: Bryan Huntsman &lt;bryanh@codeaurora.org&gt;
Cc: Tony Lindgren &lt;tony@atomide.com&gt;
Cc: Paul Mundt &lt;lethal@linux-sh.org&gt;
Cc: Magnus Damm &lt;magnus.damm@gmail.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: David Brown &lt;davidb@codeaurora.org&gt;
Tested-by: David Brown &lt;davidb@codeaurora.org&gt;
Tested-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: entry: re-allocate registers in irq entry assembly macros</title>
<updated>2011-07-02T09:56:10+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2011-06-26T09:34:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d9600c99c549732a501cb727157800623a06175d'/>
<id>d9600c99c549732a501cb727157800623a06175d</id>
<content type='text'>
This avoids the irq entry assembly corrupting r5, thereby allowing it
to be preserved through to the svc exit code.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This avoids the irq entry assembly corrupting r5, thereby allowing it
to be preserved through to the svc exit code.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 6959/1: SMP build fix for entry-macro-multi.S</title>
<updated>2011-06-17T10:25:03+00:00</updated>
<author>
<name>Magnus Damm</name>
<email>damm@opensource.se</email>
</author>
<published>2011-06-13T05:46:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2bc58a6fd76f89052c7f151d78fb2d8b804aacfe'/>
<id>2bc58a6fd76f89052c7f151d78fb2d8b804aacfe</id>
<content type='text'>
The assembly code in entry-macro-multi.S does not build without
the include asm/assembler.h in the case of CONFIG_SMP=y.

Fixes the rather theoretical SMP build of mach-shmobile/entry-intc.c:

arch/arm/include/asm/entry-macro-multi.S: Assembler messages:
arch/arm/include/asm/entry-macro-multi.S:20: Error: bad instruction `alt_smp(test_for_ipi r0,r6,r5,lr)'
arch/arm/include/asm/entry-macro-multi.S:20: Error: bad instruction `alt_up_b(9997f)'
make[1]: *** [arch/arm/mach-shmobile/entry-intc.o] Error 1
make: *** [arch/arm/mach-shmobile] Error 2
make: *** Waiting for unfinished jobs....

Signed-off-by: Magnus Damm &lt;damm@opensource.se&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The assembly code in entry-macro-multi.S does not build without
the include asm/assembler.h in the case of CONFIG_SMP=y.

Fixes the rather theoretical SMP build of mach-shmobile/entry-intc.c:

arch/arm/include/asm/entry-macro-multi.S: Assembler messages:
arch/arm/include/asm/entry-macro-multi.S:20: Error: bad instruction `alt_smp(test_for_ipi r0,r6,r5,lr)'
arch/arm/include/asm/entry-macro-multi.S:20: Error: bad instruction `alt_up_b(9997f)'
make[1]: *** [arch/arm/mach-shmobile/entry-intc.o] Error 1
make: *** [arch/arm/mach-shmobile] Error 2
make: *** Waiting for unfinished jobs....

Signed-off-by: Magnus Damm &lt;damm@opensource.se&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'smp' into misc</title>
<updated>2011-01-06T22:32:03+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2011-01-06T22:31:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4ec3eb13634529c0bc7466658d84d0bbe3244aea'/>
<id>4ec3eb13634529c0bc7466658d84d0bbe3244aea</id>
<content type='text'>
Conflicts:
	arch/arm/kernel/entry-armv.S
	arch/arm/mm/ioremap.c
</content>
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<pre>
Conflicts:
	arch/arm/kernel/entry-armv.S
	arch/arm/mm/ioremap.c
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 6538/1: Subarch IRQ handler macros V3</title>
<updated>2010-12-24T09:47:36+00:00</updated>
<author>
<name>Magnus Damm</name>
<email>damm@opensource.se</email>
</author>
<published>2010-12-22T12:20:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=cd544ce754ac2432ffcc0626ea802d2b30876b50'/>
<id>cd544ce754ac2432ffcc0626ea802d2b30876b50</id>
<content type='text'>
Per subarch interrupt handler macros V3.

This patch breaks out code from the irq_handler macro
into arch_irq_handler and arch_irq_handler_default.

The macros are put in the header file "entry-macro-multi.S"

The arch_irq_handler_default macro is designed to be
used by irq_handler in entry-armv.S while arch_irq_handler
is suitable for per-subarch use.

Signed-off-by: Magnus Damm &lt;damm@opensource.se&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Per subarch interrupt handler macros V3.

This patch breaks out code from the irq_handler macro
into arch_irq_handler and arch_irq_handler_default.

The macros are put in the header file "entry-macro-multi.S"

The arch_irq_handler_default macro is designed to be
used by irq_handler in entry-armv.S while arch_irq_handler
is suitable for per-subarch use.

Signed-off-by: Magnus Damm &lt;damm@opensource.se&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
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