linux-toradex.git/arch/arm/include/asm/pgtable.h, branch v3.5-rc2 Linux kernel for Apalis and Colibri modules Merge branch 'devel-stable' into for-linus 2012-01-05T13:24:33+00:00 Russell King rmk+kernel@arm.linux.org.uk 2012-01-05T13:24:33+00:00 2e0e943436912ffe0848ece58167edfe754edb96 Conflicts: arch/arm/kernel/setup.c arch/arm/mach-shmobile/board-kota2.c 
Conflicts:
	arch/arm/kernel/setup.c
	arch/arm/mach-shmobile/board-kota2.c
Merge branch 'vmalloc' of git://git.linaro.org/people/nico/linux into devel-stable 2012-01-04T09:01:51+00:00 Russell King rmk+kernel@arm.linux.org.uk 2012-01-04T09:01:51+00:00 e0b58ee8c429197c3747b1f03dd1cb9dd082bc0e 






Revert "ARM: move VMALLOC_END down temporarily for shmobile"
2012-01-03T04:14:35+00:00

Nicolas Pitre
nicolas.pitre@linaro.org

2012-01-03T04:00:32+00:00

9561f4e052a06167694e110d76ce3a5e38b59522

This reverts commit 0af362f8440a78b970d5f215e234420fa87d0f3f as shmobile
is not using a non-standard memory layout anymore.

Signed-off-by: Nicolas Pitre <nico@linaro.org>





This reverts commit 0af362f8440a78b970d5f215e234420fa87d0f3f as shmobile
is not using a non-standard memory layout anymore.

Signed-off-by: Nicolas Pitre <nico@linaro.org>







Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux into devel-stable
2011-12-08T18:02:04+00:00

Russell King
rmk+kernel@arm.linux.org.uk

2011-12-08T18:02:04+00:00

6ae25a5b9d7ba86d6ac19c403dfa57dae6caa73d

Conflicts:
	arch/arm/mm/ioremap.c





Conflicts:
	arch/arm/mm/ioremap.c







ARM: LPAE: Introduce the 3-level page table format definitions
2011-12-08T10:30:39+00:00

Catalin Marinas
catalin.marinas@arm.com

2011-11-22T17:30:29+00:00

dcfdae04bd92e8a2ea155db0e21e3bddc09e0a89

This patch introduces the pgtable-3level*.h files with definitions
specific to the LPAE page table format (3 levels of page tables).

Each table is 4KB and has 512 64-bit entries. An entry can point to a
40-bit physical address. The young, write and exec software bits share
the corresponding hardware bits (negated). Other software bits use spare
bits in the PTE.

The patch also changes some variable types from unsigned long or int to
pteval_t or pgprot_t.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>





This patch introduces the pgtable-3level*.h files with definitions
specific to the LPAE page table format (3 levels of page tables).

Each table is 4KB and has 512 64-bit entries. An entry can point to a
40-bit physical address. The young, write and exec software bits share
the corresponding hardware bits (negated). Other software bits use spare
bits in the PTE.

The patch also changes some variable types from unsigned long or int to
pteval_t or pgprot_t.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>







ARM: LPAE: Move page table maintenance macros to pgtable-2level.h
2011-12-08T10:30:37+00:00

Catalin Marinas
catalin.marinas@arm.com

2011-11-22T17:30:28+00:00

e0c0313bd720977a7ed01dc48f0762a3ddec607f

The page table maintenance macros need to be duplicated between the
classic and the LPAE MMU so this patch moves those that are not common
to the pgtable-2level.h file.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>





The page table maintenance macros need to be duplicated between the
classic and the LPAE MMU so this patch moves those that are not common
to the pgtable-2level.h file.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>







ARM: pgtable: switch to use pgtable-nopud.h
2011-12-08T10:30:36+00:00

Russell King
rmk+kernel@arm.linux.org.uk

2011-11-22T17:30:28+00:00

a32618d28dbe6e9bf8ec508ccbc3561a7d7d32f0

Nick Piggin noted upon introducing 4level-fixup.h:

| Add a temporary "fallback" header so architectures can run with
| the 4level pagetables patch without modification. All architectures
| should be converted to use the folding headers (include/asm-generic/
| pgtable-nop?d.h) as soon as possible, and the fallback header removed.

This makes ARM compliant with this statement.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>





Nick Piggin noted upon introducing 4level-fixup.h:

| Add a temporary "fallback" header so architectures can run with
| the 4level pagetables patch without modification. All architectures
| should be converted to use the folding headers (include/asm-generic/
| pgtable-nop?d.h) as soon as possible, and the fallback header removed.

This makes ARM compliant with this statement.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>







Merge branch 'kexec/idmap' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into devel-stable
2011-12-06T20:27:54+00:00

Russell King
rmk+kernel@arm.linux.org.uk

2011-12-06T20:27:54+00:00

3ee0fc5ca129cbae81c073756febcb1c552af446












ARM: idmap: populate identity map pgd at init time using .init.text
2011-12-06T14:04:14+00:00

Will Deacon
will.deacon@arm.com

2011-09-30T10:43:29+00:00

8903826d0cd99aed9267e792d38284cf3092042b

When disabling and re-enabling the MMU, it is necessary to take out an
identity mapping for the code that manipulates the SCTLR in order to
avoid it disappearing from under our feet. This is useful when soft
rebooting and returning from CPU suspend.

This patch allocates a set of page tables during boot and populates them
with an identity mapping for the .idmap.text section. This means that
users of the identity map do not need to manage their own pgd and can
instead annotate their functions with __idmap or, in the case of assembly
code, place them in the correct section.

Acked-by: Dave Martin <dave.martin@linaro.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>





When disabling and re-enabling the MMU, it is necessary to take out an
identity mapping for the code that manipulates the SCTLR in order to
avoid it disappearing from under our feet. This is useful when soft
rebooting and returning from CPU suspend.

This patch allocates a set of page tables during boot and populates them
with an identity mapping for the .idmap.text section. This means that
users of the identity map do not need to manage their own pgd and can
instead annotate their functions with __idmap or, in the case of assembly
code, place them in the correct section.

Acked-by: Dave Martin <dave.martin@linaro.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>







ARM: 7169/1: topdown mmap support
2011-12-06T11:15:25+00:00

Rob Herring
rob.herring@calxeda.com

2011-11-22T03:01:07+00:00

7dbaa466780a754154531b44c2086f6618cee3a8

Similar to other architectures, this adds topdown mmap support in user
process address space allocation policy. This allows mmap sizes greater
than 2GB. This support is largely copied from MIPS and the generic
implementations.

The address space randomization is moved into arch_pick_mmap_layout.

Tested on V-Express with ubuntu and a mmap test from here:
https://bugs.launchpad.net/bugs/861296

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>





Similar to other architectures, this adds topdown mmap support in user
process address space allocation policy. This allows mmap sizes greater
than 2GB. This support is largely copied from MIPS and the generic
implementations.

The address space randomization is moved into arch_pick_mmap_layout.

Tested on V-Express with ubuntu and a mmap test from here:
https://bugs.launchpad.net/bugs/861296

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>