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<title>linux-toradex.git/arch/arm/include/asm/tls.h, branch v3.0.8</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>ARM: v6k: select TLS register code according to V6 variants</title>
<updated>2011-02-02T21:23:29+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2011-01-17T16:38:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=37bc618fe2689a7f8de8fac82e72b00ecea4d43d'/>
<id>37bc618fe2689a7f8de8fac82e72b00ecea4d43d</id>
<content type='text'>
If CONFIG_CPU_V6 is enabled, we may or may not have the TLS register.
Use the conditional code which copes with this variability.  Otherwise,
if CONFIG_CPU_32v6K is set, we know we have the TLS register on all
supported CPUs, so use it unconditionally.

Acked-by: Nicolas Pitre &lt;nicolas.pitre@linaro.org&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Tested-by: Sourav Poddar &lt;sourav.poddar@ti.com&gt;
Tested-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
If CONFIG_CPU_V6 is enabled, we may or may not have the TLS register.
Use the conditional code which copes with this variability.  Otherwise,
if CONFIG_CPU_32v6K is set, we know we have the TLS register on all
supported CPUs, so use it unconditionally.

Acked-by: Nicolas Pitre &lt;nicolas.pitre@linaro.org&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Tested-by: Sourav Poddar &lt;sourav.poddar@ti.com&gt;
Tested-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 6207/1: Replace CONFIG_HAS_TLS_REG with HWCAP_TLS and check for it on V6</title>
<updated>2010-07-09T13:41:35+00:00</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2010-07-05T13:53:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f159f4ed55bb0fa5470800641e03a13a7e0eae6e'/>
<id>f159f4ed55bb0fa5470800641e03a13a7e0eae6e</id>
<content type='text'>
The TLS register is only available on ARM1136 r1p0 and later.
Set HWCAP_TLS flags if hardware TLS is available and test for
it if CONFIG_CPU_32v6K is not set for V6.

Note that we set the TLS instruction in __kuser_get_tls
dynamically as suggested by Jamie Lokier &lt;jamie@shareable.org&gt;.

Also the __switch_to code is optimized out in most cases as
suggested by Nicolas Pitre &lt;nico@fluxnic.net&gt;.

Reviewed-by: Nicolas Pitre &lt;nicolas.pitre@linaro.org&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The TLS register is only available on ARM1136 r1p0 and later.
Set HWCAP_TLS flags if hardware TLS is available and test for
it if CONFIG_CPU_32v6K is not set for V6.

Note that we set the TLS instruction in __kuser_get_tls
dynamically as suggested by Jamie Lokier &lt;jamie@shareable.org&gt;.

Also the __switch_to code is optimized out in most cases as
suggested by Nicolas Pitre &lt;nico@fluxnic.net&gt;.

Reviewed-by: Nicolas Pitre &lt;nicolas.pitre@linaro.org&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
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