<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/arm/include, branch tegra</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>ARM: fix put_user() for gcc-8</title>
<updated>2018-09-12T08:21:52+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2018-07-26T08:13:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=248c6a9a658f061f4f4ee0ea467c67f0c3655ebf'/>
<id>248c6a9a658f061f4f4ee0ea467c67f0c3655ebf</id>
<content type='text'>
Building kernels before linux-4.7 with gcc-8 results in many build failures
when gcc triggers a check that was meant to catch broken compilers:

/tmp/ccCGMQmS.s:648: Error: .err encountered

According to the discussion in the gcc bugzilla, a local "register
asm()" variable is still supposed to be the correct way to force an
inline assembly to use a particular register, but marking it 'const'
lets the compiler do optimizations that break that, i.e the compiler is
free to treat the variable as either 'const' or 'register' in that case.

Upstream commit 9f73bd8bb445 ("ARM: uaccess: remove put_user() code
duplication") fixed this problem in linux-4.8 as part of a larger change,
but seems a little too big to be backported to 4.4.

Let's take the simplest fix and change only the one broken line in the
same way as newer kernels.

Suggested-by: Bernd Edlinger &lt;bernd.edlinger@hotmail.de&gt;
Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85745
Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86673
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

(cherry picked from commit 0ca85fc310e8c24cba10ed241a0188795e177683)

/tmp/ccmcXtfu.s: Assembler messages:
/tmp/ccmcXtfu.s:1441: Error: .err encountered

Signed-off-by: Max Krummenacher &lt;max.krummenacher@toradex.com&gt;

Conflicts:
	arch/arm/include/asm/uaccess.h
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Building kernels before linux-4.7 with gcc-8 results in many build failures
when gcc triggers a check that was meant to catch broken compilers:

/tmp/ccCGMQmS.s:648: Error: .err encountered

According to the discussion in the gcc bugzilla, a local "register
asm()" variable is still supposed to be the correct way to force an
inline assembly to use a particular register, but marking it 'const'
lets the compiler do optimizations that break that, i.e the compiler is
free to treat the variable as either 'const' or 'register' in that case.

Upstream commit 9f73bd8bb445 ("ARM: uaccess: remove put_user() code
duplication") fixed this problem in linux-4.8 as part of a larger change,
but seems a little too big to be backported to 4.4.

Let's take the simplest fix and change only the one broken line in the
same way as newer kernels.

Suggested-by: Bernd Edlinger &lt;bernd.edlinger@hotmail.de&gt;
Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85745
Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86673
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

(cherry picked from commit 0ca85fc310e8c24cba10ed241a0188795e177683)

/tmp/ccmcXtfu.s: Assembler messages:
/tmp/ccmcXtfu.s:1441: Error: .err encountered

Signed-off-by: Max Krummenacher &lt;max.krummenacher@toradex.com&gt;

Conflicts:
	arch/arm/include/asm/uaccess.h
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 8158/1: LLVMLinux: use static inline in ARM ftrace.h</title>
<updated>2016-03-21T09:52:19+00:00</updated>
<author>
<name>Behan Webster</name>
<email>behanw@converseincode.com</email>
</author>
<published>2014-09-24T00:06:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2cce0692e2b2f5a34332d4d105eb7d5a6ddeb4d3'/>
<id>2cce0692e2b2f5a34332d4d105eb7d5a6ddeb4d3</id>
<content type='text'>
With compilers which follow the C99 standard (like modern versions of gcc and
clang), "extern inline" does the wrong thing (emits code for an externally
linkable version of the inline function). In this case using static inline
and removing the NULL version of return_address in return_address.c does
the right thing.

Signed-off-by: Behan Webster &lt;behanw@converseincode.com&gt;
Reviewed-by: Mark Charlebois &lt;charlebm@gmail.com&gt;
Acked-by: Steven Rostedt &lt;rostedt@goodmis.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
(cherry picked from commit aeea3592a13bf12861943e44fc48f1f270941f8d)
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
With compilers which follow the C99 standard (like modern versions of gcc and
clang), "extern inline" does the wrong thing (emits code for an externally
linkable version of the inline function). In this case using static inline
and removing the NULL version of return_address in return_address.c does
the right thing.

Signed-off-by: Behan Webster &lt;behanw@converseincode.com&gt;
Reviewed-by: Mark Charlebois &lt;charlebm@gmail.com&gt;
Acked-by: Steven Rostedt &lt;rostedt@goodmis.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
(cherry picked from commit aeea3592a13bf12861943e44fc48f1f270941f8d)
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 7115/4: move __exception and friends to asm/exception.h</title>
<updated>2012-11-26T15:54:33+00:00</updated>
<author>
<name>Jamie Iles</name>
<email>jamie@jamieiles.com</email>
</author>
<published>2011-10-08T10:20:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b796c0373ef4bb04d166f3d87b7422991fd810cb'/>
<id>b796c0373ef4bb04d166f3d87b7422991fd810cb</id>
<content type='text'>
The definition of __exception_irq_entry for
CONFIG_FUNCTION_GRAPH_TRACER=y needs linux/ftrace.h, but this creates a
circular dependency with it's current home in asm/system.h. Create
asm/exception.h and update all current users.

v4:	- rebase to rmk/for-next
v3:	- remove redundant includes of linux/ftrace.h
v2:	- document the usage restricitions of __exception*

Cc: Zoltan Devai &lt;zdevai@gmail.com&gt;
Signed-off-by: Jamie Iles &lt;jamie@jamieiles.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The definition of __exception_irq_entry for
CONFIG_FUNCTION_GRAPH_TRACER=y needs linux/ftrace.h, but this creates a
circular dependency with it's current home in asm/system.h. Create
asm/exception.h and update all current users.

v4:	- rebase to rmk/for-next
v3:	- remove redundant includes of linux/ftrace.h
v2:	- document the usage restricitions of __exception*

Cc: Zoltan Devai &lt;zdevai@gmail.com&gt;
Signed-off-by: Jamie Iles &lt;jamie@jamieiles.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: mutex: use generic atomic_dec-based implementation for ARMv6+</title>
<updated>2012-09-10T21:29:19+00:00</updated>
<author>
<name>Will Deacon</name>
<email>will.deacon@arm.com</email>
</author>
<published>2012-08-13T17:38:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=75bdd482816eba85414a71b86535fa87db336aa3'/>
<id>75bdd482816eba85414a71b86535fa87db336aa3</id>
<content type='text'>
Commit a76d7bd96d65 ("ARM: 7467/1: mutex: use generic xchg-based
implementation for ARMv6+") removed the barrier-less, ARM-specific
mutex implementation in favour of the generic xchg-based code.

Since then, a bug was uncovered in the xchg code when running on SMP
platforms, due to interactions between the locking paths and the
MUTEX_SPIN_ON_OWNER code. This was fixed in 0bce9c46bf3b ("mutex: place
lock in contended state after fastpath_lock failure"), however, the
atomic_dec-based mutex algorithm is now marginally more efficient for
ARM (~0.5% improvement in hackbench scores on dual A15).

This patch moves ARMv6+ platforms to the atomic_dec-based mutex code.

Change-Id: I8f64e98ccb61cc1cb9cb68ee15e55d8a792792f5
Cc: Nicolas Pitre &lt;nico@fluxnic.net&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Acked-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Reviewed-on: http://git-master/r/130941
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani &lt;bnihalani@nvidia.com&gt;
Tested-by: Bharat Nihalani &lt;bnihalani@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Commit a76d7bd96d65 ("ARM: 7467/1: mutex: use generic xchg-based
implementation for ARMv6+") removed the barrier-less, ARM-specific
mutex implementation in favour of the generic xchg-based code.

Since then, a bug was uncovered in the xchg code when running on SMP
platforms, due to interactions between the locking paths and the
MUTEX_SPIN_ON_OWNER code. This was fixed in 0bce9c46bf3b ("mutex: place
lock in contended state after fastpath_lock failure"), however, the
atomic_dec-based mutex algorithm is now marginally more efficient for
ARM (~0.5% improvement in hackbench scores on dual A15).

This patch moves ARMv6+ platforms to the atomic_dec-based mutex code.

Change-Id: I8f64e98ccb61cc1cb9cb68ee15e55d8a792792f5
Cc: Nicolas Pitre &lt;nico@fluxnic.net&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Acked-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Reviewed-on: http://git-master/r/130941
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani &lt;bnihalani@nvidia.com&gt;
Tested-by: Bharat Nihalani &lt;bnihalani@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 7467/1: mutex: use generic xchg-based implementation for ARMv6+</title>
<updated>2012-09-10T21:29:16+00:00</updated>
<author>
<name>Will Deacon</name>
<email>will.deacon@arm.com</email>
</author>
<published>2012-08-24T12:36:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c56d1413ee5fb5ae24f36e9e7b8e578f3d91db15'/>
<id>c56d1413ee5fb5ae24f36e9e7b8e578f3d91db15</id>
<content type='text'>
The open-coded mutex implementation for ARMv6+ cores suffers from a
severe lack of barriers, so in the uncontended case we don't actually
protect any accesses performed during the critical section.

Furthermore, the code is largely a duplication of the ARMv6+ atomic_dec
code but optimised to remove a branch instruction, as the mutex fastpath
was previously inlined. Now that this is executed out-of-line, we can
reuse the atomic access code for the locking (in fact, we use the xchg
code as this produces shorter critical sections).

This patch uses the generic xchg based implementation for mutexes on
ARMv6+, which introduces barriers to the lock/unlock operations and also
has the benefit of removing a fair amount of inline assembly code.

Change-Id: I58e3ca4d2740a834d30b54fc35742fa2df7792ad
Cc: &lt;stable@vger.kernel.org&gt; : 0bce9c46: mutex: Place lock in contended...
Cc: &lt;stable@vger.kernel.org&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Reported-by: Shan Kang &lt;kangshan0910@gmail.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Reviewed-on: http://git-master/r/130940
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani &lt;bnihalani@nvidia.com&gt;
Tested-by: Bharat Nihalani &lt;bnihalani@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The open-coded mutex implementation for ARMv6+ cores suffers from a
severe lack of barriers, so in the uncontended case we don't actually
protect any accesses performed during the critical section.

Furthermore, the code is largely a duplication of the ARMv6+ atomic_dec
code but optimised to remove a branch instruction, as the mutex fastpath
was previously inlined. Now that this is executed out-of-line, we can
reuse the atomic access code for the locking (in fact, we use the xchg
code as this produces shorter critical sections).

This patch uses the generic xchg based implementation for mutexes on
ARMv6+, which introduces barriers to the lock/unlock operations and also
has the benefit of removing a fair amount of inline assembly code.

Change-Id: I58e3ca4d2740a834d30b54fc35742fa2df7792ad
Cc: &lt;stable@vger.kernel.org&gt; : 0bce9c46: mutex: Place lock in contended...
Cc: &lt;stable@vger.kernel.org&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Reported-by: Shan Kang &lt;kangshan0910@gmail.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Reviewed-on: http://git-master/r/130940
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani &lt;bnihalani@nvidia.com&gt;
Tested-by: Bharat Nihalani &lt;bnihalani@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: cache-l2x0: fix L2 maintenance for R3P1_50</title>
<updated>2012-08-28T19:37:49+00:00</updated>
<author>
<name>Kirill Artamonov</name>
<email>kartamonov@nvidia.com</email>
</author>
<published>2012-08-21T12:02:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a4e44614a5bae9e714ac99c43a6085194edb3c21'/>
<id>a4e44614a5bae9e714ac99c43a6085194edb3c21</id>
<content type='text'>
Do flush and clear by set/way instead of by-way by enabling
errata 727915 for pl310 revision R3P1_50.
By-way maintenance doesn't work with enabled lp2_in_idle on
Tegra3 platform using R3P1_50 revision of pl310.

Debug register access causes hang when
CONFIG_TRUSTED_FOUNDATIONS is defined. Don't access those
regeisters if CONFIG_TRUSTED_FOUNDATIONS is defined.

bug 983964

Signed-off-by: Kirill Artamonov &lt;kartamonov@nvidia.com&gt;
Change-Id: I76a3a9ef9dbcf86140ee26752202bf25542144e6
Reviewed-on: http://git-master/r/125153
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy &lt;vdumpa@nvidia.com&gt;
Reviewed-by: Antti Miettinen &lt;amiettinen@nvidia.com&gt;
Tested-by: Antti Miettinen &lt;amiettinen@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen &lt;jtukkinen@nvidia.com&gt;
Reviewed-by: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Do flush and clear by set/way instead of by-way by enabling
errata 727915 for pl310 revision R3P1_50.
By-way maintenance doesn't work with enabled lp2_in_idle on
Tegra3 platform using R3P1_50 revision of pl310.

Debug register access causes hang when
CONFIG_TRUSTED_FOUNDATIONS is defined. Don't access those
regeisters if CONFIG_TRUSTED_FOUNDATIONS is defined.

bug 983964

Signed-off-by: Kirill Artamonov &lt;kartamonov@nvidia.com&gt;
Change-Id: I76a3a9ef9dbcf86140ee26752202bf25542144e6
Reviewed-on: http://git-master/r/125153
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy &lt;vdumpa@nvidia.com&gt;
Reviewed-by: Antti Miettinen &lt;amiettinen@nvidia.com&gt;
Tested-by: Antti Miettinen &lt;amiettinen@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen &lt;jtukkinen@nvidia.com&gt;
Reviewed-by: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 7017/1: Use generic BUG() handler</title>
<updated>2012-08-02T01:10:12+00:00</updated>
<author>
<name>Vishal Singh</name>
<email>vissingh@nvidia.com</email>
</author>
<published>2012-07-27T06:58:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ee9e01c5345ff373fa1f64024dde5f06d80d498f'/>
<id>ee9e01c5345ff373fa1f64024dde5f06d80d498f</id>
<content type='text'>
ARM uses its own BUG() handler which makes its output slightly different
from other archtectures.

One of the problems is that the ARM implementation doesn't report the
function
with the BUG() in it, but always reports the PC being in __bug(). The
generic
implementation doesn't have this problem.

Currently we get something like:

kernel BUG at fs/proc/breakme.c:35!
Unable to handle kernel NULL pointer dereference at virtual address
00000000
...
PC is at __bug+0x20/0x2c

With this patch it displays:

kernel BUG at fs/proc/breakme.c:35!
Internal error: Oops - undefined instruction: 0 [#1] PREEMPT SMP
...
PC is at write_breakme+0xd0/0x1b4

This implementation uses an undefined instruction to implement BUG, and
sets up
a bug table containing the relevant information. Many versions of gcc do
not
support %c properly for ARM (inserting a # when they shouldn't) so we
work
around this using distasteful macro magic.

v1: Initial version to replace existing ARM BUG() implementation with
something
more similar to other architectures.

v2: Add Thumb support, remove backtrace whitespace output changes.
Change to
use macros instead of requiring the asm %d flag to work (thanks to
Dave Martin &lt;dave.martin@linaro.org&gt;)

v3: Remove old BUG() implementation in favor of this one.
Remove the Backtrace: message (will submit this separately).
Rebase to linux-2.6.git master.

v4: Allow BUGS in modules (these were not reported correctly in v3)
(thanks to Stephen Boyd &lt;sboyd@codeaurora.org&gt; for suggesting that.)
Remove __bug() as this is no longer needed.

v5: Add %progbits as the section flags.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Tested-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
(cherry picked from commit 87e040b6456fd3416a1f6831c1eedaef5c0a94ff)

Change-Id: Ic7692288dff6e4a15c732eb030295bd196a87fb4
Signed-off-by: Manoj Chourasia &lt;mchourasia@nvidia.com&gt;
Reviewed-on: http://git-master/r/117356
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Vishal Singh &lt;vissingh@nvidia.com&gt;
Reviewed-by: Sandeep Trasi &lt;strasi@nvidia.com&gt;
(cherry picked from commit 6708ffd0b44f4d09d8fe745471641545655091fb)
Reviewed-on: http://git-master/r/119328
Reviewed-by: Bob Johnston &lt;bjohnston@nvidia.com&gt;
Reviewed-by: Varun Wadekar &lt;vwadekar@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
ARM uses its own BUG() handler which makes its output slightly different
from other archtectures.

One of the problems is that the ARM implementation doesn't report the
function
with the BUG() in it, but always reports the PC being in __bug(). The
generic
implementation doesn't have this problem.

Currently we get something like:

kernel BUG at fs/proc/breakme.c:35!
Unable to handle kernel NULL pointer dereference at virtual address
00000000
...
PC is at __bug+0x20/0x2c

With this patch it displays:

kernel BUG at fs/proc/breakme.c:35!
Internal error: Oops - undefined instruction: 0 [#1] PREEMPT SMP
...
PC is at write_breakme+0xd0/0x1b4

This implementation uses an undefined instruction to implement BUG, and
sets up
a bug table containing the relevant information. Many versions of gcc do
not
support %c properly for ARM (inserting a # when they shouldn't) so we
work
around this using distasteful macro magic.

v1: Initial version to replace existing ARM BUG() implementation with
something
more similar to other architectures.

v2: Add Thumb support, remove backtrace whitespace output changes.
Change to
use macros instead of requiring the asm %d flag to work (thanks to
Dave Martin &lt;dave.martin@linaro.org&gt;)

v3: Remove old BUG() implementation in favor of this one.
Remove the Backtrace: message (will submit this separately).
Rebase to linux-2.6.git master.

v4: Allow BUGS in modules (these were not reported correctly in v3)
(thanks to Stephen Boyd &lt;sboyd@codeaurora.org&gt; for suggesting that.)
Remove __bug() as this is no longer needed.

v5: Add %progbits as the section flags.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Tested-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
(cherry picked from commit 87e040b6456fd3416a1f6831c1eedaef5c0a94ff)

Change-Id: Ic7692288dff6e4a15c732eb030295bd196a87fb4
Signed-off-by: Manoj Chourasia &lt;mchourasia@nvidia.com&gt;
Reviewed-on: http://git-master/r/117356
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Vishal Singh &lt;vissingh@nvidia.com&gt;
Reviewed-by: Sandeep Trasi &lt;strasi@nvidia.com&gt;
(cherry picked from commit 6708ffd0b44f4d09d8fe745471641545655091fb)
Reviewed-on: http://git-master/r/119328
Reviewed-by: Bob Johnston &lt;bjohnston@nvidia.com&gt;
Reviewed-by: Varun Wadekar &lt;vwadekar@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: mm: cache-l2x0: Implement outer_clean_all()</title>
<updated>2012-07-19T21:48:50+00:00</updated>
<author>
<name>Kirill Artamonov</name>
<email>kartamonov@nvidia.com</email>
</author>
<published>2012-07-16T14:24:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=de14d57fdfbbd1de9a6c99cb52455d5bd6afb11f'/>
<id>de14d57fdfbbd1de9a6c99cb52455d5bd6afb11f</id>
<content type='text'>
There is already implemented full outer clean routine in
arch/arm/mm/cache-l2x0.c.

Make it possible to use it through outer_cache interface,
like other outer maintenance functions.

bug 983964

Change-Id: I47f1fad536c151c255e6a42d6517114c334ddfef
Reviewed-on: http://git-master/r/116074
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kirill Artamonov &lt;kartamonov@nvidia.com&gt;
Tested-by: Kirill Artamonov &lt;kartamonov@nvidia.com&gt;
Reviewed-by: Krishna Reddy &lt;vdumpa@nvidia.com&gt;
Reviewed-by: Justin Paver &lt;jpaver@nvidia.com&gt;
Reviewed-by: Bharat Nihalani &lt;bnihalani@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There is already implemented full outer clean routine in
arch/arm/mm/cache-l2x0.c.

Make it possible to use it through outer_cache interface,
like other outer maintenance functions.

bug 983964

Change-Id: I47f1fad536c151c255e6a42d6517114c334ddfef
Reviewed-on: http://git-master/r/116074
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kirill Artamonov &lt;kartamonov@nvidia.com&gt;
Tested-by: Kirill Artamonov &lt;kartamonov@nvidia.com&gt;
Reviewed-by: Krishna Reddy &lt;vdumpa@nvidia.com&gt;
Reviewed-by: Justin Paver &lt;jpaver@nvidia.com&gt;
Reviewed-by: Bharat Nihalani &lt;bnihalani@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Avoid aliasing mappings in DMA coherent allocator</title>
<updated>2012-06-13T09:48:30+00:00</updated>
<author>
<name>Manoj Chourasia</name>
<email>mchourasia@nvidia.com</email>
</author>
<published>2012-06-04T11:55:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=017d8bd2c4bd03afe04721476dd26388a4bfe7f6'/>
<id>017d8bd2c4bd03afe04721476dd26388a4bfe7f6</id>
<content type='text'>
Avoid multiple mappings with DMA coherent/writecombine allocator by pre-
allocating the mappings, and removing that memory from the system memory
mapping.  (See previous discussions on linux-arm-kernel as to why this
is bad.)

NB1: By default, we preallocate 2MB for DMA coherent, and 2MB for write
combine memory, rather than 1MB for each in case 1MB is not sufficient
for existing platform usage.  Platforms have the option of shrinking
this down to 1MB DMA / 1MB WC (or even 2MB DMA / 0MB WC) if they so wish.
The DMA memory must be a multiple of 1MB, the write combine memory must
also be a multiple of 1MB, and the two together must be a multiple of
2MB.

NB2: On ARMv6/7 where we use 'normal uncacheable' memory for both DMA
and WC, the two pools are combined into one, as was the case with the
previous implementation.

The down side to this change is that the memory is permanently set aside
for DMA purposes, but I believe that to be unavoidable if we are to
avoid the possibility of the cache getting in the way on VIPT CPUs.

This removes the last known offender (at this time) from the kernel.

Given that DMA memory is fully coherent by this patch, cache
invalidation/clean is not required and so, we skip cache related
activities for the memory managed by the DMA layer. The bus
address -&gt; virtual address conversion normally used in the calling
path and the fact that we remove kernel static mapping corresponding
to the DMA buffers leads to exceptions otherwise.

bug 876019
bug 965047
bug 987589

Change-Id: I72beb386605aafe1a301494a95a67d094ea6b2e4
Signed-off-by: Russell King &lt;rmk@arm.linux.org.uk&gt;
Signed-off-by: Manoj Chourasia &lt;mchourasia@nvidia.com&gt;
Reviewed-on: http://git-master/r/106212
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar &lt;vwadekar@nvidia.com&gt;
Reviewed-by: Krishna Reddy &lt;vdumpa@nvidia.com&gt;
Reviewed-by: Venkat Moganty &lt;vmoganty@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Avoid multiple mappings with DMA coherent/writecombine allocator by pre-
allocating the mappings, and removing that memory from the system memory
mapping.  (See previous discussions on linux-arm-kernel as to why this
is bad.)

NB1: By default, we preallocate 2MB for DMA coherent, and 2MB for write
combine memory, rather than 1MB for each in case 1MB is not sufficient
for existing platform usage.  Platforms have the option of shrinking
this down to 1MB DMA / 1MB WC (or even 2MB DMA / 0MB WC) if they so wish.
The DMA memory must be a multiple of 1MB, the write combine memory must
also be a multiple of 1MB, and the two together must be a multiple of
2MB.

NB2: On ARMv6/7 where we use 'normal uncacheable' memory for both DMA
and WC, the two pools are combined into one, as was the case with the
previous implementation.

The down side to this change is that the memory is permanently set aside
for DMA purposes, but I believe that to be unavoidable if we are to
avoid the possibility of the cache getting in the way on VIPT CPUs.

This removes the last known offender (at this time) from the kernel.

Given that DMA memory is fully coherent by this patch, cache
invalidation/clean is not required and so, we skip cache related
activities for the memory managed by the DMA layer. The bus
address -&gt; virtual address conversion normally used in the calling
path and the fact that we remove kernel static mapping corresponding
to the DMA buffers leads to exceptions otherwise.

bug 876019
bug 965047
bug 987589

Change-Id: I72beb386605aafe1a301494a95a67d094ea6b2e4
Signed-off-by: Russell King &lt;rmk@arm.linux.org.uk&gt;
Signed-off-by: Manoj Chourasia &lt;mchourasia@nvidia.com&gt;
Reviewed-on: http://git-master/r/106212
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar &lt;vwadekar@nvidia.com&gt;
Reviewed-by: Krishna Reddy &lt;vdumpa@nvidia.com&gt;
Reviewed-by: Venkat Moganty &lt;vmoganty@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "ARM: pm: preallocate a page table for suspend/resume"</title>
<updated>2012-04-19T14:41:54+00:00</updated>
<author>
<name>Sang-Hun Lee</name>
<email>sanlee@nvidia.com</email>
</author>
<published>2012-04-16T17:55:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4e1769f2438a00e67f71c887ce0f50efbcb9fc41'/>
<id>4e1769f2438a00e67f71c887ce0f50efbcb9fc41</id>
<content type='text'>
This reverts commit 55f0f45a45263ba26bd473f50f867d29dd836e46.

Bug 967887

Signed-off-by: Sang-Hun Lee &lt;sanlee@nvidia.com&gt;
Change-Id: I036e0bd4e391a17dec8fa0fe86da7eb6b98d503a
Reviewed-on: http://git-master/r/96795
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar &lt;vwadekar@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This reverts commit 55f0f45a45263ba26bd473f50f867d29dd836e46.

Bug 967887

Signed-off-by: Sang-Hun Lee &lt;sanlee@nvidia.com&gt;
Change-Id: I036e0bd4e391a17dec8fa0fe86da7eb6b98d503a
Reviewed-on: http://git-master/r/96795
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar &lt;vwadekar@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
