linux-toradex.git/arch/arm/include, branch v2.6.32.28

ARM: 6489/1: thumb2: fix incorrect optimisation in usracc

2010-12-09T21:27:03+00:00

commit 1142b71d85894dcff1466dd6c871ea3c89e0352c upstream.

Commit 8b592783 added a Thumb-2 variant of usracc which, when it is
called with \rept=2, calls usraccoff once with an offset of 0 and
secondly with a hard-coded offset of 4 in order to avoid incrementing
the pointer again. If \inc != 4 then we will store the data to the wrong
offset from \ptr. Luckily, the only caller that passes \rept=2 to this
function is __clear_user so we haven't been actively corrupting user data.

This patch fixes usracc to pass \inc instead of #4 to usraccoff
when it is called a second time.

Reported-by: Tony Thompson 
Acked-by: Catalin Marinas 
Signed-off-by: Will Deacon 
Signed-off-by: Russell King 
Signed-off-by: Greg Kroah-Hartman

ARM: Tighten check for allowable CPSR values

2010-08-26T23:41:40+00:00

commit 41e2e8fd34fff909a0e40129f6ac4233ecfa67a9 upstream.

Reviewed-by: Arve Hjønnevåg 
Acked-by: Dima Zavin 
Signed-off-by: Russell King 
Signed-off-by: Greg Kroah-Hartman

ARM: 6299/1: errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID

2010-08-13T20:19:39+00:00

commit cdf357f1e13a08a11261edacb3083746f65c1ed9 upstream.

On versions of the Cortex-A9 prior to r2p0, performing TLB invalidations by
ASID match can result in the incorrect ASID being broadcast to other CPUs.
As a consequence of this, the targetted TLB entries are not invalidated
across the system.

This workaround changes the TLB flushing routines to invalidate entries
regardless of the ASID.

Tested-by: Rob Clark 
Acked-by: Catalin Marinas 
Signed-off-by: Will Deacon 
Signed-off-by: Russell King 
Signed-off-by: Greg Kroah-Hartman

untangle the do_mremap() mess

2010-01-18T18:19:11+00:00

This backports the following upstream commits all as one patch:
	54f5de709984bae0d31d823ff03de755f9dcac54
	ecc1a8993751de4e82eb18640d631dae1f626bd6
	1a0ef85f84feb13f07b604fcf5b90ef7c2b5c82f
	f106af4e90eadd76cfc0b5325f659619e08fb762
	097eed103862f9c6a97f2e415e21d1134017b135
	935874141df839c706cd6cdc438e85eb69d1525e
	0ec62d290912bb4b989be7563851bc364ec73b56
	c4caa778157dbbf04116f0ac2111e389b5cd7a29
	2ea1d13f64efdf49319e86c87d9ba38c30902782
	570dcf2c15463842e384eb597a87c1e39bead99b
	564b3bffc619dcbdd160de597b0547a7017ea010
	0067bd8a55862ac9dd212bd1c4f6f5bff1ca1301
	f8b7256096a20436f6d0926747e3ac3d64c81d24
	8c7b49b3ecd48923eb64ff57e07a1cdb74782970
	9206de95b1ea68357996ec02be5db0638a0de2c1
	2c6a10161d0b5fc047b5bd81b03693b9af99fab5
	05d72faa6d13c9d857478a5d35c85db9adada685
	bb52d6694002b9d632bb355f64daa045c6293a4e
	e77414e0aad6a1b063ba5e5750c582c75327ea6a
	aa65607373a4daf2010e8c3867b6317619f3c1a3

Backport done by Greg Kroah-Hartman.  Only minor tweaks were needed.

Cc: David S. Miller 
Cc: Hugh Dickins 
Cc: Paul Mundt 
Cc: Russell King 
Cc: Linus Torvalds 
Signed-off-by: Al Viro 
Signed-off-by: Greg Kroah-Hartman

[ARM] kmap: fix build errors with DEBUG_HIGHMEM enabled

2009-11-20T14:23:36+00:00

d451564 broke ARM by requiring KM_IRQ_PTE, KM_NMI and KM_NMI_PTE to
always be defined.  Solve this by providing invalid definitions for
these constants, but only if CONFIG_DEBUG_HIGHMEM is enabled.

Signed-off-by: Russell King

ARM: Use a definition for the userspace cmpxchg emulation syscall

2009-11-10T08:41:12+00:00

Use a definition for the cmpxchg SWI instead of hard-coding the number.

Signed-off-by: Russell King 
Acked-by: Nicolas Pitre

ARM: Fix errata 411920 workarounds

2009-10-29T19:13:09+00:00

Errata 411920 indicates that any "invalidate entire instruction cache"
operation can fail if the right conditions are present.  This is not
limited just to those operations in flush.c, but elsewhere.  Place the
workaround in the already existing __flush_icache_all() function
instead.

Signed-off-by: Russell King

ARM: 5763/1: ARM: SMP: Fix the BUG with CONFIG_PREEMPT enabled

2009-10-15T14:45:15+00:00

This patch fixes the BUG: using smp_processor_id() in preemptible
Below is the stripped backtrace.

BUG: using smp_processor_id() in preemptible [00000000] code: init/1
caller is flush_tlb_mm+0x44/0x70
Backtrace:
[] (dump_backtrace+0x0/0x110) from [] (dump_stack+0x18/0x1c)
 r7:00000000 r6:c00234f0 r5:00000001 r4:c7828000
[] (dump_stack+0x0/0x1c) from [] (debug_smp_processor_id+0xc0/0xf0)
[] (debug_smp_processor_id+0x0/0xf0) from [] (flush_tlb_mm+0x44/0x70)
 r7:00000000 r6:c60b41a0 r5:c60b4154 r4:00000001
[] (flush_tlb_mm+0x0/0x70) from [] (dup_mm+0x304/0x38c)
 r5:c1f09058 r4:00000000
[] (dup_mm+0x0/0x38c) from [] (copy_process+0x7b8/0xeb0)
[] (copy_process+0x0/0xeb0) from [] (do_fork+0x15c/0x29c)
[] (do_fork+0x0/0x29c) from [] (sys_clone+0x34/0x3c)
[] (sys_clone+0x0/0x3c) from [] (ret_fast_syscall+0x0/0x2c)

Signed-off-by: Santosh Shilimkar 
Signed-off-by: Russell King

ARM: 5759/1: Add register information of threads to coredump

2009-10-14T09:33:05+00:00

Defines ELF_CORE_COPY_TASK_REGS so that CPU register information
of every thread is included in coredump. Without this, only the faulting
thread is coredumped.

Cc: Roger Quadros 
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Mika Westerberg 
Signed-off-by: Artem Bityutskiy 
Signed-off-by: Russell King

ARM: boolean bit testing

2009-10-11T15:25:06+00:00

Bit testing (test, testset, testclear, testchange) for bit numbers
known at compile time returns a word with the tested-for bit set.

Change it to return a true boolean value so to make it consistent with
the out-of-line path and all the other bitops implementations.

Signed-off-by: Johannes Weiner 
Signed-off-by: Russell King