linux-toradex.git/arch/arm/kernel/asm-offsets.c, branch v2.6.27.34 Linux kernel for Apalis and Colibri modules arm: use kbuild.h instead of macros in asm-offsets.c 2008-04-29T15:06:29+00:00 Christoph Lameter clameter@sgi.com 2008-04-29T08:03:59+00:00 02cbe4749a79f880b29ce42bbb5441b8d57222e4 Signed-off-by: Christoph Lameter <clameter@sgi.com> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> 
Signed-off-by: Christoph Lameter <clameter@sgi.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Add a prefetch abort handler 2008-04-18T21:43:07+00:00 Paul Brook paul@codesourcery.com 2008-04-18T21:43:07+00:00 48d7927bdf071d05cf5d15b816cf06b0937cb84f This patch adds a prefetch abort handler similar to the data abort one and renames the latter for consistency. Initial implementation by Paul Brook with some renaming by Catalin Marinas. Signed-off-by: Paul Brook <paul@codesourcery.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> 
This patch adds a prefetch abort handler similar to the data abort one
and renames the latter for consistency. Initial implementation by Paul
Brook with some renaming by Catalin Marinas.

Signed-off-by: Paul Brook <paul@codesourcery.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
ARMv7: Add support for the ThumbEE state saving/restoring 2008-04-18T21:43:06+00:00 Catalin Marinas catalin.marinas@arm.com 2008-04-18T21:43:06+00:00 d7f864be8323e5394040e2877594645b0e7da85d This patch adds the detection and handling of the ThumbEE extension on ARMv7 CPUs. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> 
This patch adds the detection and handling of the ThumbEE extension on
ARMv7 CPUs.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
[ARM] ARMv6: add CPU_HAS_ASID configuration 2007-05-17T09:19:23+00:00 Russell King rmk@dyn-67.arm.linux.org.uk 2007-05-17T09:19:23+00:00 516793c61b3db1f60e0b0d0e3c382bcca9ae84fd Presently, we check for the minimum ARM architecture that we're building for to determine whether we need ASID support. This is wrong - if we're going to support a range of CPUs which include ARMv6 or higher, we need the ASID. Convert the checks to use a new configuration symbol, and arrange for ARMv6 and higher CPU entries to select it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
Presently, we check for the minimum ARM architecture that we're
building for to determine whether we need ASID support.  This is
wrong - if we're going to support a range of CPUs which include
ARMv6 or higher, we need the ASID.

Convert the checks to use a new configuration symbol, and arrange
for ARMv6 and higher CPU entries to select it.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[ARM] Include asm/elf.h instead of asm/procinfo.h 2006-11-30T12:24:46+00:00 Russell King rmk@dyn-67.arm.linux.org.uk 2006-11-09T14:20:47+00:00 ee90dabcadd053d5dd69f3a7f8161afa2c751ace These files want to provide/access ELF hwcap information, so should be including asm/elf.h rather than asm/procinfo.h Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
These files want to provide/access ELF hwcap information, so should
be including asm/elf.h rather than asm/procinfo.h

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[ARM] Set bit 4 on section mappings correctly depending on CPU 2006-06-29T17:24:21+00:00 Russell King rmk@dyn-67.arm.linux.org.uk 2006-06-29T17:24:21+00:00 8799ee9f49f6171fd58f4d64f8c067ca49006a5d On some CPUs, bit 4 of section mappings means "update the cache when written to". On others, this bit is required to be one, and others it's required to be zero. Finally, on ARMv6 and above, setting it turns on "no execute" and prevents speculative prefetches. With all these combinations, no one value fits all CPUs, so we have to pick a value depending on the CPU type, and the area we're mapping. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
On some CPUs, bit 4 of section mappings means "update the
cache when written to".  On others, this bit is required to
be one, and others it's required to be zero.  Finally, on
ARMv6 and above, setting it turns on "no execute" and prevents
speculative prefetches.

With all these combinations, no one value fits all CPUs, so we
have to pick a value depending on the CPU type, and the area
we're mapping.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[ARM] 3370/2: ep93xx: add crunch support 2006-06-28T16:55:01+00:00 Lennert Buytenhek buytenh@wantstofly.org 2006-06-27T22:03:03+00:00 c17fad11f3105ca4d5bbb2686725aad208f5ead4 Patch from Lennert Buytenhek Add the necessary kernel bits for crunch task switching. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
Patch from Lennert Buytenhek

Add the necessary kernel bits for crunch task switching.

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[ARM] 3517/1: move definition of PROC_INFO_SZ from procinfo.h to asm-offsets.h 2006-05-16T10:39:30+00:00 Uwe Zeisberger Uwe_Zeisberger@digi.com 2006-05-10T17:11:05+00:00 2ceec0c8c6e2780d58dece91b4b787729405d9e7 Patch from Uwe Zeisberger The symbol is only used in arch/arm/kernel/head-common.S. This in turn is included from arch/arm/kernel/head.S and arch/arm/kernel/head-nommu.S which include asm-offsets.h . Signed-off-by: Uwe Zeisberger <Uwe_Zeisberger@digi.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
Patch from Uwe Zeisberger

The symbol is only used in arch/arm/kernel/head-common.S.  This in turn
is included from arch/arm/kernel/head.S and arch/arm/kernel/head-nommu.S
which include asm-offsets.h .

Signed-off-by: Uwe Zeisberger <Uwe_Zeisberger@digi.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[ARM] 3496/1: more constants for asm-offsets.h 2006-05-05T14:11:14+00:00 Uwe Zeisberger Uwe_Zeisberger@digi.com 2006-05-05T14:11:14+00:00 2eb9d3157107497fdccb51e1570fea677f6e3c82 Patch from Uwe Zeisberger added the following constants: - MACHINFO_TYPE - MACHINFO_NAME - MACHINFO_PHYSIO - MACHINFO_PGOFFIO - PROCINFO_INITFUNC - PROCINFO_MMUFLAGS and removed their definition from head.S and head-nommu.S Signed-off-by: Uwe Zeisberger <Uwe_Zeisberger@digi.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
Patch from Uwe Zeisberger

added the following constants:
- MACHINFO_TYPE
- MACHINFO_NAME
- MACHINFO_PHYSIO
- MACHINFO_PGOFFIO
- PROCINFO_INITFUNC
- PROCINFO_MMUFLAGS

and removed their definition from head.S and head-nommu.S

Signed-off-by: Uwe Zeisberger <Uwe_Zeisberger@digi.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[ARM] iwmmxt thread state alignment 2006-03-12T22:36:06+00:00 Russell King rmk@dyn-67.arm.linux.org.uk 2006-03-12T22:36:06+00:00 cdaabbd74b15296acf09215355a7f3b07b92b83e This patch removes the reliance of iwmmxt on hand coded alignments. Since thread_info is always 8K aligned, specifying that fpstate is 8-byte aligned achieves the same effect without needing to resort to hand coded alignments. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
This patch removes the reliance of iwmmxt on hand coded alignments.
Since thread_info is always 8K aligned, specifying that fpstate is
8-byte aligned achieves the same effect without needing to resort
to hand coded alignments.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>