<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/arm/kernel/debug.S, branch v5.7-rc6</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500</title>
<updated>2019-06-19T15:09:55+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-06-04T08:11:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d2912cb15bdda8ba4a5dd73396ad62641af2f520'/>
<id>d2912cb15bdda8ba4a5dd73396ad62641af2f520</id>
<content type='text'>
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Enrico Weigelt &lt;info@metux.net&gt;
Reviewed-by: Kate Stewart &lt;kstewart@linuxfoundation.org&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Enrico Weigelt &lt;info@metux.net&gt;
Reviewed-by: Kate Stewart &lt;kstewart@linuxfoundation.org&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 8844/1: use unified assembler in assembly files</title>
<updated>2019-02-26T11:26:07+00:00</updated>
<author>
<name>Stefan Agner</name>
<email>stefan@agner.ch</email>
</author>
<published>2019-02-17T23:57:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e44fc38818ed795f4c661d5414c6e0affae0fa63'/>
<id>e44fc38818ed795f4c661d5414c6e0affae0fa63</id>
<content type='text'>
Use unified assembler syntax (UAL) in assembly files. Divided
syntax is considered deprecated. This will also allow to build
the kernel using LLVM's integrated assembler.

Signed-off-by: Stefan Agner &lt;stefan@agner.ch&gt;
Acked-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use unified assembler syntax (UAL) in assembly files. Divided
syntax is considered deprecated. This will also allow to build
the kernel using LLVM's integrated assembler.

Signed-off-by: Stefan Agner &lt;stefan@agner.ch&gt;
Acked-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branches 'fixes', 'misc' and 'sa1111-for-next' into for-next</title>
<updated>2017-11-08T19:42:43+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@armlinux.org.uk</email>
</author>
<published>2017-11-08T19:42:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7f3d1f984336377074ebf804ff53869ef1906fbe'/>
<id>7f3d1f984336377074ebf804ff53869ef1906fbe</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 8717/2: debug printch/printascii: translate '\n' to "\r\n" not "\n\r"</title>
<updated>2017-11-06T11:58:16+00:00</updated>
<author>
<name>Nicolas Pitre</name>
<email>nicolas.pitre@linaro.org</email>
</author>
<published>2017-11-02T20:58:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2a14b80cb03bee9a4973e5a91e0ed48df25b57ce'/>
<id>2a14b80cb03bee9a4973e5a91e0ed48df25b57ce</id>
<content type='text'>
Some terminals apparently have issues with "\n\r" and mess up the
display. Let's use the traditional "\r\n" ordering.

Signed-off-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Reported-by: Chris Brandt &lt;Chris.Brandt@renesas.com&gt;
Tested-by: Chris Brandt &lt;Chris.Brandt@renesas.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some terminals apparently have issues with "\n\r" and mess up the
display. Let's use the traditional "\r\n" ordering.

Signed-off-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Reported-by: Chris Brandt &lt;Chris.Brandt@renesas.com&gt;
Tested-by: Chris Brandt &lt;Chris.Brandt@renesas.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 8704/1: semihosting: use proper instruction on v7m processors</title>
<updated>2017-10-12T10:28:29+00:00</updated>
<author>
<name>Nicolas Pitre</name>
<email>nicolas.pitre@linaro.org</email>
</author>
<published>2017-10-06T18:39:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ee3eaee6a1dafb7ed7213ec2fad22552b4d58ed1'/>
<id>ee3eaee6a1dafb7ed7213ec2fad22552b4d58ed1</id>
<content type='text'>
The svc instruction doesn't exist on v7m processors. Semihosting ops are
invoked with the bkpt instruction instead.

Signed-off-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The svc instruction doesn't exist on v7m processors. Semihosting ops are
invoked with the bkpt instruction instead.

Signed-off-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 8703/1: debug.S: move hexbuf to a writable section</title>
<updated>2017-10-12T10:26:21+00:00</updated>
<author>
<name>Nicolas Pitre</name>
<email>nicolas.pitre@linaro.org</email>
</author>
<published>2017-10-06T18:36:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e11d1314d83ec7f562fa01df29878d0b1138cf00'/>
<id>e11d1314d83ec7f562fa01df29878d0b1138cf00</id>
<content type='text'>
This was located in .text which is meant to be read-only. And in the XIP
case this shortcut simply doesn't work and may trigger a Flash controller
mode switch and crash the kernel. Move it to the .bss area.

Signed-off-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This was located in .text which is meant to be read-only. And in the XIP
case this shortcut simply doesn't work and may trigger a Flash controller
mode switch and crash the kernel. Move it to the .bss area.

Signed-off-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: unify MMU/!MMU addruart calls</title>
<updated>2015-05-20T21:09:51+00:00</updated>
<author>
<name>Stefan Agner</name>
<email>stefan@agner.ch</email>
</author>
<published>2015-05-19T22:03:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7505f0428fdedca11be9647cb411628ec7cb9a1a'/>
<id>7505f0428fdedca11be9647cb411628ec7cb9a1a</id>
<content type='text'>
Remove the needless differences between MMU/!MMU addruart calls.
This allows to use the same addruart macro on SoC level. Useful
for SoC consisting of multiple CPUs with and without MMU such as
Freescale Vybrid.

Signed-off-by: Stefan Agner &lt;stefan@agner.ch&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Remove the needless differences between MMU/!MMU addruart calls.
This allows to use the same addruart macro on SoC level. Useful
for SoC consisting of multiple CPUs with and without MMU such as
Freescale Vybrid.

Signed-off-by: Stefan Agner &lt;stefan@agner.ch&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+</title>
<updated>2014-07-18T11:29:04+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2014-06-30T15:29:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=6ebbf2ce437b33022d30badd49dc94d33ecfa498'/>
<id>6ebbf2ce437b33022d30badd49dc94d33ecfa498</id>
<content type='text'>
ARMv6 and greater introduced a new instruction ("bx") which can be used
to return from function calls.  Recent CPUs perform better when the
"bx lr" instruction is used rather than the "mov pc, lr" instruction,
and this sequence is strongly recommended to be used by the ARM
architecture manual (section A.4.1.1).

We provide a new macro "ret" with all its variants for the condition
code which will resolve to the appropriate instruction.

Rather than doing this piecemeal, and miss some instances, change all
the "mov pc" instances to use the new macro, with the exception of
the "movs" instruction and the kprobes code.  This allows us to detect
the "mov pc, lr" case and fix it up - and also gives us the possibility
of deploying this for other registers depending on the CPU selection.

Reported-by: Will Deacon &lt;will.deacon@arm.com&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt; # Tegra Jetson TK1
Tested-by: Robert Jarzmik &lt;robert.jarzmik@free.fr&gt; # mioa701_bootresume.S
Tested-by: Andrew Lunn &lt;andrew@lunn.ch&gt; # Kirkwood
Tested-by: Shawn Guo &lt;shawn.guo@freescale.com&gt;
Tested-by: Tony Lindgren &lt;tony@atomide.com&gt; # OMAPs
Tested-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt; # Armada XP, 375, 385
Acked-by: Sekhar Nori &lt;nsekhar@ti.com&gt; # DaVinci
Acked-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt; # kvm/hyp
Acked-by: Haojian Zhuang &lt;haojian.zhuang@gmail.com&gt; # PXA3xx
Acked-by: Stefano Stabellini &lt;stefano.stabellini@eu.citrix.com&gt; # Xen
Tested-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt; # ARMv7M
Tested-by: Simon Horman &lt;horms+renesas@verge.net.au&gt; # Shmobile
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
ARMv6 and greater introduced a new instruction ("bx") which can be used
to return from function calls.  Recent CPUs perform better when the
"bx lr" instruction is used rather than the "mov pc, lr" instruction,
and this sequence is strongly recommended to be used by the ARM
architecture manual (section A.4.1.1).

We provide a new macro "ret" with all its variants for the condition
code which will resolve to the appropriate instruction.

Rather than doing this piecemeal, and miss some instances, change all
the "mov pc" instances to use the new macro, with the exception of
the "movs" instruction and the kprobes code.  This allows us to detect
the "mov pc, lr" case and fix it up - and also gives us the possibility
of deploying this for other registers depending on the CPU selection.

Reported-by: Will Deacon &lt;will.deacon@arm.com&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt; # Tegra Jetson TK1
Tested-by: Robert Jarzmik &lt;robert.jarzmik@free.fr&gt; # mioa701_bootresume.S
Tested-by: Andrew Lunn &lt;andrew@lunn.ch&gt; # Kirkwood
Tested-by: Shawn Guo &lt;shawn.guo@freescale.com&gt;
Tested-by: Tony Lindgren &lt;tony@atomide.com&gt; # OMAPs
Tested-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt; # Armada XP, 375, 385
Acked-by: Sekhar Nori &lt;nsekhar@ti.com&gt; # DaVinci
Acked-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt; # kvm/hyp
Acked-by: Haojian Zhuang &lt;haojian.zhuang@gmail.com&gt; # PXA3xx
Acked-by: Stefano Stabellini &lt;stefano.stabellini@eu.citrix.com&gt; # Xen
Tested-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt; # ARMv7M
Tested-by: Simon Horman &lt;horms+renesas@verge.net.au&gt; # Shmobile
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: compile fix for DEBUG_LL=y &amp;&amp; MMU=n</title>
<updated>2013-01-16T22:30:06+00:00</updated>
<author>
<name>Uwe Kleine-König</name>
<email>u.kleine-koenig@pengutronix.de</email>
</author>
<published>2013-01-16T14:32:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a73b59c51ab288d81b515b504790267f594884b8'/>
<id>a73b59c51ab288d81b515b504790267f594884b8</id>
<content type='text'>
debug_ll_addr is only used on machines with an MMU so it can be #ifdef'ed
out safely. This fixes:

arch/arm/kernel/debug.S: Assembler messages:
arch/arm/kernel/debug.S:104: Error: too many positional arguments

The problem was introduced in e5c5f2a ARM: implement debug_ll_io_init().

Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Rob Herring &lt;rob.herring@calxeda.com&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
debug_ll_addr is only used on machines with an MMU so it can be #ifdef'ed
out safely. This fixes:

arch/arm/kernel/debug.S: Assembler messages:
arch/arm/kernel/debug.S:104: Error: too many positional arguments

The problem was introduced in e5c5f2a ARM: implement debug_ll_io_init().

Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Rob Herring &lt;rob.herring@calxeda.com&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: implement debug_ll_io_init()</title>
<updated>2012-11-05T17:35:59+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robherring2@gmail.com</email>
</author>
<published>2012-10-22T17:42:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e5c5f2adeb370559f4b221d57214db85858b786a'/>
<id>e5c5f2adeb370559f4b221d57214db85858b786a</id>
<content type='text'>
When using DEBUG_LL, the UART's (or other HW's) registers are mapped
into early page tables based on the results of assembly macro addruart.
Later, when the page tables are replaced, the same virtual address must
remain valid. Historically, this has been ensured by using defines from
&lt;mach/iomap.h&gt; in both the implementation of addruart, and the machine's
.map_io() function. However, with the move to single zImage, we wish to
remove &lt;mach/iomap.h&gt;. To enable this, the macro addruart may be used
when constructing the late page tables too; addruart is exposed as a
C function debug_ll_addr(), and used to set up the required mapping in
debug_ll_io_init(), which may called on an opt-in basis from a machine's
.map_io() function.

Signed-off-by: Rob Herring &lt;rob.herring@calxeda.com&gt;
[swarren: Mask map.virtual with PAGE_MASK. Checked for NULL results from
 debug_ll_addr (e.g. when selected UART isn't valid). Fixed compile when
 either !CONFIG_DEBUG_LL or CONFIG_DEBUG_SEMIHOSTING.]
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When using DEBUG_LL, the UART's (or other HW's) registers are mapped
into early page tables based on the results of assembly macro addruart.
Later, when the page tables are replaced, the same virtual address must
remain valid. Historically, this has been ensured by using defines from
&lt;mach/iomap.h&gt; in both the implementation of addruart, and the machine's
.map_io() function. However, with the move to single zImage, we wish to
remove &lt;mach/iomap.h&gt;. To enable this, the macro addruart may be used
when constructing the late page tables too; addruart is exposed as a
C function debug_ll_addr(), and used to set up the required mapping in
debug_ll_io_init(), which may called on an opt-in basis from a machine's
.map_io() function.

Signed-off-by: Rob Herring &lt;rob.herring@calxeda.com&gt;
[swarren: Mask map.virtual with PAGE_MASK. Checked for NULL results from
 debug_ll_addr (e.g. when selected UART isn't valid). Fixed compile when
 either !CONFIG_DEBUG_LL or CONFIG_DEBUG_SEMIHOSTING.]
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</pre>
</div>
</content>
</entry>
</feed>
