linux-toradex.git/arch/arm/kernel/entry-header.S, branch v3.0.7 Linux kernel for Apalis and Colibri modules ARM: v6k: select clear exclusive code seqences according to V6 variants 2011-02-02T21:23:28+00:00 Russell King rmk+kernel@arm.linux.org.uk 2011-01-17T15:35:37+00:00 7db44c75a241c18d03e82540c5b825216d4c668b If CONFIG_CPU_V6 is enabled, then the kernel must support ARMv6 CPUs which don't have the V6K extensions implemented. Always use the dummy store-exclusive method to ensure that the exclusive monitors are cleared. If CONFIG_CPU_V6 is not set, but CONFIG_CPU_32v6K is enabled, then we have the K extensions available on all CPUs we're building support for, so we can use the new clear-exclusive instruction. Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Tested-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
If CONFIG_CPU_V6 is enabled, then the kernel must support ARMv6 CPUs
which don't have the V6K extensions implemented.  Always use the
dummy store-exclusive method to ensure that the exclusive monitors are
cleared.

If CONFIG_CPU_V6 is not set, but CONFIG_CPU_32v6K is enabled, then we
have the K extensions available on all CPUs we're building support for,
so we can use the new clear-exclusive instruction.

Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Sourav Poddar <sourav.poddar@ti.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: hw_breakpoint: disable preemption during debug exception handling 2010-12-06T11:55:56+00:00 Will Deacon will.deacon@arm.com 2010-11-28T14:57:24+00:00 7e20269647169e7ea08a62bdc4979a3ba32e615c On ARM, debug exceptions occur in the form of data or prefetch aborts. One difference is that debug exceptions require access to per-cpu banked registers and data structures which are not saved in the low-level exception code. For kernels built with CONFIG_PREEMPT, there is an unlikely scenario that the debug handler ends up running on a different CPU from the one that originally signalled the event, resulting in random data being read from the wrong registers. This patch adds a debug_entry macro to the low-level exception handling code which checks whether the taken exception is a debug exception. If it is, the preempt count for the faulting process is incremented. After the debug handler has finished, the count is decremented. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> 
On ARM, debug exceptions occur in the form of data or prefetch aborts.
One difference is that debug exceptions require access to per-cpu banked
registers and data structures which are not saved in the low-level exception
code. For kernels built with CONFIG_PREEMPT, there is an unlikely scenario
that the debug handler ends up running on a different CPU from the one
that originally signalled the event, resulting in random data being read
from the wrong registers.

This patch adds a debug_entry macro to the low-level exception handling
code which checks whether the taken exception is a debug exception. If
it is, the preempt count for the faulting process is incremented. After
the debug handler has finished, the count is decremented.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
ARM: 5991/1: Fix regression in restore_user_regs macro 2010-03-15T17:20:08+00:00 Anders Grafström grfstrm@users.sourceforge.net 2010-03-15T15:04:14+00:00 8e4971f2fb2380ce66196136e113d04196b80fcd ARMv5T and earlier require that a ldm {}^ instruction is not followed by an instruction that accesses banked registers. This patch restores the nop that was lost in commit b86040a59feb255a8193173caa4d5199464433d5. Signed-off-by: Anders Grafström <grfstrm@users.sourceforge.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
ARMv5T and earlier require that a ldm {}^ instruction is not followed
by an instruction that accesses banked registers. This patch restores
the nop that was lost in commit b86040a59feb255a8193173caa4d5199464433d5.

Signed-off-by: Anders Grafström <grfstrm@users.sourceforge.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: 5757/1: Thumb-2: Correct "mov.w pc, lr" instruction which is unpredictable 2009-10-14T09:33:05+00:00 Catalin Marinas catalin.marinas@arm.com 2009-10-12T16:31:20+00:00 a771fe6e4e3e58f2056823ef9c30a554ec48f453 The 32-bit wide variant of "mov pc, reg" in Thumb-2 is unpredictable causing improper handling of the undefined instructions not caught by the kernel. This patch adds a movw_pc macro for such situations (currently only used in call_fpe). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
The 32-bit wide variant of "mov pc, reg" in Thumb-2 is unpredictable
causing improper handling of the undefined instructions not caught by
the kernel. This patch adds a movw_pc macro for such situations
(currently only used in call_fpe).

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
make Linux bootable on ARM again 2009-09-26T17:06:53+00:00 Nicolas Pitre nico@fluxnic.net 2009-09-25T20:28:02+00:00 9e6ec39becb02bda776eebf12c0677910d54b848 Commit 200b812d00 "Clear the exclusive monitor when returning from an exception" broke the vast majority of ARM systems in the wild which are still pre ARMv6. The kernel is crashing on the first occurrence of an exception due to the removal of the actual return instruction for them. Let's add it back. Signed-off-by: Nicolas Pitre <nico@marvell.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> 
Commit 200b812d00 "Clear the exclusive monitor when returning from an
exception" broke the vast majority of ARM systems in the wild which are
still pre ARMv6.  The kernel is crashing on the first occurrence of an
exception due to the removal of the actual return instruction for them.
Let's add it back.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Clear the exclusive monitor when returning from an exception 2009-09-18T22:30:11+00:00 Catalin Marinas catalin.marinas@arm.com 2009-09-18T22:27:05+00:00 200b812d0084f800bc52465e273b118ff5f8141f The patch adds a CLREX or dummy STREX to the exception return path. This is needed because several atomic/locking operations use a pair of LDREX/STREXEQ and the EQ condition may not always be satisfied. This would leave the exclusive monitor status set and may cause problems with atomic/locking operations in the interrupted code. With this patch, the atomic_set() operation can be a simple STR instruction (on SMP systems, the global exclusive monitor is cleared by STR anyway). Clearing the exclusive monitor during context switch is no longer needed as this is handled by the exception return path anyway. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Jamie Lokier <jamie@shareable.org> 
The patch adds a CLREX or dummy STREX to the exception return path. This
is needed because several atomic/locking operations use a pair of
LDREX/STREXEQ and the EQ condition may not always be satisfied. This
would leave the exclusive monitor status set and may cause problems with
atomic/locking operations in the interrupted code.

With this patch, the atomic_set() operation can be a simple STR
instruction (on SMP systems, the global exclusive monitor is cleared by
STR anyway). Clearing the exclusive monitor during context switch is no
longer needed as this is handled by the exception return path anyway.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: Jamie Lokier <jamie@shareable.org>
Thumb-2: Implementation of the unified start-up and exceptions code 2009-07-24T11:32:54+00:00 Catalin Marinas catalin.marinas@arm.com 2009-07-24T11:32:54+00:00 b86040a59feb255a8193173caa4d5199464433d5 This patch implements the ARM/Thumb-2 unified kernel start-up and exception handling code. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> 
This patch implements the ARM/Thumb-2 unified kernel start-up and
exception handling code.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Remove obsolete #include <linux/config.h> 2006-06-30T17:25:36+00:00 Jörn Engel joern@wohnheim.fh-wedel.de 2006-06-30T17:25:36+00:00 6ab3d5624e172c553004ecc862bfeac16d9d68b7 Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de> 
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
[ARM] Move enable_irq and disable_irq to assembler.h 2006-03-23T16:59:37+00:00 Russell King rmk@dyn-67.arm.linux.org.uk 2006-03-23T16:59:37+00:00 9c42954dfd50d02963cd453fb84bfef3967af2f0 5d25ac038a317d454a4321cba955f756400835a5 broke VFP builds due to enable_irq not being defined as an assembly macro. Move it to assembler.h so everyone can use it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
5d25ac038a317d454a4321cba955f756400835a5 broke VFP builds due to
enable_irq not being defined as an assembly macro.  Move it to
assembler.h so everyone can use it.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[ARM] 3102/1: ARM EABI: stack pointer must be 64-bit aligned after a CPU exception 2006-01-14T16:18:08+00:00 Nicolas Pitre nico@cam.org 2006-01-14T16:18:08+00:00 2dede2d8e925f4c2cb4e136b14df127685e15dd3 Patch from Nicolas Pitre The ARM EABI says that the stack pointer has to be 64-bit aligned for reasons already mentioned in patch #3101 when calling C functions. We therefore must verify and adjust sp accordingly when taking an exception from kernel mode since sp might not necessarily be 64-bit aligned if the exception occurs in the middle of a kernel function. If the exception occurs while in user mode then no sp fixup is needed as long as sizeof(struct pt_regs) as well as any additional syscall data stack space remain multiples of 8. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
Patch from Nicolas Pitre

The ARM EABI says that the stack pointer has to be 64-bit aligned for
reasons already mentioned in patch #3101 when calling C functions.

We therefore must verify and adjust sp accordingly when taking an
exception from kernel mode since sp might not necessarily be 64-bit
aligned if the exception occurs in the middle of a kernel function.

If the exception occurs while in user mode then no sp fixup is needed as
long as sizeof(struct pt_regs) as well as any additional syscall data
stack space remain multiples of 8.

Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>