linux-toradex.git/arch/arm/kernel/smp_scu.c, branch v3.1.2 Linux kernel for Apalis and Colibri modules ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeed 2011-09-17T11:47:17+00:00 Will Deacon will.deacon@arm.com 2011-09-15T10:45:15+00:00 f630c1bdfbf8fe423325beaf60027cfc7fd7c610 This patch implements a workaround for erratum 764369 affecting Cortex-A9 MPCore with two or more processors (all current revisions). Under certain timing circumstances, a data cache line maintenance operation by MVA targeting an Inner Shareable memory region may fail to proceed up to either the Point of Coherency or to the Point of Unification of the system. This workaround adds a DSB instruction before the relevant cache maintenance functions and sets a specific bit in the diagnostic control register of the SCU. Cc: <stable@kernel.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
This patch implements a workaround for erratum 764369 affecting
Cortex-A9 MPCore with two or more processors (all current revisions).
Under certain timing circumstances, a data cache line maintenance
operation by MVA targeting an Inner Shareable memory region may fail to
proceed up to either the Point of Coherency or to the Point of
Unification of the system. This workaround adds a DSB instruction before
the relevant cache maintenance functions and sets a specific bit in the
diagnostic control register of the SCU.

Cc: <stable@kernel.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: 6960/1: allow enabling SCU code on UP 2011-07-06T19:55:15+00:00 Rob Herring rob.herring@calxeda.com 2011-06-13T14:28:53+00:00 10cdc7e5129ac26aefece4c7a7d5b1a0285237c2 The scu_power_mode function can be used on UP builds as it drives signals to an SOC power controller. So make it selectable for !SMP. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
The scu_power_mode function can be used on UP builds as it drives signals
to an SOC power controller. So make it selectable for !SMP.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: pm: add function to set WFI low-power mode for SMP CPUs 2011-02-11T12:29:18+00:00 Russell King rmk+kernel@arm.linux.org.uk 2011-02-04T10:36:39+00:00 292ec42af7c6361435fe9df50cd59ec76f6741c6 Add a function to set the SCU low-power mode for SMP CPUs. This centralizes this functionality rather than having to expose the SCU register definitions to each platform. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
Add a function to set the SCU low-power mode for SMP CPUs.  This
centralizes this functionality rather than having to expose the
SCU register definitions to each platform.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Check whether the SCU was already initialised 2009-11-05T10:10:36+00:00 Catalin Marinas catalin.marinas@arm.com 2009-11-04T12:16:38+00:00 9b229fa0951fb47cbc178be4bd8e9ef185b38802 If Linux is running in non-secure mode, this register may have been already initialised and writing to the control register not allowed. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> 
If Linux is running in non-secure mode, this register may have been
already initialised and writing to the control register not allowed.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
[ARM] 5516/1: Flush the D-cache after initialising the SCU 2009-05-28T12:52:05+00:00 Catalin Marinas catalin.marinas@arm.com 2009-05-18T15:26:27+00:00 af73110d23fb54f940197d93a410e9fa0cee66e2 On MP systems, the data loaded by CPU0 before the SCU was initialised may not be visible to the other CPUs. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> This also includes the following compile fix: This patch includes 'asm/cacheflush.h' which is needed to use 'flush_cache_all()' function. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
On MP systems, the data loaded by CPU0 before the SCU was initialised
may not be visible to the other CPUs.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

This also includes the following compile fix:

This patch includes 'asm/cacheflush.h' which is needed to use
'flush_cache_all()' function.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[ARM] smp: separate SCU support code from realview 2009-05-17T18:00:37+00:00 Russell King rmk@dyn-67.arm.linux.org.uk 2009-05-16T10:51:14+00:00 a8cbcd92bd4bf893085eddf7f58e63ea98503d94 Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>