linux-toradex.git/arch/arm/kernel, branch v3.1.2 Linux kernel for Apalis and Colibri modules ARM: 7117/1: perf: fix HW_CACHE_* events on Cortex-A9 2011-10-15T10:04:22+00:00 Will Deacon will.deacon@arm.com 2011-10-03T17:30:53+00:00 29a541f6c1f6e4a85628bb86071b9e72c9f8be2c Using COHERENT_LINE_{MISS,HIT} for cache misses and references respectively is completely wrong. Instead, use the L1D events which are a better and more useful approximation despite ignoring instruction traffic. Reported-by: Alasdair Grant <alasdair.grant@arm.com> Reported-by: Matt Horsnell <matt.horsnell@arm.com> Reported-by: Michael Williams <michael.williams@arm.com> Cc: stable@kernel.org Cc: Jean Pihet <j-pihet@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
Using COHERENT_LINE_{MISS,HIT} for cache misses and references
respectively is completely wrong. Instead, use the L1D events which
are a better and more useful approximation despite ignoring instruction
traffic.

Reported-by: Alasdair Grant <alasdair.grant@arm.com>
Reported-by: Matt Horsnell <matt.horsnell@arm.com>
Reported-by: Michael Williams <michael.williams@arm.com>
Cc: stable@kernel.org
Cc: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: fix vmlinux.lds.S discarding sections 2011-09-20T22:42:31+00:00 Russell King rmk+kernel@arm.linux.org.uk 2011-09-20T22:35:15+00:00 6760b109603c794e4bd281c0014fef069c019b6a We are seeing linker errors caused by sections being discarded, despite the linker script trying to keep them. The result is (eg): `.exit.text' referenced in section `.alt.smp.init' of drivers/built-in.o: defined in discarded section `.exit.text' of drivers/built-in.o `.exit.text' referenced in section `.alt.smp.init' of net/built-in.o: defined in discarded section `.exit.text' of net/built-in.o This is the relevent part of the linker script (reformatted to make it clearer): | SECTIONS | { | /* | * unwind exit sections must be discarded before the rest of the | * unwind sections get included. | */ | /DISCARD/ : { | *(.ARM.exidx.exit.text) | *(.ARM.extab.exit.text) | } | ... | .exit.text : { | *(.exit.text) | *(.memexit.text) | } | ... | /DISCARD/ : { | *(.exit.text) | *(.memexit.text) | *(.exit.data) | *(.memexit.data) | *(.memexit.rodata) | *(.exitcall.exit) | *(.discard) | *(.discard.*) | } | } Now, this is what the linker manual says about discarded output sections: | The special output section name `/DISCARD/' may be used to discard | input sections. Any input sections which are assigned to an output | section named `/DISCARD/' are not included in the output file. No questions, no exceptions. It doesn't say "unless they are listed before the /DISCARD/ section." Now, this is what asn-generic/vmlinux.lds.S says: | /* | * Default discarded sections. | * | * Some archs want to discard exit text/data at runtime rather than | * link time due to cross-section references such as alt instructions, | * bug table, eh_frame, etc. DISCARDS must be the last of output | * section definitions so that such archs put those in earlier section | * definitions. | */ And guess what - the list _always_ includes .exit.text etc. Now, what's actually happening is that the linker is reading the script, and it finds the first /DISCARD/ output section at the beginning of the script. It continues reading the script, and finds the 'DISCARD' macro at the end, which having been postprocessed results in another /DISCARD/ output section. As the linker already contains the earlier /DISCARD/ output section, it adds it to that existing section, so it effectively is placed at the start. This can be seen by using the -M option to ld: | Linker script and memory map | | 0xc037c080 jiffies = jiffies_64 | | /DISCARD/ | *(.ARM.exidx.exit.text) | *(.ARM.extab.exit.text) | *(.exit.text) | *(.memexit.text) | *(.exit.data) | *(.memexit.data) | *(.memexit.rodata) | *(.exitcall.exit) | *(.discard) | *(.discard.*) | | 0xc0008000 . = 0xc0008000 | | .head.text 0xc0008000 0x1d0 | 0xc0008000 _text = . | *(.head.text) | .head.text 0xc0008000 0x1d0 arch/arm/kernel/head.o | 0xc0008000 stext | | .text 0xc0008200 0x2d78d0 | 0xc0008200 _stext = . | 0xc0008200 __exception_text_start = . | *(.exception.text) | .exception.text | ... As you can see, all the discarded sections are grouped together - and as a result of it being the first output section, they all appear before any other section. The result is that not only is the unwind information discarded (as intended), but also the .exit.text, despite us wanting to have the .exit.text preserved. We can't move the unwind information elsewhere, because it'll then be included even when we do actually discard the .exit.text (and similar) sections. So, work around this by avoiding the generic DISCARDS macro, and instead conditionalize the sections to be discarded ourselves. This avoids the ambiguity in how the linker assigns input sections to output sections, making our script less dependent on undocumented linker behaviour. Reported-by: Rob Herring <robherring2@gmail.com> Tested-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
We are seeing linker errors caused by sections being discarded, despite
the linker script trying to keep them.  The result is (eg):

`.exit.text' referenced in section `.alt.smp.init' of drivers/built-in.o: defined in discarded section `.exit.text' of drivers/built-in.o
`.exit.text' referenced in section `.alt.smp.init' of net/built-in.o: defined in discarded section `.exit.text' of net/built-in.o

This is the relevent part of the linker script (reformatted to make it
clearer):
| SECTIONS
| {
| /*
| * unwind exit sections must be discarded before the rest of the
| * unwind sections get included.
| */
| /DISCARD/ : {
| *(.ARM.exidx.exit.text)
| *(.ARM.extab.exit.text)
| }
| ...
| .exit.text : {
| *(.exit.text)
| *(.memexit.text)
| }
| ...
| /DISCARD/ : {
| *(.exit.text)
| *(.memexit.text)
| *(.exit.data)
| *(.memexit.data)
| *(.memexit.rodata)
| *(.exitcall.exit)
| *(.discard)
| *(.discard.*)
| }
| }

Now, this is what the linker manual says about discarded output sections:

|    The special output section name `/DISCARD/' may be used to discard
| input sections.  Any input sections which are assigned to an output
| section named `/DISCARD/' are not included in the output file.

No questions, no exceptions. It doesn't say "unless they are listed
before the /DISCARD/ section." Now, this is what asn-generic/vmlinux.lds.S
says:
| /*
|  * Default discarded sections.
|  *
|  * Some archs want to discard exit text/data at runtime rather than
|  * link time due to cross-section references such as alt instructions,
|  * bug table, eh_frame, etc. DISCARDS must be the last of output
|  * section definitions so that such archs put those in earlier section
|  * definitions.
|  */

And guess what - the list _always_ includes .exit.text etc.

Now, what's actually happening is that the linker is reading the script,
and it finds the first /DISCARD/ output section at the beginning of the
script. It continues reading the script, and finds the 'DISCARD' macro
at the end, which having been postprocessed results in another
/DISCARD/ output section. As the linker already contains the earlier
/DISCARD/ output section, it adds it to that existing section, so it
effectively is placed at the start. This can be seen by using the -M
option to ld:

| Linker script and memory map
|
|                 0xc037c080                jiffies = jiffies_64
|
| /DISCARD/
|  *(.ARM.exidx.exit.text)
|  *(.ARM.extab.exit.text)
|  *(.exit.text)
|  *(.memexit.text)
|  *(.exit.data)
|  *(.memexit.data)
|  *(.memexit.rodata)
|  *(.exitcall.exit)
|  *(.discard)
|  *(.discard.*)
|
|                 0xc0008000                . = 0xc0008000
|
| .head.text      0xc0008000      0x1d0
|                 0xc0008000                _text = .
|  *(.head.text)
|  .head.text     0xc0008000      0x1d0 arch/arm/kernel/head.o
|                 0xc0008000                stext
|
| .text           0xc0008200   0x2d78d0
|                 0xc0008200                _stext = .
|                 0xc0008200                __exception_text_start = .
|  *(.exception.text)
|  .exception.text
| ...

As you can see, all the discarded sections are grouped together - and
as a result of it being the first output section, they all appear before
any other section.

The result is that not only is the unwind information discarded (as
intended), but also the .exit.text, despite us wanting to have the
.exit.text preserved.

We can't move the unwind information elsewhere, because it'll then be
included even when we do actually discard the .exit.text (and similar)
sections.

So, work around this by avoiding the generic DISCARDS macro, and instead
conditionalize the sections to be discarded ourselves.  This avoids the
ambiguity in how the linker assigns input sections to output sections,
making our script less dependent on undocumented linker behaviour.

Reported-by: Rob Herring <robherring2@gmail.com>
Tested-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeed 2011-09-17T11:47:17+00:00 Will Deacon will.deacon@arm.com 2011-09-15T10:45:15+00:00 f630c1bdfbf8fe423325beaf60027cfc7fd7c610 This patch implements a workaround for erratum 764369 affecting Cortex-A9 MPCore with two or more processors (all current revisions). Under certain timing circumstances, a data cache line maintenance operation by MVA targeting an Inner Shareable memory region may fail to proceed up to either the Point of Coherency or to the Point of Unification of the system. This workaround adds a DSB instruction before the relevant cache maintenance functions and sets a specific bit in the diagnostic control register of the SCU. Cc: <stable@kernel.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
This patch implements a workaround for erratum 764369 affecting
Cortex-A9 MPCore with two or more processors (all current revisions).
Under certain timing circumstances, a data cache line maintenance
operation by MVA targeting an Inner Shareable memory region may fail to
proceed up to either the Point of Coherency or to the Point of
Unification of the system. This workaround adds a DSB instruction before
the relevant cache maintenance functions and sets a specific bit in the
diagnostic control register of the SCU.

Cc: <stable@kernel.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm 2011-08-29T23:34:07+00:00 Linus Torvalds torvalds@linux-foundation.org 2011-08-29T23:34:07+00:00 90e93648c41bd29a72f6ec55ce27a23c209eab8c * 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm: ARM: pm: avoid writing the auxillary control register for ARMv7 ARM: pm: some ARMv7 requires a dsb in resume to ensure correctness ARM: pm: arm920/926: fix number of registers saved ARM: pm: CPU specific code should not overwrite r1 (v:p offset) ARM: 7066/1: proc-v7: disable SCTLR.TE when disabling MMU ARM: 7065/1: kexec: ensure new kernel is entered in ARM state ARM: 7003/1: vexpress: Add clock definition for the SP805. ARM: 7051/1: cpuimx* boards: fix mach-types errors ARM: 7019/1: Footbridge: select CLKEVT_I8253 for ARCH_NETWINDER ARM: 7015/1: ARM errata: Possible cache data corruption with hit-under-miss enabled ARM: 7014/1: cache-l2x0: Fix L2 Cache size calculation. ARM: 6967/1: ep93xx: ts72xx: fix board model detection ARM: 6965/1: ep93xx: add model detection for ts-7300 and ts-7400 boards ARM: cache: detect VIPT aliasing I-cache on ARMv6 ARM: twd: register clockevents device before enabling PPI ARM: realview: ensure visibility of writes during reset ARM: perf: make name of arm_pmu_type consistent ARM: perf: fix prototype of release_pmu ARM: fix perf build with uclibc toolchains 
* 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: pm: avoid writing the auxillary control register for ARMv7
  ARM: pm: some ARMv7 requires a dsb in resume to ensure correctness
  ARM: pm: arm920/926: fix number of registers saved
  ARM: pm: CPU specific code should not overwrite r1 (v:p offset)
  ARM: 7066/1: proc-v7: disable SCTLR.TE when disabling MMU
  ARM: 7065/1: kexec: ensure new kernel is entered in ARM state
  ARM: 7003/1: vexpress: Add clock definition for the SP805.
  ARM: 7051/1: cpuimx* boards: fix mach-types errors
  ARM: 7019/1: Footbridge: select CLKEVT_I8253 for ARCH_NETWINDER
  ARM: 7015/1: ARM errata: Possible cache data corruption with hit-under-miss enabled
  ARM: 7014/1: cache-l2x0: Fix L2 Cache size calculation.
  ARM: 6967/1: ep93xx: ts72xx: fix board model detection
  ARM: 6965/1: ep93xx: add model detection for ts-7300 and ts-7400 boards
  ARM: cache: detect VIPT aliasing I-cache on ARMv6
  ARM: twd: register clockevents device before enabling PPI
  ARM: realview: ensure visibility of writes during reset
  ARM: perf: make name of arm_pmu_type consistent
  ARM: perf: fix prototype of release_pmu
  ARM: fix perf build with uclibc toolchains
ARM: 7065/1: kexec: ensure new kernel is entered in ARM state 2011-08-28T09:39:41+00:00 Will Deacon will.deacon@arm.com 2011-08-26T15:32:57+00:00 552e0c8da8ff7099e6fe060cd7ec36ae11f5465b Commit 540b5738 ("ARM: 6999/1: head, zImage: Always Enter the kernel in ARM state") mandates that the kernel should be entered in ARM state. If a Thumb-2 kernel kexecs a new kernel image, we need to ensure that we change state when branching to the new code. This patch replaces a mov pc, lr with a bx lr on Thumb-2 kernels so that we transition to ARM state if need be. Reviewed-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
Commit 540b5738 ("ARM: 6999/1: head, zImage: Always Enter the kernel in
ARM state") mandates that the kernel should be entered in ARM state.

If a Thumb-2 kernel kexecs a new kernel image, we need to ensure that
we change state when branching to the new code. This patch replaces a
mov pc, lr with a bx lr on Thumb-2 kernels so that we transition to ARM
state if need be.

Reviewed-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
All Arch: remove linkage for sys_nfsservctl system call 2011-08-26T22:09:58+00:00 NeilBrown neilb@suse.de 2011-08-26T22:03:11+00:00 f5b940997397229975ea073679b03967932a541b The nfsservctl system call is now gone, so we should remove all linkage for it. Signed-off-by: NeilBrown <neilb@suse.de> Signed-off-by: J. Bruce Fields <bfields@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> 
The nfsservctl system call is now gone, so we should remove all
linkage for it.

Signed-off-by: NeilBrown <neilb@suse.de>
Signed-off-by: J. Bruce Fields <bfields@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Merge branch '3.1-fixes-for-rmk' of git://linux-arm.org/linux-2.6-wd into fixes 2011-08-13T08:43:19+00:00 Russell King rmk+kernel@arm.linux.org.uk 2011-08-13T08:43:19+00:00 e426f8e39bb612bfdd38fa7a75d10ba95787d1af 






Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
2011-08-13T03:42:02+00:00

Linus Torvalds
torvalds@linux-foundation.org

2011-08-13T03:42:02+00:00

c44efbaa0ef3cf53fbf6bb57c33d4f199b15f2da

* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (32 commits)
  ARM: mmp: Change the way we use timer 0 as clockevent timer.
  ARM: mmp: Switch to using timer 1 as clocksource timer.
  ARM: mmp: Also start timer 1 on boot.
  ARM: pxa168/gplugd: free correct GPIO
  ARM: pxa168/gplugd: get rid of mfp-gplugd.h
  ARM: pxa: fix logic error in PJ4 iWMMXt handling
  mach-sa1100: fix PCI build problem
  omap: timer: Set dmtimer used as clocksource in autoreload mode
  OMAP3: am3517crane: remove NULL board_mux from board file
  arm: mach-omap2: mux: use kstrdup()
  arch:arm:plat-omap:iovmm: remove unused variable 'va'
  Update Nook Color machine 3284 to common Encore name
  am3505/3517: Various platform defines for UART4
  OMAP: hwmod: fix build break on non-OMAP4 multi-OMAP2 builds
  OMAP: Fix linking error in twl-common.c for OMAP2/3/4 only builds
  iMX: Fix build for iMX53
  ARM: mx5: board-cpuimx51.c fixup irq_to_gpio() usage
  OMAP2+: PM: SmartReflex: use put_sync_suspend for IRQ-safe disabling
  OMAP3: beagle: don't touch omap_device internals
  OMAP1: enable GENERIC_IRQ_CHIP
  ...





* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (32 commits)
  ARM: mmp: Change the way we use timer 0 as clockevent timer.
  ARM: mmp: Switch to using timer 1 as clocksource timer.
  ARM: mmp: Also start timer 1 on boot.
  ARM: pxa168/gplugd: free correct GPIO
  ARM: pxa168/gplugd: get rid of mfp-gplugd.h
  ARM: pxa: fix logic error in PJ4 iWMMXt handling
  mach-sa1100: fix PCI build problem
  omap: timer: Set dmtimer used as clocksource in autoreload mode
  OMAP3: am3517crane: remove NULL board_mux from board file
  arm: mach-omap2: mux: use kstrdup()
  arch:arm:plat-omap:iovmm: remove unused variable 'va'
  Update Nook Color machine 3284 to common Encore name
  am3505/3517: Various platform defines for UART4
  OMAP: hwmod: fix build break on non-OMAP4 multi-OMAP2 builds
  OMAP: Fix linking error in twl-common.c for OMAP2/3/4 only builds
  iMX: Fix build for iMX53
  ARM: mx5: board-cpuimx51.c fixup irq_to_gpio() usage
  OMAP2+: PM: SmartReflex: use put_sync_suspend for IRQ-safe disabling
  OMAP3: beagle: don't touch omap_device internals
  OMAP1: enable GENERIC_IRQ_CHIP
  ...







ARM: cache: detect VIPT aliasing I-cache on ARMv6
2011-08-12T14:41:15+00:00

Will Deacon
will.deacon@arm.com

2011-08-03T11:37:04+00:00

72dc53acd50db066a5a5ebe1f39fae73d7e62aa8

The current cache detection code does not check for an aliasing
I-cache if the D-cache is found to be VIPT aliasing.

This patch fixes the problem by always checking for an aliasing
I-cache on v6 and later.

Signed-off-by: Will Deacon <will.deacon@arm.com>





The current cache detection code does not check for an aliasing
I-cache if the D-cache is found to be VIPT aliasing.

This patch fixes the problem by always checking for an aliasing
I-cache on v6 and later.

Signed-off-by: Will Deacon <will.deacon@arm.com>







ARM: twd: register clockevents device before enabling PPI
2011-08-12T14:41:08+00:00

Will Deacon
will.deacon@arm.com

2011-07-20T13:18:46+00:00

dfc40b24c0a37593724f3317cd485c73ee878c18

The smp_twd clockevents driver currently enables the local timer PPI
before the clockevents device is registered. This can lead to a kernel
panic if a spurious timer interrupt is generated before registration
has completed since the kernel will treat it as an IPI timer.

This patch moves the clockevents device registration before the IRQ
unmasking so that we can always handle timer interrupts once they can
occur.

Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>





The smp_twd clockevents driver currently enables the local timer PPI
before the clockevents device is registered. This can lead to a kernel
panic if a spurious timer interrupt is generated before registration
has completed since the kernel will treat it as an IPI timer.

This patch moves the clockevents device registration before the IRQ
unmasking so that we can always handle timer interrupts once they can
occur.

Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>